? 20 14 semiconductor components industries, llc. publication order number: september - 2017, rev. 2 FPF2290bucx - f130 /d FPF2290 over - voltage protection load switch FPF2290 over - v oltage protection load switch features ? surge protection - iec 61000 - 4 - 5: 100 v ? selectable over - voltage protection (ovp) w ith ov1 and ov2 logic inputs - 5.9 v 100 mv - 10 v 100 mv - 14 v 28 0 mv - 23 v 46 0 mv ? over - temperature protection (o tp) ? ultra - low on - resistance : typ. 33 m ? ? esd protection - human body model (hbm): > 2 kv - charged device model (cdm): > 1 kv - iec 61000 - 4 - 2 air discharge: > 15 kv applications ? mobile handsets and tablets ? portable media players ? mp3 players description the FPF2290 features a low - r on internal fet an d an operating voltage range of 2.5 v to 23 v. an internal clamp ing circuit is capable of shunting surge voltages of 100 v, protecting dow nstream components and enhancing system robustness. the FPF2290 features over - voltage protection that pow ers dow n the internal fet if the input voltage exceeds the ovp threshold. the ovp threshold is selectable via logic select pins (ov1 and ov2). over - temperature protection also pow ers dow n the device at 130c (typical). the FPF2290 is available in a fully Dgreen comp liant 1.3 mm 1.8 mm wafer - level chip - scale package (wlcsp) w ith backside laminate. order ing information part number operating temperature range top mar k package packing method FPF2290 bucx - f130 - 40 c C +85c hr 12 - ball, 0.4 mm pitch wlcsp tape & reel
www.onsemi.com 2 FPF2290 over - voltage protection load switch block diagram figure 1. functional block diagram note: 1. setting ov1 and ov2 logic level are recommended before in is applied. c o u t o v p s e l l o g i c t s d n g a t e d r i v e r , c h a r g e p u m p , b a n d g a p , o s c i l l a t o r c i n # a c o k o v 1 g n d i n o u t r p u v p u t v s o v 2 # e n
www.onsemi.com 3 FPF2290 over - voltage protection load switch pin configuration figure 2. pin configuration (top view ) figure 3. pin configuration (bottom view ) pin definitions name bump type description in b3, c2, c3 input/supply sw itch input and device supply out a2 , a3, b2 output sw itch output to load #acok b1 output pow er good (open - drain output) 1 hi - z: v in < v in_min or v in > v ovlo 0 low: voltage stable #en a1 input device enable (active low ) ov 1/2 c1 , c4 input ovlo selection input ( see table 1 ) note : appy ov1 and ov2 logic levels before vin is applied. gnd a4, b4 supply device ground table 1. ovlo selection ov1 ov2 ovp trip level low low 5.9 v 10 0 mv high low 10 v 100 mv low high 14 v 28 0 m v high hi gh 23 v 46 0 mv g n d g n d o v 2 o u t i n i n i n o u t o u t # e n # a c o k o v 1 a b c 1 2 3 4 g n d g n d o v 2 o u t i n i n i n o u t o u t # e n # a c o k o v 1 a b c 1 2 3 4 4 a b c 1 2 3 1 2 a b c 3 #en ov1 out out out in in in gnd #acok gnd ov2 4
www.onsemi.com 4 FPF2290 over - voltage protection load switch absolute maximum ratings stresses exceeding the absolute maximum ratings may damage the device. the device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommen ded. in addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. the absolute maximum ratings are stress ratings only. symbol parameter min. max. unit v in v_in to gnd & v_in to v_out = gnd or float - 0 .3 29.0 v v out v_out to gnd - 0.3 v in + 0.3 v v ovn ov1 and ov2 to gnd - 0.3 6.0 v v en_acok maximum dc voltage allow ed on #en or # acok pin 6 v i in sw itch i/o current (continuous) 4.5 a t pd total pow er dissipation at t a = 25c 1.48 w t stg storage temperature range - 65 +150 c t j maximum j unction temperature +150 ? l lead temperature (soldering, 10 seconds) +260 ? ? ja thermal resistance, junction - to - ambient ( 2 ) (1 - in. 2 pad of 2 - oz. copper) 84.1 c /w esd iec 61000 - 4 - 2 system level esd air discharge 15 kv contact discharge 8 human body model, ansi/esda/jedec js - 001 - 2012 all pins 2 charged device model, jesd22 - c101 all pins 1 surge iec 61000 - 4 - 5 , surge protection v in 100 v note: 2. me asured using 2s2p jedec std. pcb. recommended operating conditions the recommended operating conditions table defines the conditions for actual device operation. recommended operating conditions are specified to ensure optimal performance to the datashee t specifications. on semiconductor does not recommend exceeding them or designing to absolute maximum ratings. symbol parameter min. max. unit v in supply voltage 2.5 23 .0 v t a operating temperature - 40 + 85 c
www.onsemi.com 5 FPF2290 over - voltage protection load switch electrical characteristics t a = - 40 c to 85 c , v in = 2.5 to 23 v , unless otherw ise indicated. typical values are v in = 5.0 v, i in 3 a, c in = 0.1 f and t a = 25 c . symbol parameter conditions min. typ. max. unit basic operation v in_clamp input clamping v oltage i in = 10 ma 3 5 v i q input quiescent c urrent v in = 5 v , #en = 0 v 80 115 a i in_q ovlo s upply c urrent ov1 = low, ov2 = low v in = 6.5 v, v out = 0 v 63 90 a v in_ovlo over - voltage trip level v in rising ov1 = low, ov2 = low 5.8 0 5.9 0 6.00 v v in falling 5.7 5 v in rising ov1 = high, ov2 = low 9.9 0 10 .00 10. 10 v in falling 9.8 5 v in rising ov1 = low, ov 2 = high 13. 72 14 .0 14. 28 v in falling 13. 52 v in rising ov1 = high, ov2 = high 22. 54 23 .0 23. 46 v in falling 22. 34 r on resistance from v in to v out v in = 5 v, i out = 1 a , t a = 25 c 33 40 m c out out load c apacitance ( 3 ) v in = 5 v 0.1 1 000 .0 f t sdn thermal s hutdow n ( 3 ) 130 c t sdn_hys thermal shutdow n h ysteresis ( 3 ) 20 c digital signals v ol #acok output low voltage i sink = 1 ma 0.4 v i acok #acok leakage current v i/o = 3.0 v , #acok deasserted 0.5 a v ih input high voltage (#en, ovx) v in = 2.5 v to v ovlo 1.2 v v il input low voltage (#en, ovx) v in = 2.5 v to v ovlo 0.5 v i in input leakage current (#en, ovx) v in = 5.0 v, v out = f lo at 1.0 a tim ing characteristics t deb debounce time time from 2.5 v < v in < v in _ ovlo to v out = 0.1 v in 10 15 20 ms t start soft - start time time from v in = v in_min to 0.2 #acok, v io = 1.8 v w ith 10 k p ull - up resistor 20 30 40 ms t on sw itch turn - o n time r l = 100 , c l = 22 f , v out from 0.1 v in to 0.9 v in 1 3 5 ms t off sw itch turn - o ff time ( 3 ) r l = 100 , c l = 0 f , v in > v ovlo to v out = 0. 8 v in 150 n s note: 3. guaranteed by characterization and design.
www.onsemi.com 6 FPF2290 over - voltage protection load switch timi ng diagrams figure 4. tim ing for pow er up and norm al operation figure 5. tim ing for ovlo trip product - specific dimensions d e x y 1288 m 30 m 1828 m 30 m 314 m 18 m 244 m 18 m v i n v o u t # e n t s t a r t m e a s u r e v i n > 2 . 5 v t o 0 . 2 * # a c o k # a c o k : v i o = 1 . 8 v w / 1 0 k p u l l u p t d e b t o n m e a s u r e @ 1 0 / 9 0 % t o f f m e a s u r e @ 8 0 % # e n v o u t = 0 . 8 * v i n # a c o k v i n v o u t # a c o k t s t a r t t o f f m e a s u r e @ o v l o _ r i s i n g v o u t = 0 . 8 * v i n v o v l o t s a r t
www.onsemi.com 7 FPF2290 over - voltage protection load switch physical dimensions figure 6. 12 - ball, 3 4 array, 0.4 m m pitch, wafer - level chip - scale package (wlcsp) h. on semiconductor recommends that lands in the landpattern are at least .215mm diameter as measured at the bottom of the land, not the top edge. bottom view side views top view recommended land pattern (nsmd pad type) notes: a. no jedec registration applies. b. dimensions are in millimeters. c. dimensions and tolerances per asme y14.5m, 2009. d. datum c is defined by the spherical crowns of the balls. e. package nominal height is 586 microns 39 microns (547-625 microns). f. for dimensions d, e, x, and y see product datasheet. g. drawing filename: mkt-uc012zcrev2. h. fairchild semiconductor recommends that lands in the landpattern are at least .215mm diameter as measured at the bottom of the land, not the top edge. 0.20 0.40 0.80 1.20 ?0.2600.02 12x (x)0.018 (y)0.018 a b c 1 2 3 2x pin 1 area 0.03 c e d a b 2x 0.03 c 0.05 c 0.625 0.547 c 0.3780.018 0.2080.021 seating plane d f f (?0.215) cu pad (?0.315) solder mask 0.40 1.20 0.80 0.20 0.005 c a b 4 12x 12x
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