1 description lt c4380 low quiescent current surge stopper demonstration circuit 2178a showcases the lt c ? 4380 low quiescent current surge stopper in an application which can be configured for 12v, 1a or 24v/28v, 0.5a operation. the output voltage is clamped by the LTC4380, permitting the load to operate uninterrupted during transients of up to 250v and load dump surges such as iso-16750- 2 test a. the output current is limited to 1.25a. in the presence of a sustained input overvoltage or output overcurrent fault the LTC4380 shuts off to prevent damage to the n-channel mosfet pass element. l , lt, ltc, ltm, linear technology and the linear logo are registered trademarks of linear technology corporation. all other trademarks are the property of their respective owners. o perating c haracteristics system voltage 12v 24v/28v clamp select 27v 45v dc operating (full load)* 9v to 20v 9v to 37.5v dc survival 80v 80v surge ride-through** iso-16750-2 test a iso-16750-2 test a 1ms transient 250v 250v onset of current limit 1.25a 1.25a short circuit current 1.55a 1.55a maximum load (v in > 9v) 1a 0.5a * initial production boards are marked with more conservative limits of 19v and 35v. functionality extends to 4.2v at 25c. all boards are tested to the limits shown in the table above. ** formerly iso-7637-2 t est pulse 5a the output clamp voltage is selected by jumper jp1 to a value of either 27v or 45v, to suit 12v or 24v/28v sys - tems. dc2178 a-a features the LTC4380-1 which latches off after a fault, and dc2178a-b features the LTC4380-2 which automatically retries after a cool down delay. design files for this circuit board are available at http://www.linear.com/demo/dc2178a dc2178af demo manual dc2178a
2 o perating c haracteristics danger! high voltage testing shall be performed by qualified personnel only. as a safety precaution at least two people shall be present during high voltage testing. board layout dc2178a is a 2 layer board. there are planes for input, output and ground; these are replicated on both layers. there are exposed conductors on the bottom of the board, and any banana plugs present will protrude through the bottom of the board. the underlying surface should be non-conductive and clear of any wire, solder and other conductive debris. the input plane is designed to have at least 79 mil (2mm) clearance to adjacent conductors, to support 80vdc standoff and transients to 250v. spikes and surges are withstood by r1, rdrn, csnub and q1 . these components are chosen for wide pad spacing, pulse power capability and voltage standoff, but ultimately limit the maximum transient input voltage to approximately 250v. the time spent above 80v is limited by the pulse power capability of q1 and r1. operation dc2178a is designed for 12v operation with a load of up to 1a , and 24v or 28v operation with a load of up to 0.5a. jp1 selects an output clamping voltage of either 27v or 45v. for 24v and 28v supplies use a clamping voltage of 45v; 12v supplies may use either 27v or 45v. if the load tolerates the higher voltage, 45v clamping is better than 27v in 12v applications because it reduces the drop across the mosfet (q1) and therefore the safe operating area stress, giving longer ride-through time during an overvoltage condition. q1 is selected to ride through load dump events (such as iso 16750- 2 test a) with full load in 12v (1a ) and 24v/28v (0.5a ) systems. ride through is also permissible at 1a for a 250v input transient of up to 1ms. up to 80vdc can be applied to the input. the circuit will trip off after a delay of approximately 350ms for 1a load and a 27v clamp, or 800ms for a 0.5a load and a 45v clamp. the tmr pin charging current is a function of the power dissipated in q1 so that the exact delay time is a function of the input voltage, output voltage and load current. the LTC4380 features current limiting, which is set with rsns (40m) to a value of 1.25a. current limit does not change with operating voltage or clamping voltage selec - tion. if the output is shorted so that the output voltage falls to 2v or less, current limit increases to 1.55a. in current limit, the LTC4380 trips off after a delay that varies as a function of the dissipation in q1. while the LTC4380 is designed to withstand reverse inputs of up to ?60v, dc2178 a does not tolerate negative-going events because q1s body diode will pass the negative voltage straight through to the output and load. nega - tive inputs are easily blocked by the addition of a series input diode, or by adding a second mosfet as shown in figures 5 and 7 of the LTC4380 data sheet. the lt c4380-1/LTC4380 -2 v cc pin is rated at 80v maxi - mum. power is applied from the input to the v cc pin through a 20k resistor (r1), filtered by a 2.2f capacitor (c1a), and clamped by d1 to 68v . this arrangement offers two key benefits. first, c1 filters the v cc pin to maintain operation during brief input dropouts and to filter overvoltage spikes. second, during load dump in 24v/28v applications v cc is clamped by d1 to keep the v cc pin safely below 80v. d1 is unnecessary in 12v applications because the filtering action provided by c1 is sufficient to keep the v cc pin below 80v, even in load dump. 12v cold crank operation an fdb33n25 was chosen for mosfet q1 to satisfy two requirements: ability to block load dump (200v) in 28v systems; and wide safe operating area for uninterrupted operation during load dump events. the penalty for these features is a high threshold voltage of 5v maximum at i d = 250a and 25c, with no guarantees at temperature extremes. r1 was chosen to limit the peak current in d1 to a safe level with 250v peak input voltage, but it also reduces the v cc voltage below the input under normal conditions. q1 and r1 impact cold crank operation in 12v systems. the LTC4380 is designed to deliver 10v of gate drive with v cc > 8v , and 5v with v cc between 4v and 8v, guaranteed over temperature. thus, the fdb33n25 is incompatible with operation in the 4v to 8v range, although typical dc2178a assemblies can deliver 500ma load current dc2178af demo manual dc2178a
3 with an input voltage of 4.2v . for full performance in 12v cold crank applications, a logic-level rated mosfet is necessary for q1. optional components pads are provided for optional v cc bypassing at c1b (c1a is stuffed with 2.2f), and for optional timer capacitance at ctm r2 (ctmr1 is stuffed with 10f). c1 b and ctm r2 are found on the bottom of the board. an optional gate pin clamp ( d6 ) is also located on the bottom of the board. this clamp is necessary in applications where a large value gate capacitor ( c2 100nf ) is used. a 15v zener is recommended for d6, to safely discharge c2 during a hard short circuit. extra holes five through-hole pads are included for the purpose of attaching an off-board power stage comprising a mos - fet, gate suppression resistor, sense resistor and output reservoir capacitor in high current applications, where the components and current levels are not compatible with the layout of dc2178a. the pads are labeled on the bot - tom of the board and noted on the schematic as input, out , ga te, sns and gnd. remove q1 and rsns. make short, direct connections between the through-hole pads and the external components, and use sns and out to make kelvin connections to the sense resistor. depending on the setup and mosfet used, a snubber may be needed between the mosfet drain and the ground side of the output reservoir capacitor, or between the mosfet drain and source terminals to suppress parasitic oscillations. small turrets no connection to any of the small turrets is necessary to make the board operate the LTC4380 defaults to the on state. on is pulled high internally. if this turret is left open, the board will turn on when power is applied. short this turret to ground to turn off the LTC4380, or pulse low for at least 100s to restart the LTC4380-1 (dc2178a-a) after a fault. f lt pulls low when the LTC4380 faults off from an overcur - rent or overvoltage condition. it is reset by pulling the on pin low for at least 100s in the LTC4380-1 (dc2178a-a), or after a cool down interval in the LTC4380-2 (dc2178 a-b). f lt can sink up to 3ma. jumpers jumper jp1 sets the state of the sel pin to select between a 27v output clamp (sel grounded) or a 45v output clamp (sel connected to out). the corresponding clamp volt - age at the gate pin is about 5v higher than these values. jumper jp2 disables the output led (dled) to facilitate measurement of the LTC4380s operating current. basic t est setup danger! high voltage testing shall be performed by qualified personnel only. as a safety precaution at least two people shall be present during high voltage testing. set the jumper, jp1, for 12v or 24v/48v operation, con - nect a power supply to the input, and connect a load to the output as shown in figure 1. the cir cuit will turn on automatically when power is applied, and the presence of output power is indicated by the output led. t o perform surge testing, add a diode (such as a 1 n4004) in series with the power supply. couple the surge generator through a second diode to the input to test the clamping action of dc2178a. the diodes protect the power supply and surge generator against backfeeding. to measure the operating current, disable the output led using jp2, and disconnect the load. o perating c haracteristics dc2178af demo manual dc2178a
4 o perating c haracteristics input supply output load jp1 figure 1. basic setup. jp1 is set to match input supply, 27v clamp for 12v supplies and 45v clamp for 12v or 24v/28v supplies dc2178af demo manual dc2178a
5 information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa - tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. s chematic diagram input output vcc * input assy u1 a b LTC4380-2 LTC4380-1 gnd gnd output gnd flt on tmr gnd operating limits system voltage clamp select 1ms transient current limit 12v 27v 250v 1.25a surge ride-through lghs lghq top mark latch off auto retry behavior 45v 27v dc operating dc survival 4.2v to 19v 24 / 28v 45v 4.2v to 35v iso-7637-2 test pulse 5a maximum load 1a 0.5a 80v suffix 1 2 d6 ddz9702s 15v opt 1 2 d1 cmhz5266b 68v 1 2 c1b opt 1210 e8 q1 fdb33n25 3 1 2 e5 rsnub 100 1210 j3 c2 47nf 100v r1 20k 1206 jp1 hd2x2-079 clamp 1 3 4 2 e9 ctmr2 opt 1206 j4 rdrn 240k 1206 + cl 22uf 50v j1 e6 input gate out rled2 3.6k 1206 e3 e7 gnd rsns 0.040 csnub 10nf 1206 500v c1a 2.2uf 100v 1210 e2 j2 dled green 2 1 e4 jp2 hd2x2-079 led on off 1 3 4 2 rled1 3.6k 1206 u1 * dfn10dd-3x3 gate 3 on 9 out 5 sns 4 drn 1 tmr 10 vcc 2 sel 6 gnd 8 flt 7 ep 11 r3 10 e1 r2 33 sns ctmr1 10uf 10v 1206 dc2178af demo manual dc2178a
6 linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax : (408) 434-0507 www.linear.com ? linear technology corporation 2016 lt 0416 ? printed in usa demonstration board important notice linear technology corporation (ltc) provides the enclosed product(s) under the following as is conditions: this demonstration board (demo board) kit being sold or provided by linear technology is intended for use for engineering development or evaluation purposes only and is not provided by ltc for commercial use. as such, the demo board herein may not be complete in terms of required design-, marketing-, and/or manufacturing-related protective considerations, including but not limited to product safety measures typically found in finished commercial goods. as a prototype, this product does not fall within the scope of the european union directive on electromagnetic compatibility and therefore may or may not meet the technical requirements of the directive, or other regulations. if this evaluation kit does not meet the specifications recited in the demo board manual the kit may be returned within 30 days from the date of delivery for a full refund. the foregoing warranty is the exclusive warranty made by the seller to buyer and is in lieu of all other warranties, expressed, implied, or statutory, including any warranty of merchantability or fitness for any particular purpose. except to the extent of this indemnity, neither party shall be liable to the other for any indirect, special, incidental, or consequential damages. the user assumes all responsibility and liability for proper and safe handling of the goods. further, the user releases ltc from all claims arising from the handling or use of the goods. due to the open construction of the product, it is the users responsibility to take any and all appropriate precautions with regard to electrostatic discharge. also be aware that the products herein may not be regulatory compliant or agency certified (fcc, ul, ce, etc.). no license is granted under any patent right or other intellectual property whatsoeve r. ltc assumes no liability for applications assistance, customer product design, software performance, or infringement of patents or any other intellectual property rights of any kind. ltc currently services a variety of customers for products around the world, and therefore this transaction is not exclusive. please read the demo board manual prior to handling the product. persons handling this product must have electronics training and observe good laboratory practice standards. common sense is encouraged. this notice contains important safety information about temperatures and voltages. for further safety concerns, please contact a ltc application engineer. mailing address: linear technology 1630 mccarthy blvd. milpitas, ca 95035 copyright ? 2004, linear technology corporation dc2178af demo manual dc2178a
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