p p jl98 3 5 a jul y 2 1 ,201 5 - rev.00 page 1 6 0 v dual p - c ha nnel enhancement mode mosfet voltage - 6 0 v current - 5.5 a sop - 8 f eatures ? r ds(on) , v gs @ - 10v,i d @ - 5.5 a< 48 m ? r ds(on) , v gs @ - 4.5 v,i d @ - 3.0 a< 65 m ? high switching speed ? improved dv/dt capability ? low reverse t ransfer capacitance ? lead free in compliance with eu rohs 2011/65/eu directive ? green molding compound as per iec61249 std. (halogen free) mechanical data ? case: sop - 8 package ? terminals: solderable per mil - std - 750, method 2026 ? marking: l 98 3 5 a maximum ratings and thermal characteristics (t a =25 o c unless otherwise noted) parameter symbol limit units drain - source voltage v ds - 6 0 v gate - source voltage v gs + 20 v continuous drain current t a =25 o c i d - 5.5 a t a = 70 o c - 4.4 pulsed drain current (n ote 1 ) i dm - 22 a power dissipation t a =25 o c p d 2.5 w t a = 70 o c 1.6 single pulse avalanche energy (note 5 ) e as 24 mj operatin g junction an d storage temperature range t j ,t stg - 55~150 o c typical thermal resistance - j unction to ambient , t Q (note 6 ) r j a 50 o c /w
p p jl98 3 5 a jul y 2 1 ,201 5 - rev.00 page 2 e lectrical c haracteristics (t a =25 o c unless otherwise noted) parameter symbol test condition min. typ. max. units static drain - source breakdown voltage bv dss v gs =0v,i d = - 250ua - 6 0 - - v gate threshold voltage v gs(th) v ds =v gs ,i d = - 250ua - 1. 0 - 1. 7 - 2.5 v drain - source on - state resistance r ds(on) v gs = - 10v,i d = - 5.5 a - 40 48 m ds(on) v gs = - 4.5 v,i d = - 3.0 a - 55 65 m dss v ds = - 60 v,v gs =0v - - - 1 .0 u a gate - source leakage current i gss v gs = + 2 0v,v ds =0v - - + 100 n a dynamic (note 7 ) total gate charge q g v ds = - 30 v, i d = - 5.5 a, v gs = - 10 v (note 3 ) - 22 - nc gate - source charge q gs - 4.1 - gate - drain charge q gd - 5.2 - input capacitance ciss v ds = - 30 v, v gs =0v, f=1.0mhz - 1256 - pf output capacitance coss - 87 - reverse transfer capacitance crss - 59 - turn - on delay time t d (on) v dd = - 30 v, i d = - 1 a, v g s = - 10v, r g = 6 (note 3 ) - 13 - ns turn - on rise time tr - 42 - turn - o ff delay time t d (off) - 65 - turn - o ff fall time tf - 1 6 - drain - source diode maximum continuous drain - source diode forward current i s --- - - - 5.5 a diode forward voltage v sd i s = - 1 . 0 a, v gs = 0 v - - 0. 7 2 - 1. 0 v notes : 1. pulse width < 300us, duty cycle < 2% 2. essentially independent of operating temperature typical characteristics . 3. the maximum current rating is package limited. 4. repetitive rating, pulse width limited by junction temperature tj(max)=15 0c. ratings are based on low frequency and duty cycles to keep initial tj =25c. 5. the test condition is l=0.1mh, i as = - 22 a , v dd = - 25 v, v gs = - 10v 6. r ? ja is the sum of the junction - to - case and case - to - ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. mounted on a 1 inch 2 with 2oz. square pad of copper . 7. guaranteed by design, not subjec t to production testing.
p p jl98 3 5 a jul y 2 1 ,201 5 - rev.00 page 3 t ypical characteristic curves fig.1 on - region characteristics fig. 2 transfer characteristics fig. 3 on - resistance vs. drain current fig. 4 on - resistance vs. junction temperature fig. 5 on - resistance va riation with vgs. fig. 6 body d i ode characteristics
p p jl98 3 5 a jul y 2 1 ,201 5 - rev.00 page 4 t ypical characteristic curves fig. 7 gate - charge characteristics fig. 8 breakdown voltage variation vs. temperature fig. 9 threshold voltage variation with temperature . fig. 10 c apacitance vs. drain - source voltage . fig. 11 maximum safe operating area
p p jl98 3 5 a jul y 2 1 ,201 5 - rev.00 page 5 t ypical characteristic curves fig. 12 normalized transient thermal impedance vs. pulse width
p p jl98 3 5 a jul y 2 1 ,201 5 - rev.00 page 6 p art n o packing code v ersion packaging info rmation & mounting pad layout sop - 8 dimension u nit: mm sop - 8 pad la y out u nit: mm p art n o packing c ode package type packing type marking ver sion pj l98 35 a _r2 _00001 sop - 8 2.5 k pcs / 13
p p jl98 3 5 a jul y 2 1 ,201 5 - rev.00 page 7 disclaimer
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