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cypress semiconductor corporation 198 champion court san jose , ca 95134 - 1709 408 - 943 - 2600 document number: 002 - 14792 rev. *f revised october 17, 2016 the following document contains information on cypress products. although the document is marked with the name broadcom, the company that originally developed the specification, cypress will continue to offer these pr oducts to new and existing customers. there is no change to this document as a result of offering the device as a cypress product. any changes that have been made are the result of normal document improvements and are noted in the document history page, where supported. future revisions will occur when appropriate, and changes will be noted in a document history page. cypress continues to support existing part numbers. to order these products , please use only the cypress ordering part number listed in the table. broadcom ordering part number cypress ordering part number bcm20707ua1kffb4gt bcm20707ua1kffb4g bcm20707va1pkwbg bcm20707ua2kffb4gt bcm20707va1pkwbgt bcm20707ua2kffb4g bcm20707ua1kffb1g cyw20707ua1kffb4gt cyw20707ua1kffb4g CYW20707VA1PKWBG cyw20707ua2kffb4gt CYW20707VA1PKWBGt cyw20707ua2kffb4g cyw20707ua1kffb1g please visi t our website at www.cypress.com or contact your local sales office for additional information about cypress products and services. cypress is for true innovators C in companies both large and small. our customers are smart, aggressive, out - of - the - box thinkers who design and develop game - changing products that revolutionize their industries or create new industries with products and solutions that nobody ever thought of before. founded in 1982, cypress is the leader in advanced embedded system solutions for the worlds most innovative automotive, industrial, home automation and appliances, consumer electronics and medical products. cypresss programmable systems - on - chip, general - purpose mi crocontrollers, analog ics, wireless and usb - based connectivity solutions and reliable, high - performance memories help engineers design differentiated products and get them to market first. cypress is committed to providing customers with the best support and engineering resources on the planet enabling innovators and out - of - the - box thinkers to disrupt markets and create new product categories in record time. to learn more, go to www.cypress.com .
20707-ds206-r corporate headquarters: san jose, ca may 27, 2016 preliminary data sheet bcm20707 bluetooth soc for embedded wireless devices figure 1: functional block diagram general description features the broadcom ? bcm20707 is a single-chip bluetooth 4.2-compliant, stand-alone baseband processor with an integrated 2.4 ghz transceiver. manufactured using the industry's most advanced 40 nm cmos low-power process, the bcm20707 employs the highest level of integration to eliminate all critical external components, thereby minimizing the device's footprint and the costs associated with implementing bluetooth solutions. the bcm20707 is the optimal solution for embedded and iot applications. built-in firmware adheres to the bluetooth low energy (ble) profile applications ? home automation ? point-of-sale input devices ? blood pressure monitors ? ?find me? devices ? heart rate monitors ? proximity sensors ? thermometers ? wearables ? complies with bluetooth core specification version 4.2 including br/edr/ble ? broadcom proprietary le data rate up to 2 mbps ? ble hid profile version 1.00 compliant ? bluetooth device id profile version 1.3 compliant ? supports generic access profile (gap) ? supports adaptive frequency hopping (afh) ? excellent receiver sensitivity ? programmable output power control ? integrated arm cortex-m3 microprocessor core ? on-chip power-on reset (por) ? support for eeprom and serial flash interfaces ? integrated low dropout regulators (ldo) ? on-chip software controlled pmu ?pcm/i 2 s interface ? infrared modulator ? ir learning ? on-chip support for spi (master/slave modes) ? broadcom serial communications interface (compatible with nxp i 2 c slaves) ? package types: ? 49-pin fbga package (4.5 mm x 4.0 mm) bluetooth 4.2-compliant ? 36-pin wlbga package (2.8 mm x 2.5 mm) bluetooth 4.2-complaint ? rohs compliant bcm20707 cortex-m3 dma scan jtag address decoder bus arb trap & patch ahb2apb wd timer remap & pause 32-bit apb 32-bit ahb ahb2mem ahb2ebi external bus i/f rom ahb2mem ram pmu control uart debug uart ptu i/o port control pmu lpo por buffer apu bt clk/ hopper blue rf i/f rx/tx buffer digital modulator calibration & control digital demod bit sync bluetooth radio rf flash i/f jtag digital i/o i2c_master interrupt controller pcm gpio+aux sw timers jtag master lcu spi master low power scan blue rf registers adc mic
revision history bcm20707 preliminary data sheet broadcom ? bluetooth soc may 27, 2016 ? 20707-ds206-r page 2 broadcom confidential revision history revision date change description 20707-ds106-r 05/27/16 updated: ? cover page minor edits. ? figure 2: ?reset timing,? on page 13 . ? figure 3: ?ldo functional block diagram,? on page 16 . ? figure 8: ?bcm20707 49-pin fbga ball map,? on page 35 . ? table 9: ?power supply specifications,? on page 37 . ? table 10: ?vddc ldo electrical specifications,? on page 38 . ? ambient operating temperatures in section 5: ?ordering information,? on page 61 . added: ? ?link control layer? on page 11 . ? table 11: ?btldo_2p5 electrical specifications,? on page 39 . 20707-ds105-r 04/20/16 added: ? 36-pin wlbga package (2.8mm x2.5mm) feature bullet on cover page ? added informative notes in ?one-time programmable memory? on page 12 and ?clock frequencies? on page 21 ? ?36-pin wlbga package? on page 23 ? table 7: ?bcm20707 36-pin wlbga list,? on page 32 ? figure 21: ?bcm20707 36-pin wlbga package (2.8 mm x 2.5 mm),? on page 59 ? 36-pin wlbga part to section 5: ?ordering information,? on page 61 20707-ds104-r 04/07/16 updated: ? figure 19: ?bcm20707 49-pin fbga package (4.5 mm x 4.0 mm),? page 51 20707-ds103-r 03/24/16 updated: ? table 6: ?bcm20707 49-ball pin list,? on page 26 20707-ds102-r 10/02/15 updated: ? table 6: ?bcm20707 49-ball pin list,? on page 27 20707-ds101-r 06/15/15 updated: ? ?internal ldo? on page 14 ? figure 3: ?ldo functional block diagram,? on page 15 (added) ? ?collaborative coexistence? on page 15 (added) ? ?global coexistence interface? on page 15 (added) ? ?seci i/o? on page 15 (added) ? table 6: ?bcm20707 49-ball pin list,? on page 27 ? table 8: ?power supply specifications,? on page 33 ? section 5: ?ordering information,? on page 55 20707-ds100-r 04/17/15 initial release
? 2016 by broadcom. all rights reserved. broadcom ? , the pulse logo, connecting everything ? , the connecting everything logo, and avago technologies are among the trademarks of broadcom and/or its affiliates in the united states, certain other countries and/or the eu. any other trademarks or trade names mentioned are the property of their respective owners. broadcom reserves the right to make changes without further notice to any products or data herein to improve reliability, function, or design. information furnished by broadcom is believed to be accurate and reliable. however, broadcom does not assume any liability arising out of the application or use of this information, nor the application or use of any product or circuit described herein, neither does it convey any license under its patent rights nor the rights of others. this data sheet (including, without limitation, the broadcom component(s) identified herein) is not designed, intended, or certified for use in any military, nuclear, medical, mass transportation, aviation, navigations, pollution control, hazardous substances management, or other high-risk application. broadcom provides this data sheet ?as-is,? without warranty of any kind. broadcom disclaims all warranties, expressed and implied, including, without limitation, the implied warranties of merchantability, fitnes s for a particular purpose, and non- infringement.
table of contents bcm20707 preliminary data sheet broadcom ? bluetooth soc may 27, 2016 ? 20707-ds206-r page 4 broadcom confidential table of contents about this document ............................................................................................................................... ... 9 purpose and audience ........................................................................................................... ................. 9 acronyms and abbreviations..................................................................................................... .............. 9 technical support ............................................................................................................................... ......... 9 section 1: functional description ................................................................................... 10 bluetooth baseband core ......................................................................................................................... 10 bluetooth 4.2 features ......................................................................................................... ................. 10 link control layer ............................................................................................................. .................... 11 test mode support.............................................................................................................. .................. 11 frequency hopping generator.................................................................................................... .......... 11 microprocessor unit ............................................................................................................................... .... 12 nvram configuration data and storage........................................................................................... ... 12 one-time programmable memory................................................................................................... ..... 12 external reset................................................................................................................. ...................... 13 integrated radio transceiver .................................................................................................................... 14 transmit ....................................................................................................................... ......................... 14 digital modulator .............................................................................................................. .............. 14 digital demodulator and bit synchronizer ..................................................................................... 14 power amplifier ................................................................................................................ .............. 14 receiver ....................................................................................................................... ......................... 15 digital demodulator and bit synchronizer ..................................................................................... 15 receiver signal strength indicator............................................................................................. .... 15 local oscillator generation .................................................................................................... ............... 15 calibration .................................................................................................................... ......................... 15 internal ldo ................................................................................................................... ....................... 15 collaborative coexistence ......................................................................................................................... 16 global coexistence interface .................................................................................................................... 16 seci i/o ....................................................................................................................... ......................... 16 peripheral transport unit .......................................................................................................................... 17 broadcom serial communications interface ....................................................................................... .. 17 uart interface................................................................................................................. ..................... 18 peripheral uart interface ...................................................................................................... ....... 19 pcm interface ............................................................................................................................... ............... 20 slot mapping ................................................................................................................... ...................... 20 frame synchronization .......................................................................................................... ............... 20 data formatting................................................................................................................ ..................... 20 burst pcm mode ................................................................................................................. .................. 20
table of contents bcm20707 preliminary data sheet broadcom ? bluetooth soc may 27, 2016 ? 20707-ds206-r page 5 broadcom confidential clock frequencies ............................................................................................................................... ....... 21 crystal oscillator ............................................................................................................. ...................... 21 hid peripheral block........................................................................................................... ........... 22 gpio ports ............................................................................................................................... ................... 23 49-pin fbga package ............................................................................................................ .............. 23 36-pin wlbga package ........................................................................................................... ............ 23 pwm ............................................................................................................................... .............................. 24 triac control ............................................................................................................................... ................ 25 serial peripheral interface ......................................................................................................................... 25 infrared modulator ............................................................................................................................... ....... 25 infrared learning ............................................................................................................................... ......... 26 power management unit ............................................................................................................................ 27 rf power management ............................................................................................................ ............ 27 host controller power management ............................................................................................... ...... 27 bbc power management........................................................................................................... ........... 27 section 2: pin assignments ............................................................................................. 28 pin descriptions ............................................................................................................................... .......... 28 49-pin fbga list............................................................................................................... .................... 28 36-pin wlbga list .............................................................................................................. ................. 32 ball map ............................................................................................................................... ........................ 35 49-pin fbga ball map ........................................................................................................... ............... 35 36-pin wlbga ball map .......................................................................................................... ............. 36 section 3: specifications .................................................................................................. 37 electrical characteristics ........................................................................................................................... 37 digital i/o characteristics.................................................................................................... .................. 40 current consumption ............................................................................................................ ................ 41 rf specifications ............................................................................................................................... ........ 43 timing and ac characteristics ................................................................................................................. 47 uart timing.................................................................................................................... ..................... 47 spi timing..................................................................................................................... ........................ 48 bsc interface timing ........................................................................................................... ................. 50 pcm interface timing........................................................................................................... ................. 51 short frame sync, master mode .................................................................................................. .51 short frame sync, slave mode ................................................................................................... .. 52 long frame sync, master mode................................................................................................... .53 long frame sync, slave mode.................................................................................................... .. 54 i 2 s timing....................................................................................................................... ....................... 55
table of contents bcm20707 preliminary data sheet broadcom ? bluetooth soc may 27, 2016 ? 20707-ds206-r page 6 broadcom confidential section 4: mechanical information .................................................................................. 58 package diagrams ............................................................................................................................... ....... 58 tape reel and packaging specifications ................................................................................................. 60 section 5: ordering information ...................................................................................... 61 appendix a: acronyms and abbreviations .................................................................... 62
list of figures bcm20707 preliminary data sheet broadcom ? bluetooth soc may 27, 2016 ? 20707-ds206-r page 7 broadcom confidential list of figures figure 1: functional block diagram.............................................................................................. ..................... 1 figure 2: reset timing.......................................................................................................... ........................... 13 figure 3: ldo functional block diagram .......................................................................................... .............. 16 figure 4: recommended oscillator configuration?12 pf load crystal ........................................................ 21 figure 5: pwm block diagram..................................................................................................... .................... 24 figure 6: infrared tx ........................................................................................................... ............................. 26 figure 7: infrared rx ........................................................................................................... ............................ 26 figure 8: bcm20707 49-pin fbga ball map......................................................................................... .......... 35 figure 9: bcm20707 36-pin wlbga ball map ........................................................................................ ....... 36 figure 10: uart timing .......................................................................................................... ........................ 47 figure 11: spi timing, mode 0 and 2 ............................................................................................. ................. 48 figure 12: spi timing, mode 1 and 3 ............................................................................................. ................. 49 figure 13: bsc interface timing diagram ......................................................................................... .............. 50 figure 14: pcm timing diagram (short frame sync, master mode) .............................................................. 51 figure 15: pcm timing diagram (short frame sync, slave mode) ................................................................ 52 figure 16: pcm timing diagram (long frame sync, master mode)............................................................... 53 figure 17: pcm timing diagram (long frame sync, slave mode)................................................................. 54 figure 18: i 2 s transmitter timing ........................................................................................................... ......... 57 figure 19: i 2 s receiver timing.............................................................................................................. .......... 57 figure 20: bcm20707 49-pin fbga package (4.5 mm x 4.0 mm) .................................................................. 58 figure 21: bcm20707 36-pin wlbga package (2.8 mm x 2.5 mm)............................................................... 59 figure 22: pin 1 orientation .................................................................................................... ......................... 60
list of tables bcm20707 preliminary data sheet broadcom confidential broadcom ? bluetooth soc may 27, 2016 ? 20707-ds206-r page 8 list of tables table 1: common baud rate examples, 24 mhz clock ................................................................................. 18 table 2: common baud rate examples, 48 mhz clock ................................................................................. 19 table 3: bcm20707 peripheral uart ............................................................................................... .............. 19 table 4: crystal strapping options for the 49-pin fbga package.................................................................. 21 table 5: reference crystal electrical specifications ............................................................................ ........... 22 table 6: bcm20707 49-pin fbga list .............................................................................................. .............. 28 table 7: bcm20707 36-pin wlbga list ............................................................................................. ............ 32 table 8: absolute maximum ratings ............................................................................................... ................ 37 table 9: power supply specifications............................................................................................ .................. 37 table 10: vddc ldo electrical specifications.................................................................................... ............ 38 table 11: btldo_2p5 electrical specifications ................................................................................... ........... 39 table 12: digital i/o characteristics ........................................................................................... ..................... 40 table 13: bluetooth, ble, br and edr current consumption, class 1 ......................................................... 41 table 14: bluetooth and ble current consumption, class 2 (0 dbm) ........................................................... 41 table 15: receiver rf specifications ............................................................................................ .................. 43 table 16: transmitter rf specifications ......................................................................................... ................. 45 table 17: ble rf specifications ................................................................................................. .................... 46 table 18: uart timing specifications ............................................................................................ ................ 47 table 19: spi mode 0 and 2 ...................................................................................................... ...................... 48 table 20: spi mode 1 and 3 ...................................................................................................... ...................... 49 table 21: bsc interface timing specifications (up to 1 mhz) ..................................................................... .... 50 table 22: pcm interface timing specifications (short frame sync, master mode)........................................ 51 table 23: pcm interface timing specifications (short frame sync, slave mode).......................................... 52 table 24: pcm interface timing specifications (long frame sync, master mode) ........................................ 53 table 25: pcm interface timing specifications (long frame sync, slave mode) .......................................... 54 table 26: timing for i 2 s transmitters and receivers ...................................................................................... 56 table 27: bcm20707 tape reel specifications ..................................................................................... ......... 60 table 28: ordering information .................................................................................................. ...................... 61
about this document broadcom ? bluetooth soc may 27, 2016 ? 20707-ds206-r page 9 bcm20707 preliminary data sheet broadcom confidential about this document purpose and audience the data sheet provides details of the functional, operational, and electrical characteristics of the broadcom ? bcm20707 device. it is intended for hardware, design, application, and oem engineers. acronyms and abbreviations in most cases, acronyms and abbreviations are defined on first use. acronyms and abbreviations in this document are also defined in appendix a: ?acronyms and abbreviations,? on page 62 . for a comprehensive list of acronyms and other terms used in broadcom documents, go to: http://www.broadcom.com/press/glossary.php . technical support broadcom provides customer access to a wide range of information, including technical documentation, schematic diagrams, product bill of materials, pcb layout information, and software updates through its customer support portal ( https://support.broadcom.com ). for a csp account, contact your sales or engineering support representative. in addition, broadcom provides other product support through its downloads & support site ( http://www.broadcom.com/support/ ).
functional description bcm20707 preliminary data sheet broadcom confidential broadcom ? bluetooth soc may 27, 2016 ? 20707-ds206-r page 10 section 1: functional description bluetooth baseband core the bluetooth baseband core (bbc) implements all of the time-critical functions required for high-performance bluetooth operation. the bbc manages the buffering, segmentation, and routing of data for all connections. it also buffers data that passes through it, handles data flow control, schedules sco/acl and tx/rx transactions, monitors bluetooth slot usage, optimally segments and packages data into baseband packets, manages connection status indicators, and composes and decodes hci packets. in addition to these functions, it independently handles hci event types, and hci command types. the following transmit and receive functions are also implemented in the bbc hardware to increase reliability and security of the tx/rx data before sending over the air: ? symbol timing recovery, data deframing, forward error correction (fec), header error control (hec), cyclic redundancy check (crc), data decryption, and data dewhitening in the receiver. ? data framing, fec generation, hec generation, crc generation, key generation, data encryption, and data whitening in the transmitter. bluetooth 4.2 features both the bcm20707 36-pin wlbga package and the 49-pin fbga package support all bluetooth 4.2 and legacy features, with the following benefits: ? dual-mode bluetooth low energy (bt and ble operation) ? extended inquiry response (eir): shortens the time to retrieve the device name, specific profile, and operating mode. ? encryption pause resume (epr): enables the use of bluetooth technology in a much more secure environment. ? sniff subrating (ssr): optimizes power consumption for low duty cycle asymmetric data flow, which subsequently extends battery life. ? secure simple pairing (ssp): reduces the number of steps for connecting two devices, with minimal or no user interaction required. ? link supervision time out (lsto): additional commands added to hci and link management protocol (lmp) for improved link timeout supervision. ? quality of service (qos) enhancements: changes to data traffic control, which results in better link performance. audio, human interface device (hid), bulk traffic, sco, and enhanced sco (esco) are improved with the erroneous data (ed) and packet boundary flag (pbf) enhancements. ? secure connections (br/edr) ? fast advertising interval ? piconet clock adjust ? connectionless broadcast ? le privacy v1.1 ? low duty cycle directed advertising ? le dual mode topology
bluetooth baseband core bcm20707 preliminary data sheet broadcom confidential broadcom ? bluetooth soc may 27, 2016 ? 20707-ds206-r page 11 link control layer the link control layer is part of the bluetooth link control functions that are implemented in dedicated logic in the link control unit (lcu). this layer consists of the command controller that takes commands from the software, and other controllers that are activated or configured by the command controller, to perform the link control tasks. each task is performed in a different state in the bluetooth link controller. ? states: ? standby ? connection ?page ? page scan ? inquiry ? inquiry scan ?sniff ? advertising ?scanning test mode support the bcm20707 fully supports bluetooth test mode as described in part i:1 of the specification of the bluetooth system version 3.0. this includes the transmitter tests, normal and delayed loopback tests, and reduced hopping sequence. in addition to the standard bluetooth test mode, the bcm20707 also supports enhanced testing features to simplify rf debugging and qualification and type-approval testing. these features include: ? fixed frequency carrier wave (unmodulated) transmission ? simplifies some type-approval measurements (japan) ? aids in transmitter performance analysis ? fixed frequency constant receiver mode ? receiver output directed to i/o pin ? allows for direct ber measurements using standard rf test equipment ? facilitates spurious emissions testing for receive mode ? fixed frequency constant transmission ? 8-bit fixed pattern or prbs-9 ? enables modulated signal measurements with standard rf test equipment frequency hopping generator the frequency hopping sequence generator selects the correct hopping channel number based on the link controller state, bluetooth clock, and device address.
microprocessor unit bcm20707 preliminary data sheet broadcom confidential broadcom ? bluetooth soc may 27, 2016 ? 20707-ds206-r page 12 microprocessor unit the bcm20707 microprocessor unit runs software from the link control (lc) layer up to the host controller interface (hci). the microprocessor is based on the cortex-m3 32-bit risc processor with embedded ice-rt debug and jtag interface units. the microprocessor also includes 848 kb of rom memory for program storage and boot rom, 352 kb of ram for data scratch-pad, and patch ram code. the internal boot rom provides flexibility during power-on reset to enable the same device to be used in various configurations. at power-up, the lower layer protocol stack is executed from the internal rom. external patches can be applied to the rom-based firmware to provide flexibility for bug fixes and features additions. these patches can be downloaded using external nvram. the device can also support the integration of user applications and profiles using an external serial flash memory. nvram configuration data and storage nvram contains configuration information about the customer application, including the following: ? fractional-n information ?bd_addr ? uart baud rate ? sdp service record ? file system information used for code, code patches, or data. the bcm20707 can use spi flash or i 2 c eeprom/serial flash for nvram storage. one-time programmable memory the bcm20707 includes 2 kbytes of one-time programmable (otp) memory allow manufacturing customization and to avoid the need for an on-board nvram. if customization is not required, then the otp does not need to be programmed. whether the otp is programmed or not, to save power it is disabled when the boot process is complete. the otp is designed to store a minimal amount of information. aside from otp data, most user configuration information will be downloaded to ram after the bcm20707 boots and is ready for host transport communication. the otp contents are limited to: ? parameters required prior to downloading the user configuration to ram. ? parameters unique to each part and each customer (for example, the bluetooth device address and/or the software license key). note: the otp is disabled internally for the 36-pin wlbga package.
microprocessor unit bcm20707 preliminary data sheet broadcom confidential broadcom ? bluetooth soc may 27, 2016 ? 20707-ds206-r page 13 external reset an external active-low reset signal, reset_n, can be used to put the bcm20707 in the reset state. an external voltage detector reset ic with 50 ms delay is needed on the reset_n. the reset_n should be released only after the vddo supply voltage level has been stabilized for 50 ms. figure 2: reset timing note: the reset signal should remain below this threshold 50 ms after vddo is stable. note that the representation of this signaling diagram is extended and not drawn to scale. vddo por vddo reset (external) vddc 50 ms vddc reset (internal) xtal_reset xtal_buf_pu ~2.4 ms 0.5 ms ~2.4 ms 10 lpo cycles 8 lpo cycles low threshold
integrated radio transceiver bcm20707 preliminary data sheet broadcom confidential broadcom ? bluetooth soc may 27, 2016 ? 20707-ds206-r page 14 integrated radio transceiver the bcm20707 has an integrated radio transceiver that has been optimized for use in 2.4 ghz bluetooth wireless systems. it has been designed to provide low-power, low-cost, robust communications for applications operating in the globally available 2.4 ghz unlicensed ism band. the bcm20707 is fully compliant with the bluetooth radio specification and enhanced data rate (edr) specification and meets or exceeds the requirements to provide the highest communication link quality of service. transmit the bcm20707 features a fully integrated zero-if transmitter. the baseband transmit data is gfsk-modulated in the modem block and upconverted to the 2.4 ghz ism band in the transmitter path. the transmitter path consists of signal filtering, i/q upconversion, output power amplifier, and rf filtering. the transmitter path also incorporates ? /4-dqpsk for 2 mbps and 8-dpsk for 3 mbps to support edr. the transmitter section is compatible with the ble specification. the transmitter pa bias can also be adjusted to provide bluetooth class 1 or class 2 operation. digital modulator the digital modulator performs the data modulation and filtering required for the gfsk, ? /4-dqpsk, and 8-dpsk signal. the fully digital modulator minimizes any frequency drift or anomalies in the modulation characteristics of the transmitted signal and is much more stable than direct vco modulation schemes. digital demodulator and bit synchronizer the digital demodulator and bit synchronizer take the low-if received signal and perform an optimal frequency tracking and bit synchronization algorithm. power amplifier the fully integrated pa supports class 1 or class 2 output using a highly linearized, temperature-compensated design. this provides greater flexibility in front-end matching and filtering. due to the linear nature of the pa combined with some integrated filtering, external filtering is required to meet the bluetooth and regulatory harmonic and spurious requirements. for integrated mobile handset applications in which bluetooth is integrated next to the cellular radio, external filtering can be applied to achieve near thermal noise levels for spurious and radiated noise emissions. the transmitter features a sophisticated on-chip transmit signal strength indicator (tssi) block to keep the absolute output power variation within a tight range across process, voltage, and temperature.
integrated radio transceiver bcm20707 preliminary data sheet broadcom confidential broadcom ? bluetooth soc may 27, 2016 ? 20707-ds206-r page 15 receiver the receiver path uses a low-if scheme to downconvert the received signal for demodulation in the digital demodulator and bit synchronizer. the receiver path provides a high degree of linearity, an extended dynamic range, and high-order on-chip channel filtering to ensure reliable operation in the noisy 2.4 ghz ism band. the front-end topology, with built-in out-of-band attenuation, enables the bcm20707 to be used in most applications with minimal off-chip filtering. for integrated handset operation, in which the bluetooth function is integrated close to the cellular transmitter, external filtering is required to eliminate the desensitization of the receiver by the cellular transmit signal. digital demodulator and bit synchronizer the digital demodulator and bit synchronizer take the low-if received signal and perform an optimal frequency tracking and bit synchronization algorithm. receiver signal strength indicator the radio portion of the bcm20707 provides a receiver signal strength indicator (rssi) signal to the baseband, so that the controller can take part in a bluetooth power-controlled link by providing a metric of its own receiver signal strength to determine whether the transmitter should increase or decrease its output power. local oscillator generation a local oscillator (lo) generation provides fast frequency hopping (1600 hops/second) across the 79 maximum available channels. the lo generation subblock employs an architecture for high immunity to lo pulling during pa operation. the bcm20707 uses an internal rf and if loop filter. calibration the bcm20707 radio transceiver features an automated calibration scheme that is fully self-contained in the radio. no user interaction is required during normal operation or during manufacturing to provide optimal performance. calibration tunes the performance of all the major blocks within the radio to within 2% of optimal conditions, including gain and phase characteristics of filters, matching between key components, and key gain blocks. this takes into account process variation and temperature variation. calibration occurs transparently during normal operation during the settling time of the hops, and calibrates for temperature variations as the device cools and heats during normal operation in its environment. internal ldo the bcm20707 uses two ldos - one for 1.2v and the other for 2.5v. the 1.2v ldo provides power to the baseband and radio and the 2.5v ldo powers the pa.
collaborative coexistence bcm20707 preliminary data sheet broadcom confidential broadcom ? bluetooth soc may 27, 2016 ? 20707-ds206-r page 16 figure 3: ldo functional block diagram collaborative coexistence the bcm20707 provides extensions and collaborative coexistence to the standard bluetooth afh for direct communication with wlan devices. collaborative coexistence enables wlan and bluetooth to operate simultaneously in a single device. the device supports industry-standard coexistence signaling, including 802.15.2, and supports broadcom and third-party wlan solutions. global coexistence interface the bcm20707 supports the proprietary broadcom global coexistence interface (gci) which is a 2-wire interface. the following key features are associated with the interface: ? enhanced coexistence data can be exchanged over gci_seci_in and gci_seci_out a two-wire interface, one serial input (gci_seci_in), and one serial output (gci_seci_out). the pad configuration registers must be programmed to choose the digital i/o pins that serve the gci_seci_in and gci_seci_out function. ? it supports generic uart communication between wlan and bluetooth devices. ? to conserve power, it is disabled when inactive. ? it supports automatic resynchronization upon waking from sleep mode. ? it supports a baud rate of up to 4 mbps. seci i/o the bcm20707 devices have dedicated gci_seci_in and gci_seci_out pins. the two pin functions can be mapped to any of the broadcom global coexistence interface (gci) gpio. pin function mapping is controlled by the configuration file that is stored in either nvram or downloaded directly into on-chip ram from the host. bcm20707 pmu 1.2v ldo (vddc_ldo) 2.5v ldo (btldo2p5) vddc_out vdd2p5_out vbat vdd2p5 avss_gnd
peripheral transport unit bcm20707 preliminary data sheet broadcom confidential broadcom ? bluetooth soc may 27, 2016 ? 20707-ds206-r page 17 peripheral transport unit broadcom serial communications interface the bcm20707 provides a 2-pin master bsc interface, which can be used to retrieve configuration information from an external eeprom or to communicate with peripherals such as trackball or touch-pad modules, and motion tracking ics used in mouse devices. the bsc interface is compatible with i 2 c slave devices. bsc does not support multimaster capability or flexible wait-state insertion by either master or slave devices. the following transfer clock rates are supported by bsc: ? 100 khz ? 400 khz ? 800 khz (not a standard i 2 c-compatible speed.) ? 1 mhz (compatibility with high-speed i 2 c-compatible devices is not guaranteed.) the following transfer types are supported by bsc: ? read (up to 127 bytes can be read.) ? write (up to 127 bytes can be written.) ? read-then-write (up to 127 bytes can be read and up to 127 bytes can be written.) ? write-then-read (up to 127 bytes can be written and up to 127 bytes can be read.) hardware controls the transfers, requiring minimal firmware setup and supervision. the clock pin (scl) and data pin (sda) are both open-drain i/o pins. pull-up resistors external to the bcm20707 are required on both the scl and sda pins for proper operation.
peripheral transport unit bcm20707 preliminary data sheet broadcom confidential broadcom ? bluetooth soc may 27, 2016 ? 20707-ds206-r page 18 uart interface the uart physical interface is a standard, 4-wire interface (rx, tx, rts, and cts) with adjustable baud rates from 38400 bps to 6 mbps. during initial boot, uart speeds may be limited to 750 kbps. the baud rate may be selected via a vendor-specific uart hci command. the bcm20707 has a 1040-byte receive fifo and a 1040- byte transmit fifo to support enhanced data rates. the interface supports the bluetooth uart hci (h4) specification. the default baud rate for h4 is 115.2 kbaud. the uart clock default setting is 24 mhz, and can be configured to run as high as 48 mhz to support up to 6 mbps. the baud rate of the bcm20707 uart is controlled by two values. the first is a uart clock divisor (set in the dlbr register) that divides the uart clock by an integer multiple of 16. the second is a baud rate adjustment (set in the dhbr register) that is used to specify a number of uart clock cycles to stuff in the first or second half of each bit time. up to eight uart cycles can be inserted into the first half of each bit time, and up to eight uart clock cycles can be inserted into the end of each bit time. ta b l e 1 contains example values to generate common baud rates with a 24 mhz uart clock. ta b l e 2 contains example values to generate common baud rates with a 48 mhz uart clock. table 1: common baud rate examples, 24 mhz clock baud rate (bps) baud rate adjustment mode error (%) high nibble low nibble 6m 0xff 0xf8 high rate 0.00 4m 0xff 0xf4 high rate 0.00 3m 0xff 0xf8 high rate 0.00 2m 0xff 0xf4 high rate 0.00 1m 0x44 0xff normal 0.00 921600 0x05 0x05 normal 0.16 460800 0x02 0x02 normal 0.16 230400 0x04 0x04 normal 0.16 115200 0x00 0x00 normal 0.16 57600 0x00 0x00 normal 0.16 38400 0x01 0x00 normal 0.00
peripheral transport unit bcm20707 preliminary data sheet broadcom confidential broadcom ? bluetooth soc may 27, 2016 ? 20707-ds206-r page 19 normally, the uart baud rate is set by a configuration record downloaded after reset. support for changing the baud rate during normal hci uart operation is included through a vendor-specific command that allows the host to adjust the contents of the baud rate registers. the bcm20707 uart operates correctly with the host uart as long as the combined baud rate error of the two devices is within 2%. peripheral uart interface the bcm20707 has a second uart that may be used to interface to other peripherals. this peripheral uart is accessed through the optional i/o ports, which can be configured individually and separately for each functional pin as shown in ta b l e 3 . table 2: common baud rate examples, 48 mhz clock baud rate (bps) high rate low rate mode error (%) 6m 0xff 0xf8 high rate 0 4m 0xff 0xf4 high rate 0 3m 0x0 0xff normal 0 2m 0x44 0xff normal 0 1.5m 0x0 0xfe normal 0 1m 0x0 0xfd normal 0 921600 0x22 0xfd normal 0.16 230400 0x0 0xf3 normal 0.16 115200 0x1 0xe6 normal ?0.08 57600 0x1 0xcc normal 0.04 38400 0x11 0xb2 normal 0 table 3: bcm20707 peripheral uart pin name puart_tx puart_rx puart_cts_n puart_rts_n configured pin name p0 p2 p3 p6 p31 p33 ? p30 note: not all of the gpios above are available on the 36-pin wlbga package.
pcm interface bcm20707 preliminary data sheet broadcom confidential broadcom ? bluetooth soc may 27, 2016 ? 20707-ds206-r page 20 pcm interface the bcm20707 includes a pcm interface that shares pins with the i 2 s interface. the pcm interface on the bcm20707 can connect to linear pcm codec devices in master or slave mode. in master mode, the bcm20707 generates the pcm_clk and pcm_sync signals. in slave mode, these signals are provided by another master on the pcm interface and are inputs to the bcm20707. slot mapping the bcm20707 supports up to three simultaneous full-duplex sco or esco channels through the pcm interface. these three channels are time-multiplexed onto the single pcm interface by using a time-slotting scheme where the 8 khz or 16 khz audio sample interval is divided into as many as 16 slots. the number of slots is dependent on the selected interface rate (128 khz, 512 khz, or 1024 khz). the corresponding number of slots for these interface rate is 1, 2, 4, 8, and 16, respectively. transmit and receive pcm data from an sco channel is always mapped to the same slot. the pcm data output driver tristates its output on unused slots to allow other devices to share the same pcm interface signals. the data output driver tristates its output after the falling edge of the pcm clock during the last bit of the slot. frame synchronization the bcm20707 supports both short- and long-frame synchronization in both master and slave modes. in short- frame synchronization mode, the frame synchronization signal is an active-high pulse at the audio frame rate that is a single-bit period in width and is synchronized to the rising edge of the bit clock. the pcm slave looks for a high on the falling edge of the bit clock and expects the first bit of the first slot to start at the next rising edge of the clock. in long-frame synchronization mode, the frame synchronization signal is again an active-high pulse at the audio frame rate; however, the duration is three-bit periods and the pulse starts coincident with the first bit of the first slot. data formatting the bcm20707 may be configured to generate and accept several different data formats. for conventional narrowband speech mode, the bcm20707 uses 13 of the 16 bits in each pcm frame. the location and order of these 13 bits can be configured to support various data formats on the pcm interface. the remaining three bits are ignored on the input and may be filled with 0s, 1s, a sign bit, or a programmed value on the output. the default format is 13-bit 2?s complement data, left justified, and clocked msb first. burst pcm mode in this mode of operation, the pcm bus runs at a significantly higher rate of operation to allow the host to duty cycle its operation and save current. in this mode of operation, the pcm bus can operate at a rate of up to 24 mhz. this mode of operation is initiated with an hci command from the host.
clock frequencies bcm20707 preliminary data sheet broadcom confidential broadcom ? bluetooth soc may 27, 2016 ? 20707-ds206-r page 21 clock frequencies the bcm20707 49-pin fbga package supports 20, 24, and 40 mhz crystals (xtal) by selecting the correct crystal strapping options. other frequencies also supported by firmware configuration. ta b le 4 lists the strapping options. crystal oscillator the xtal must have an accuracy of 20 ppm as defined by the bluetooth specification. two external load capacitors in the range of 5 pf to 30 pf are required to work with the crystal oscillator. the selection of the load capacitors is xtal-dependent (see figure 4 ). figure 4: recommended oscillator configuration?12 pf load crystal table 4: crystal strapping options for the 49-pin fbga package strapping option pin xtal frequency bt_xtal_strap_1 bt_xtal_strap_0 pull low pull low 40 mhz pull low pull high 24 mhz pull high pull low 20 mhz pull high pull high read from serial flash or eeprom note: only the read from serial flash or eeprom option is available for the 36-pin wlbga package. the strapping is set internally in the package. 22 pf 20 pf crystal xin xout
clock frequencies bcm20707 preliminary data sheet broadcom confidential broadcom ? bluetooth soc may 27, 2016 ? 20707-ds206-r page 22 tab l e 5 shows the recommended crystal specifications. hid peripheral block the peripheral blocks of the bcm20707 all run from a sing le 128 khz low-power rc oscillator. the oscillator can be turned on at the request of any of the peripherals. if the peripheral is not enabled, it shall not assert its clock request line. the keyboard scanner is a special case, in that it may drop its clock request line even when enabled, and then reassert the clock request line if a keypress is detected. table 5: reference crystal electrical specifications parameter conditions minimum typical maximum unit nominal frequency ? 20 24 40 mhz oscillation mode ? fundamental ? frequency tolerance @25c ? 10 ? ppm tolerance stability over temp @0c to +70c ? 10 ? ppm equivalent series resistance ? ? ? 60 w load capacitance ? ? 12 ? pf operating temperature range ? 0 ? +70 c storage temperature range ? ?40 ? +125 c drive level ? ? ? 200 w aging ? ? ? 10 ppm/year shunt capacitance ? ? ? 2 pf
gpio ports bcm20707 preliminary data sheet broadcom confidential broadcom ? bluetooth soc may 27, 2016 ? 20707-ds206-r page 23 gpio ports 49-pin fbga package the bcm20707 49-pin fbga package has 24 general-purpose i/os (gpios). all gpios support programmable pull-ups and are capable of driving up to 8 ma at 3.3v or 4 ma at 1.8v, except p26, p27, p28, and p29, which are capable of driving up to 16 ma at 3.3v or 8 ma at 1.8v. the following gpios are available: ? bt_gpio_0/p36/p38 (triple bonded; only one of three is available) ? bt_gpio_1/p25/p32 (triple bonded; only one of three is available) ? bt_gpio_3/p27/p33 (triple bonded; only one of three is available) ? bt_clk_req/p4/p24 (triple bonded; only one of three is available) ? bt_gpio_5/p15 (dual bonded; only one of two is available) ? bt_gpio_6/p11/p26 (triple bonded; only one of three is available) ? bt_gpio_7/p30 (dual bonded; only one of two is available) ? bt_clk_req/p4/p24 (triple bonded; only one of three is available) ? i2s_pcm_in/p12 (dual bonded; only one of two is available) ? i2s_pcm_out/p3/p29/p35 (quadruple bonded; only one of four is available) ? i2s_pcm_clk/p2/p28/p37 (quadruple bonded; only one of four is available) ? i2s_ws_pcm_sync/p0/p34 (triple bonded; only one of three is available) all of these pins can be programmed as adc inputs. port 26?port 29 p[26:29] consist of four pins. all pins are capable of sinking up to 16 ma for leds. these pins also have pwm functionality, which can be used for led dimming. 36-pin wlbga package the bcm20707 36-pin wlbga package has seven gpios. all gpios support programmable pull-ups and are capable of driving up to 8 ma at 3.3v or 4 ma at 1.8v. the following gpios are available: ? bt_gpio_3/p0/lpo_in (triple bonded; only one of three is available) ? bt_gpio_5/p8/p33 (triple bonded; only one of three is available) ? i2s_di/pcm_out_p3 (triple bonded; only one of three is available) ? i2s_do/pcm_out/bt_gpio_6/p9 (quadruple bonded; only one of four is available) ? i2s_clk/pcm_clk/bt_gpio_4/p1 (quadruple bonded; only one of four is available) ? i2s_ws/pcm_sync/p11 (triple bonded; only one of three is available)
pwm bcm20707 preliminary data sheet broadcom confidential broadcom ? bluetooth soc may 27, 2016 ? 20707-ds206-r page 24 pwm the bcm20707 has four internal pwms. the pwm module consists of the following: ?pwm1?4 ? each of the four pwm channels, pwm1?4, contains the following registers: ? 10-bit initial value register (read/write) ? 10-bit toggle register (read/write) ? 10-bit pwm counter value register (read) ? pwm configuration register shared among pwm1?4 (read/write). this 12-bit register is used: ? to configure each pwm channel ? to select the clock of each pwm channel ? to change the phase of each pwm channel figure 5 shows the structure of one pwm. figure 5: pwm block diagram pwm_cfg_adr register pwm#_init_val_adr register pwm#_togg_val_adr register pwm#_cntr_adr enable cntr value is arm readable clk_sel o_flip 10'h000 10'h3ff 10 10 10 example: pwm cntr w/ pwm#_init_val = 0 (dashed line) pwm cntr w/ pwm#_init_val = x (solid line) 10'hx pwm_out pwm_togg_val_adr pwm_out
triac control bcm20707 preliminary data sheet broadcom confidential broadcom ? bluetooth soc may 27, 2016 ? 20707-ds206-r page 25 triac control the bcm20707 includes hardware support for zero-crossing detection and trigger control for up to four triacs. the bcm20707 detects zero-crossing on the ac zero detection line and uses that to provide a pulse that is offset from the zero crossing. this allows the bcm20707 to be used in dimmer applications, as well as any other applications that require a control signal that is offset from an input event. the zero-crossing hardware includes an option to suppress glitches. serial peripheral interface the bcm20707 has two independent spi interfaces. one is a master-only interface (spi_2) and the other (spi_1) can be either a master or a slave. each interface has a 64-byte transmit buffer and a 64-byte receive buffer. to support more flexibility for user applications, the bcm20707 has optional i/o ports that can be configured individually and separately for each functional pin. the bcm20707 acts as an spi master device that supports 1.8v or 3.3v spi slaves. the bcm20707 can also act as an spi slave device that supports a 1.8v or 3.3v spi master. infrared modulator the bcm20707 includes hardware support for infrared tx. the hardware can transmit both modulated and unmodulated waveforms. for modulated waveforms, hardware inserts the desired carrier frequency into all ir transmissions. ir tx can be sourced from firmware-supplied descriptors, a programmable bit, or the peripheral uart transmitter. if descriptors are used, they include ir on/off state and the duration between 1?32767 sec. the bcm20707 ir tx firmware driver inserts this information in a hardware fifo and makes sure that all descriptors are played out without a glitch due to underrun (see figure ). note: spi voltage depends on vddo; therefore, it defines the type of devices that can be supported.
infrared learning bcm20707 preliminary data sheet broadcom confidential broadcom ? bluetooth soc may 27, 2016 ? 20707-ds206-r page 26 figure 6: infrared tx infrared learning the bcm20707 includes hardware support for infrared learning. the hardware can detect both modulated and unmodulated signals. for modulated signals, the bcm20707 can detect carrier frequencies between 10 khz and 500 khz, and the duration that the signal is present or absent. the bcm20707 firmware driver supports further analysis and compression of the learned signal. the learned signal can then be played back through the bcm20707 ir tx subsystem (see figure 7 ). figure 7: infrared rx bcm20707 d1 infrared-ld vcc ir tx r1 62 r2 2.4k q1 mmbta42 bcm20707 d2 photodiode vcc ir rx
power management unit bcm20707 preliminary data sheet broadcom confidential broadcom ? bluetooth soc may 27, 2016 ? 20707-ds206-r page 27 power management unit the power management unit (pmu) provides power management features that can be invoked by software through power management registers or packet-handling in the baseband core. rf power management the bbc generates power-down control signals for the transmit path, receive path, pll, and power amplifier to the 2.4 ghz transceiver, which then processes the power-down functions accordingly. host controller power management power is automatically managed by the firmware based on input device activity. as a power-saving task, the firmware controls the disabling of the on-chip regulator when in hidoff (deep sleep) mode. bbc power management there are several low-power operations for the bbc: ? physical layer packet handling turns rf on and off dynamically within packet tx and rx. ? bluetooth-specified low-power connection mode. while in these low-power connection modes, the bcm20707 runs on the low power oscillator and wakes up after a predefined time period. the bcm20707 automatically adjusts its power dissipation based on user activity. the following power modes are supported: ? active mode ? idle mode ? sleep mode ? hidoff (deep sleep) mode the bcm20707 transitions to the next lower state after a programmable period of user inactivity. when user activity resumes, the bcm20707 immediately enters active mode. in hidoff mode, the bcm20707 baseband and core are powered off by disabling power to vddc_out and pavdd. the vddo domain remains powered up and will turn the remainder of the chip on when it detects user events. this mode minimizes chip power consumption and is intended for long periods of inactivity.
pin assignments bcm20707 preliminary data sheet broadcom confidential broadcom ? bluetooth soc may 27, 2016 ? 20707-ds206-r page 28 section 2: pin assignments pin descriptions 49-pin fbga list table 6: bcm20707 49-pin fbga list pin signal i/o power domain description radio a2 rfop i/o vdd_rf rf i/o antenna port a4 xo_in i vdd_rf crystal or reference input a5 xo_out o vdd_rf crystal oscillator output voltage regulators d1 vbat i n/a vbat input pin. this must be less than or equal to vddo. e1 vdd2p5_in i n/a 2.5v ldo input e2 vdd2p5_out o n/a 2.5v ldo output f1 vddc_out o n/a 1.2v ldo output straps g3 bt_xtal_strap_0 i vddo a strap for choosing the xtal frequencies. f2 bt_xtal_strap_1 i vddo a strap for choosing the xtal frequencies. a6 rst_n i vddo active-low reset input g7 bt_tm1 i vddo reserved: connect to ground. digital i/o f8 bt_gpio_0 i vddo bt_gpio_0/bt_dev_wake a signal from the host to the bcm20707 that the host requires attention. p36 i/o vddo gpio: p36 a/d converter input 3 quadrature: qdz0 spi_1: spi_clk (master and slave) auxiliary clock output: aclk0 external t/r switch control: ~tx_pd p38 i/o vddo gpio: p38 a/d converter input 1 spi_1: mosi (master and slave) ir_tx
pin descriptions bcm20707 preliminary data sheet broadcom confidential broadcom ? bluetooth soc may 27, 2016 ? 20707-ds206-r page 29 f7 bt_gpio_1 o vddo bt_gpio_1/bt_host_wake a signal from the bcm20707 device to the host indicating that the bluetooth device requires attention. p25 i/o vddo gpio: p25 spi_1: miso (master and slave) peripheral uart: puart_rx p32 i/o vddo gpio: p32 a/d converter input 7 quadrature: qdx0 spi_1: spi_cs (slave only) auxiliary clock output: aclk0 peripheral uart: puart_tx e4 bt_gpio_2 i vddo when high, this signal extends the xtal warm-up time for external clk requests. otherwise, it is typically connected to ground. c5 bt_gpio_3 i/o vddo general-purpose i/o p27 pwm1 i/o vddo gpio: p27 spi_1: mosi (master and slave) optical control output: qoc1 triac control 2 current: 16 ma sink p33 i/o vddo gpio: p33 a/d converter input 6 quadrature: qdx1 spi_1: mosi (slave only) auxiliary clock output: aclk1 peripheral uart: puart_rx d6 bt_gpio_4 i/o vddo general-purpose i/o: can also be configured as a gci pin. p6 i/o vddo gpio: p6 quadrature: qdz0 peripheral uart: puart_rts spi_1: spi_cs (slave only) 60hz_main lpo_in i n/a external lpo input p31 i/o vddo gpio: p31 a/d converter input 8 peripheral uart: puart_tx b5 bt_gpio_5 i/o vddo general-purpose i/o: can also be configured as a gci pin. debug uart p15 i/o vddo gpio: p15 a/d converter input 20 ir_rx 60hz_main table 6: bcm20707 49-pin fbga list (cont.) pin signal i/o power domain description
pin descriptions bcm20707 preliminary data sheet broadcom confidential broadcom ? bluetooth soc may 27, 2016 ? 20707-ds206-r page 30 b6 bt_gpio_6 i/o vddo general-purpose i/o: can also be configured as a gci pin. p11 i/o vddo gpio: p11 keyboard scan output (column): kso3 a/d converter input 24 p26 pwm0 i/o vddo gpio: p26 spi_1: spi_cs (slave only) optical control output: qoc0 triac control 1 current: 16 ma sink c6 bt_gpio_7 i/o vddo general-purpose i/o: can also be configured as a gci pin. p30 i/o vddo gpio: p30 a/d converter input 9 peripheral uart: puart_rts f5 bt_uart_rxd i vddo uart receive data f4 bt_uart_txd o vddo uart transmit data f3 bt_uart_rts_n o vddo uart request to send output g4 bt_uart_cts_n i vddo uart clear to send input g8 bt_clk_req o vddo used for shared-clock application. p4 i/o vddo gpio: p4 quadrature: qdy0 peripheral uart: puart_rx spi_1: mosi (master and slave) ir_tx p24 i/o vddo gpio: p24 spi_1: spi_clk (master and slave) peripheral uart: puart_tx d8 spi2_miso_i2c_scl i/o vddo bsc clock e8 spi2_mosi_i2c_sda i/o vddo bsc data e7 spi2_clk o vddo serial flash spi clock d7 spi2_csn o vddo serial flash active-low chip select c7 i2s_di/pcm_in i/o vddo pcm/i2s data input. i2c_sda p12 i/o vddo gpio: p12 a/d converter input 23 table 6: bcm20707 49-pin fbga list (cont.) pin signal i/o power domain description
pin descriptions bcm20707 preliminary data sheet broadcom confidential broadcom ? bluetooth soc may 27, 2016 ? 20707-ds206-r page 31 a8 i2s_do/pcm_out i/o vddo pcm/i2s data output. i2c_scl p3 i/o vddo gpio: p3 quadrature: qdx1 peripheral uart: puart_cts spi_1: spi_clk (master and slave) p29 pwm3 i/o vddo gpio: p29 optical control output: qoc3 a/d converter input 10 led2 current: 16 ma sink p35 i/o vddo gpio: p35 a/d converter input 4 quadrature: qdy1 peripheral uart: puart_cts bsc: sda b7 i2s_clk/pcm_clk i/o vddo pcm/i2s clock fp1 p2 i/o vddo gpio: p2 quadrature: qdx0 peripheral uart: puart_rx spi_1: spi_cs (slave only) spi_1: mosi (master only) p28 pwm2 i/o vddo gpio: p28 optical control output: qoc2 a/d converter input 11 led1 current: 16 ma sink p37 i/o vddo gpio: p37 a/d converter input 2 quadrature: qdz1 spi_1: miso (slave only) auxiliary clock output: aclk1 bsc: scl c8 i2s_ws/pcm_sync i/o vddo pcm sync/i2s word select p0 i/o vddo gpio: p0 a/d converter input 29 peripheral uart: puart_tx spi_1: mosi (master and slave) ir_rx 60hz_main note: not available during tm1 = 1. p34 i/o vddo gpio: p34 a/d converter input 5 quadrature: qdy0 peripheral uart: puart_rx external t/r switch control: tx_pd g2 bt_otp_3p3v_on i vddo ? if otp is used, pull this pin high. ? if otp is not used, pull this pin low. table 6: bcm20707 49-pin fbga list (cont.) pin signal i/o power domain description
pin descriptions bcm20707 preliminary data sheet broadcom confidential broadcom ? bluetooth soc may 27, 2016 ? 20707-ds206-r page 32 36-pin wlbga list jtag d5 jtag_sel i/o vddo arm jtag debug mode control. connect to gnd for all applications. supplies g1 bt_otp_vdd3p3v i n/a 3.3v otp supply voltage b4 bt_ifvdd1p2 i n/a radio if pll supply a1 bt_pavdd2p5 i n/a radio pa supply b1 bt_lnavdd1p2 i n/a radio lna supply c1 bt_vcovdd1p2 i n/a radio vco supply a3 bt_pllvdd1p2 i n/a radio rf pll supply b8, g6 vddc i n/a core logic supply g5 vddo i n/a digital i/o supply voltage a7, b2, b3, c2, d2, f6 vss ? n/a ground table 7: bcm20707 36-pin wlbga list ball signal i/o power domain description radio a1 rfop i/o vdd_rf rf i/o antenna port a5 xo_in i vdd_rf crystal or reference input a4 xo_out o vdd_rf crys tal oscillator output voltage regulators d2 vbat i n/a vbat input pin. this must be less than or equal to vddo. d1 vdd2p5_in i n/a 2.5v ldo input c1 vddc_out o n/a 1.2v ldo output straps c6 rst_n i vddo active-low reset input digital i/o d6 bt_gpio_0 i vddo bt_gpio_0/bt_dev_wake. a signal from the host to the bcm20707 indicating that the host requires attention. e6 bt_gpio_1 o vddo bt_gpio_1/bt_host_wake. a signal from the bcm20707 device to the host indicating that the bluetooth device requires attention. table 6: bcm20707 49-pin fbga list (cont.) pin signal i/o power domain description
pin descriptions bcm20707 preliminary data sheet broadcom confidential broadcom ? bluetooth soc may 27, 2016 ? 20707-ds206-r page 33 c4 bt_gpio_2 i vddo when high, this signal extends the xtal warm-up time for external clk requests. otherwise, it is typically connected to ground. f2 bt_gpio_3 i/o vddo general-purpose i/o p0 i vddo ? gpio: p0 ? a/d converter input 29 ? peripheral uart: puart_tx ? spi_1: mosi (master and slave) ?ir_rx ? 60 hz_main note: not available during tm1 = 1. lpo_in i n/a external lpo input c5 bt_gpio_5 i/o vddo general-purpose i/o p8 i vddo ? gpio: p8 ? a/d converter input 27 ? external t/r switch control: ~tx_pd p33 i vddo ? gpio: p33 ? a/d converter input 6 ? quadrature: qdx1 ? spi_1: mosi (slave only) ? auxiliary clock output: aclk1 ? peripheral uart: puart_rx f5 bt_uart_rxd i vddo uart receive data e5 bt_uart_txd o vddo uart transmit data f4 bt_uart_rts_n o vddo uart request to send output f3 bt_uart_cts_n i vddo uart clear to send input f6 bt_clk_req o vddo used for shared-clock application. f1 spi2_miso_i2c_scl i/o vddo bsc clock e3 spi2_mosi_i2c_sda i/o vddo bsc data e1 spi2_clk i/o vddo serial flash spi clock e2 spi2_csn i/o vddo serial flash active-low chip select b6 i2s_di/pcm_in i/o vddo ? pcm/i2s data input. ?i2c_sda p3 i vddo ? gpio: p3 ? quadrature: qdx1 ? peripheral uart: puart_cts ? spi_1: spi_clk (master and slave) table 7: bcm20707 36-pin wlbga list (cont.) ball signal i/o power domain description
pin descriptions bcm20707 preliminary data sheet broadcom confidential broadcom ? bluetooth soc may 27, 2016 ? 20707-ds206-r page 34 a3 i2s_do/pcm_out i/o vddo pcm/i2s data output. i2c_scl bt_gpio_6 i/o vddo general-purpose i/o p9 i vddo gpio:p9 a/d converter input 26 external t/r switch control: tx_pd b4 i2s_clk/pcm_clk i/o vddo pcm/i2s clock bt_gpio_4 i/o vddo general-purpose i/o p1 i vddo gpio:p1 a/d converter input 28 peripheral uart: puart_rts spi_1: miso (master and slave) ir_tx a6 i2s_ws/pcm_sync i/o vddo pcm sync/i2s word select p11 i vddo gpio: p11 a/d converter input 24 jtag b5 jtag_sel i/o vddo arm jtag debug mode control. connect to gnd for all applications. supplies c2 bt_ifvdd1p2 i n/a radio if pll supply b1 bt_pavdd2p5 i n/a radio pa supply b3 bt_pllvdd1p2 i n/a radio rf pll supply d5 vddc i n/a core logic supply e4 vddo i n/a digital i/o supply voltage a2, b2, c3, d3, d4 vss ? n/a ground table 7: bcm20707 36-pin wlbga list (cont.) ball signal i/o power domain description
ball map bcm20707 preliminary data sheet broadcom confidential broadcom ? bluetooth soc may 27, 2016 ? 20707-ds206-r page 35 ball map 49-pin fbga ball map figure 8: bcm20707 49-pin fbga ball map 12345678 a bt_ pavdd2p5 rfop bt_ pllvdd1p2 xo_in xo_out rst_n vss i2s_do/ pcm_out/p3/ p29/p35 a b bt_ lnavdd1p2 vss vss bt_ ifvdd1p2 bt_gpio_5/ p15 bt_gpio_6/ p11/p26 i2s_clk/ pcm_clk/ p2/p28/p37 vddc b c bt_ vcovdd1p2 vss nc nc bt_gpio_3/ p27/p33 bt_gpio_7/ p30 i2s_di/ pcm_in/p12 i2s_ws/ pcm_sync/ p0/p34 c d vbat vss nc nc jtag_sel bt_gpio_4/ p6/lpo_in/ p31 spi2_csn spi2_miso_ i2c_scl d e vdd2p5_in vdd2p5_out nc bt_gpio_2 nc nc spi2_clk spi2_mosi_ i2c_sda e f vddc_out bt_xtal_ strap_1 bt_uart_ rts_n bt_uart_ txd bt_uart_ rxd vss bt_gpio_1/ p25/p32 bt_gpio_0/ p36/p38 f g bt_otp_ vdd3p3v bt_otp_ 3p3v_on bt_xtal_ strap_0 bt_uart_ cts_n vddo vddc bt_tm1 bt_clk_req/ p4/p24 g 12345678
ball map bcm20707 preliminary data sheet broadcom confidential broadcom ? bluetooth soc may 27, 2016 ? 20707-ds206-r page 36 36-pin wlbga ball map figure 9: bcm20707 36-pin wlbga ball map 123 45 6 f spi2_miso_i2c_ scl bt_uart_cts_n bt_uart_rts_n bt_uart_rxd bt_clk_req e spi2_clk spi2_csn spi2_mosi_i2c_sda vddo d vdd2p5_in vbat vss vddc bt_gpio_0 c vddc_out bt_ifvdd1p2 p8 rst_n b bt_pavdd2p5 bt_pllvdd1p2 i2s_clk/pcm_clk jtag_sel i2s_di_pcm_in a rfop vss i2s_do/pcm_out xo_out xo_in i2s_ws/pcm_sync bt_gpio_1 bt_gpio_2 bt_gpio_3 p0 lpo_in bt_dev_wake bt_host_wake bt_gpio_5 p33 bt_uart_txd p3 bt_gpio_6 p9 bt_gpio_4 p1 p11 vss vss vss
specifications bcm20707 preliminary data sheet broadcom confidential broadcom ? bluetooth soc may 27, 2016 ? 20707-ds206-r page 37 section 3: specifications electrical characteristics ta b l e 8 shows the maximum electrical rating for voltages referenced to vdd pin. ta b l e 9 shows the power supply characteristics for the range t j = 0c to 125c. table 8: absolute maximum ratings parameter specification units minimum nominal maximum ambient temperature of operation ?30 25 85 c storage temperature ?40 ? 150 c esd tolerance hbm ?2000 ? 2000 v esd tolerance mm ?100 ? 100 v esd tolerance cdm ?500 ? 500 v latch-up ?200 ? 200 ma vddc ?0.5 ? 1.38 v vddo ?0.5 ? 3.795 v vdd_rf (excluding pa) ?0.5 ? 1.38 v vddpa ?0.5 ? 3.565 v vbat ?0.5 ? 3.795 v bt_otp_vdd3p3v ?0.5 ? 3.795 v vdd2p5_in ?0.5 ? 3.795 v table 9: power supply specifications parameter conditions min. typ. max. units vdd core ? 1.14 1.2 1.26 v vddo a a. vddo must be vbat. ? 1.62 3.3 3.6 v vddrf excluding class 1 pa 1.14 1.2 1.26 v vddpa class 1 operation 2.25 2.5 to 2.8 2.94 v vbat a ? 1.62 3.3 3.6 v bt_otp_vdd3 p3v ? 3.0 3.3 3.6 v vdd2p5_in ? 3.0 3.3 3.6 v
electrical characteristics bcm20707 preliminary data sheet broadcom confidential broadcom ? bluetooth soc may 27, 2016 ? 20707-ds206-r page 38 table 10: vddc ldo electrical specifications parameter conditions min. typical max. unit input voltage ? 1.62 3.3 3.6 v nominal output voltage ??1.2v dc accuracy accuracy at any step, including bandgap reference. ?5 ? 5 % output voltage programmability range 0.89 ? 1.34 v step size ? 30 ? mv load current ? ? ? 40 ma dropout voltage i load = 40 ma ? ? 200 mv line regulation vin from 1.62v to 3.6v, i load = 40 ma ? ? 0.2 %vo/v load regulation i load = 1 ma to 40 ma, vout = 1.2v, package + pcb r = 0.3 ? ? 0.02 0.05 %vo/ma quiescent current no load @vin = 3.3v ? 18 23 a power down current vin = 3.3v @25c ? 0.2 ? a vin = 3.6 @80c ? tbd ? ? output noise i load = 15 ma, 100 khz ? 40 nv/sqrthz i load = 15 ma, 2 mhz ? 14 nv/sqrthz psrr vin = 3.3, vout = 1.2v, i load = 40 ma 1 khz 65 ? ? db 10 khz 60 ? ? db 100 khz 55 ? ? db over current limit ?100??ma turn-on time vbat = 3.3v, bg already on, ldo off to on, co = 1 f, 90% of vout ? ? 100 s in-rush current during turn-on during start-up, co = 1 f??60ma transient performance i load = 1 ma to 15 ma and 15 ma to 1 ma in 1 s ??40mv i load = 15 ma to 40 ma and 40 ma to 15 ma in 1 s ??25? external output capacitor ceramic cap with esr 0.5 ? 0.8 1 4.7 f external input capacitor ceramic, x5r, 0402, 20%, 10v. ? 1 ? f
electrical characteristics bcm20707 preliminary data sheet broadcom confidential broadcom ? bluetooth soc may 27, 2016 ? 20707-ds206-r page 39 table 11: btldo_2p5 electrical specifications parameters conditions min typ max units input supply voltage, vin min = vo + 0.2v = 2.7v (for vo = 2.5v) dropout voltage requirement must be met under maximum load for performance specs. 3.0 3.3 3.6 v nominal output voltage, vo default = 2.5v ? 2.5 ? v output voltage programmability range accuracy at any step (including line/ load regulation), load >0.1 ma 2.2 ?5 ?2.8 5 v % dropout voltage at max load ? ? 200 mv output current ? 0.1 ? 70 ma quiescent current no load; vin = vo + 0.2v vin = vo + 0.2v ?8 660 16 700 a leakage current power-down mode. at junction temperature 85c. ?1.55 a line regulation vin from (vo + 0.2v) to 3.6v, max load ??3.5mv/v load regulation load from 1 ma to 70 ma, vin = 3.6v ??0.3mv/ma psrr vin vo + 0.2v, vo = 2.5v, co = 2.2 f, max load, 100 hz to 100 khz 20 ? ? db ldo turn-on time ldo turn-on time when rest of chip is up ? ? 150 s external output capacitor, co ceramic, x5r, 0402, (esr: 5m- 240 m ? ), 20%, 6.3v 0.7 2.2 2.64 f external input capacitor ceramic, x5r, 0402, 20%, 10v ? 1 ? f
electrical characteristics bcm20707 preliminary data sheet broadcom confidential broadcom ? bluetooth soc may 27, 2016 ? 20707-ds206-r page 40 digital i/o characteristics table 12: digital i/o characteristics characteristics value symbol minimum typical maximum unit input voltage ? low vddo = 1.8v v il ??0.6v vddo = 3.3 v il ??0.8v ? high vddo = 1.8v v ih 1.1 ? ? v vddo = 3.3v v ih 2.0 ? ? v output voltage ?low ? v ol ??0.4v ? high vddo ? 0.4v v oh ??v input current ?low ? i il ??1.0 a ?high ? i ih ??1.0 a output current ? low vddo = 3.3v, v ol = 0.4v i ol ??2.0ma ? high vddo = 3.3v, v oh = 2.9v i oh ??4.0ma vddo = 1.8v, v oh = 1.4 i oh ??tbdma input capacitance ?c in ??0.4pf note: in ta b le 1 3 , current consumption measurements are taken at vbat with the assumption that vbat is connected to vddo and vdd2p5_in.
electrical characteristics bcm20707 preliminary data sheet broadcom confidential broadcom ? bluetooth soc may 27, 2016 ? 20707-ds206-r page 41 current consumption table 13: bluetooth, ble, br and edr current consumption, class 1 mode remarks typ. unit 3dh5/3dh5 ? 37.10 ma ble ? ble connected 600 ms interval 211 a ? ble adv unconnectable 1.00 sec 176 a ? ble scan no devices present. a 1.28-sec interval with 11.25 ms scan window. 355 a dmx/dhx ? dm1/dh1 ? 32.15 ma ? dm3/dh3 ? 38.14 ma ? dm5/dh5 ? 38.46 ma hidoff deep sleep 2.69 a page scan periodic scan rate is 1.28 sec 0.486 ma receive ? 1 mbps peak current level during reception of a basic-rate packet. 26.373 ma ? edr peak current level during the reception of a 2 or 3 mbps rate packet. 26.373 ma sniff slave ? 11.25 ms ? 4.95 ma ? 22.5 ms ? 2.6 ma ? 495.00 ms based on one attempt and no timeout. 254 a transmit ? 1 mbps peak current level during the transmission of a basic-rate packet: gfsk output power = 10 dbm. 60.289 ma ? edr peak current level during the transmission of a 2 or 3 mbps rate packet. edr output power = 8 dbm. 52.485 ma note: in table 14 , current consumption measurements are taken at input of vdd2p5_in, vddo, and vbat combined (vdd2p5_in = vddo = vbat = 3.0v). table 14: bluetooth and ble current consumption, class 2 (0 dbm) mode remarks typ. unit 3dh5/3dh5 ? 31.57 ma ble ? ble adv unconnectable 1.00 sec 174 a ? ble scan no devices present. a 1.28-sec interval with 11.25 ms scan window. 368 a dmx/dhx ? dm1/dh1 ? 27.5 ma
electrical characteristics bcm20707 preliminary data sheet broadcom confidential broadcom ? bluetooth soc may 27, 2016 ? 20707-ds206-r page 42 ? dm3/dh3 ? 31.34 ma ? dm5/dh5 ? 32.36 ma table 14: bluetooth and ble current consumption, class 2 (0 dbm) mode remarks typ. unit
rf specifications bcm20707 preliminary data sheet broadcom confidential broadcom ? bluetooth soc may 27, 2016 ? 20707-ds206-r page 43 rf specifications note: ? all specifications in ta b l e 1 5 are for industrial temperatures. ? all specifications in ta b l e 1 5 are single-ended. unused inputs are left open. table 15: receiver rf specifications parameter conditions minimum typical a maximum unit general frequency range ? 2402 ? 2480 mhz rx sensitivity b gfsk, 0.1% ber, 1 mbps ? ?93.5 ? dbm le gfsk, 0.1% ber, 1 mbps ? ?96.5 ? dbm ? /4-dqpsk, 0.01% ber, 2 mbps ? ?95.5 ? dbm 8-dpsk, 0.01% ber, 3 mbps ? ?89.5 ? dbm maximum input gfsk, 1 mbps ? ? ?20 dbm maximum input ? /4-dqpsk, 8-dpsk, 2/3 mbps ? ? ?20 dbm interference performance c/i cochannel gfsk, 0.1% ber ? 9.5 11 db c/i 1 mhz adjacent channel gfsk, 0.1% ber ? ?5 0 db c/i 2 mhz adjacent channel gfsk, 0.1% ber ? ?40 ?30.0 db c/i > 3 mhz adjacent channel gfsk, 0.1% ber ? ?49 ?40.0 db c/i image channel gfsk, 0.1% ber ? ?27 ?9.0 db c/i 1 mhz adjacent to image channel gfsk, 0.1% ber ? ?37 ?20.0 db c/i cochannel ? /4-dqpsk, 0.1% ber ?1113db c/i 1 mhz adjacent channel ? /4-dqpsk, 0.1% ber ??80db c/i 2 mhz adjacent channel ? /4-dqpsk, 0.1% ber ? ?40 ?30.0 db c/i > 3 mhz adjacent channel 8-dpsk, 0.1% ber ? ?50 ?40.0 db c/i image channel ? /4-dqpsk, 0.1% ber ? ?27 ?7.0 db c/i 1 mhz adjacent to image channel ? /4-dqpsk, 0.1% ber ? ?40 ?20.0 db c/i cochannel 8-dpsk, 0.1% ber ? 17 21 db c/i 1 mhz adjacent channel 8-dpsk, 0.1% ber ? ?5 5 db c/i 2 mhz adjacent channel 8-dpsk, 0.1% ber ? ?40 ?25.0 db c/i > 3 mhz adjacent channel 8-dpsk, 0.1% ber ? ?47 ?33.0 db c/i image channel 8-dpsk, 0.1% ber ? ?20 0 db c/i 1 mhz adjacent to image channel 8-dpsk, 0.1% ber ? ?35 ?13.0 db
rf specifications bcm20707 preliminary data sheet broadcom confidential broadcom ? bluetooth soc may 27, 2016 ? 20707-ds206-r page 44 out-of-band blocking performance (cw) c 30 mhz?2000 mhz 0.1% ber ? ?10.0 ? dbm 2000?2399 mhz 0.1% ber ? ?27 ? dbm 2498?3000 mhz 0.1% ber ? ?27 ? dbm 3000 mhz?12.75 ghz 0.1% ber ? ?10.0 ? dbm out-of-band blocking performance, modulated interferer 776?764 mhz cdma ? ?10 d ?dbm 824?849 mhz cdma ? ?10 d ?dbm 1850?1910 mhz cdma ? ?23 d ?dbm 824?849 mhz edge/gsm ? ?10 d ?dbm 880?915 mhz edge/gsm ? ?10 d ?dbm 1710?1785 mhz edge/gsm ? ?23 d ?dbm 1850?1910 mhz edge/gsm ? ?23 d ?dbm 1850?1910 mhz wcdma ? ?23 d ?dbm 1920?1980 mhz wcdma ? ?23 d ?dbm intermodulation performance e bt, df = 5 mhz ? ?39.0 ? ? dbm spurious emissions f 30 mhz to 1 ghz ? ? ? ?62 dbm 1 ghz to 12.75 ghz ? ? ? ?47 dbm 65 mhz to 108 mhz fm rx ? ?147 ? dbm/hz 746 mhz to 764 mhz cdma ? ?147 ? dbm/hz 851?894 mhz cdma ? ?147 ? dbm/hz 925?960 mhz edge/gsm ? ?147 ? dbm/hz 1805?1880 mhz edge/gsm ? ?147 ? dbm/hz 1930?1990 mhz pcs ? ?147 ? dbm/hz 2110?2170 mhz wcdma ? ?147 ? dbm/hz a. typical operating conditions are 1.22v operating voltage and 25c ambient temperature. b. the receiver sensitivity is measured at ber of 0.1% on the device interface. c. meets this specification using a front-end bandpass filter. d. numbers are referred to the pin output with an external bpf filter. e. f0 = ?64 dbm bluetooth-modulated signal, f1 = ?39 dbm sine wave, f2 = ?39 dbm bluetooth-modulated signal, f0 = 2f1 ? f2, and |f2 ? f1| = n*1 mhz, where n is 3, 4, or 5. for the typical case, n = 4. f. includes baseband radiated emissions. table 15: receiver rf specifications (cont.) parameter conditions minimum typical a maximum unit
rf specifications bcm20707 preliminary data sheet broadcom confidential broadcom ? bluetooth soc may 27, 2016 ? 20707-ds206-r page 45 note: ? all specifications in ta b l e 1 6 are for industrial temperatures. ? all specifications in ta b l e 1 6 are single-ended. unused inputs are left open. table 16: transmitter rf specifications parameter conditions minimum typical maximum unit general frequency range ? 2402 ? 2480 mhz class1: gfsk tx power a a. 12 dbm output for gfsk measured with pavdd = 2.5v. ??12?dbm class1: edr tx power b b. 9 dbm output for edr measured with pavdd = 2.5v. ? ?9?dbm class 2: gfsk tx power ? ? 2 ? dbm power control step ? 2 4 8 db modulation accuracy ? /4-dqpsk frequency stability ??10?10khz ? /4-dqpsk rms devm ? ??20% ? /4-qpsk peak devm ? ??35% ? /4-dqpsk 99% devm ? ??30% 8-dpsk frequency stability ? ?10 ? 10 khz 8-dpsk rms devm ? ? ? 13 % 8-dpsk peak devm ? ? ? 25 % 8-dpsk 99% devm ? ? ? 20 % in-band spurious emissions 1.0 mhz < |m ? n| < 1.5 mhz ? ? ? ?26 dbc 1.5 mhz < |m ? n| < 2.5 mhz ? ? ? ?20 dbm |m ? n| > 2.5 mhz ? ? ? ?40 dbm out-of-band spurious emissions 30 mhz to 1 ghz ? ? ? ?36.0 c c. maximum value is the value required for bluetooth qualification. dbm 1 ghz to 12.75 ghz ? ? ? ?30.0 c, d d. meets this spec using a front-end band pass filter. dbm 1.8 ghz to 1.9 ghz ? ? ? ?47.0 dbm 5.15 ghz to 5.3 ghz ? ? ? ?47.0 dbm
rf specifications bcm20707 preliminary data sheet broadcom confidential broadcom ? bluetooth soc may 27, 2016 ? 20707-ds206-r page 46 table 17: ble rf specifications parameter conditions minimum typical maximum unit frequency range n/a 2402 ? 2480 mhz rx sense a a. dirty tx is off. gfsk, 0.1% ber, 1 mbps ? ?96.5 ? dbm tx power b b. the ble tx power can be increased to compensate for front-end losses such as bpf, diplexer, switch, etc. the output is capped at 12 dbm out. the ble tx power at the antenna port cannot exceed the 10 dbm eirp specification limit. n/a ?9?dbm mod char: delta f1 average n/a 225 255 275 khz mod char: delta f2 max c c. at least 99.9% of all delta f2 max frequency values recorded over 10 packets must be greater than 185 khz. n/a 99.9 ? ? % mod char: ratio n/a 0.8 0.95 ? %
timing and ac characteristics bcm20707 preliminary data sheet broadcom confidential broadcom ? bluetooth soc may 27, 2016 ? 20707-ds206-r page 47 timing and ac characteristics in this section, use the numbers listed in the reference column of each table to interpret the following timing diagrams. uart timing figure 10: uart timing table 18: uart timing specifications reference characteristics min. max. unit 1 delay time, uart_cts_n low to uart_txd valid ? 24 baud out cycles 2 setup time, uart_cts_n high before midpoint of stop bit ? 10 ns 3 delay time, midpoint of stop bit to uart_rts_n high ? 2 baud out cycles
timing and ac characteristics bcm20707 preliminary data sheet broadcom confidential broadcom ? bluetooth soc may 27, 2016 ? 20707-ds206-r page 48 spi timing the spi interface can be clocked up to 12 mhz. ta b l e 1 9 and figure 11 show the timing requirements when operating in spi mode 0 and 2. figure 11: spi timing, mode 0 and 2 table 19: spi mode 0 and 2 reference characteristics minimum maximum unit 1 time from slave assert spi_int to master assert spi_csn (directread) 0 ns 2 time from master assert spi_csn to slave assert spi_int (directwrite) 0 ns 3 time from master assert spi_csn to first clock edge 20 ns 4 setup time for mosi data lines 8 1 / 2 sck ns 5 hold time for mosi data lines 8 1 / 2 sck ns 6 time from last sample on mosi/miso to slave deassert spi_int 0100ns 7 time from slave deassert spi_int to master deassert spi_csn 0 ns 8 idle time between subsequent spi transactions 1 sck ns 5 spi_csn spi_int (directwrite) spi_clk (mode 0) spi_mosi - first bit spi_miso not driven first bit second bit second bit last bit last bit 3 4 6 7 8 spi_clk (mode 2) spi_int (directread) 1 2 not driven -
timing and ac characteristics bcm20707 preliminary data sheet broadcom confidential broadcom ? bluetooth soc may 27, 2016 ? 20707-ds206-r page 49 table 20 and figure 12 show the timing requirements when operating in spi mode 0 and 2. figure 12: spi timing, mode 1 and 3 table 20: spi mode 1 and 3 reference characteristics minimum maximum unit 1 time from slave assert spi_int to master assert spi_csn (directread) 0 ns 2 time from master assert spi_csn to slave assert spi_int (directwrite) 0 ns 3 time from master assert spi_csn to first clock edge 20 ns 4 setup time for mosi data lines 8 1 / 2 sck ns 5 hold time for mosi data lines 8 1 / 2 sck ns 6 time from last sample on mosi/miso to slave deassert spi_int 0 100 ns 7 time from slave deassert spi_int to master deassert spi_csn 0 ns 8 idle time between subsequent spi transactions 1 sck ns 5 spi_csn spi_int (directwrite) spi_clk (mode 1) spi_mosi - invalid bit spi_miso not driven invalid bit first bit first bit last bit last bit 3 4 6 7 8 - not driven spi_clk (mode 3) spi_int (directread) 1 2
timing and ac characteristics bcm20707 preliminary data sheet broadcom confidential broadcom ? bluetooth soc may 27, 2016 ? 20707-ds206-r page 50 bsc interface timing the specifications in ta b le 2 1 references figure 13 . figure 13: bsc interface timing diagram table 21: bsc interface timing specifications (up to 1 mhz) reference characteristics minimum maximum unit 1 clock frequency ? 100 khz 400 800 1000 2 start condition setup time 650 ? ns 3 start condition hold time 280 ? ns 4 clock low time 650 ? ns 5 clock high time 280 ? ns 6 data input hold time a a. as a transmitter, 125 ns of delay is provided to bridge the undefined region of the falling edge of scl to avoid unintended generation of start or stop conditions. 0 ? ns 7 data input setup time 100 ? ns 8 stop condition setup time 280 ? ns 9 output valid from clock ? 400 ns 10 bus free time b b. time that the cbus must be free before a new transaction can start. 650 ? ns 2 8 scl sda in sda out 7 6 1 5 10 3 4 9
timing and ac characteristics bcm20707 preliminary data sheet broadcom confidential broadcom ? bluetooth soc may 27, 2016 ? 20707-ds206-r page 51 pcm interface timing short frame sync, master mode figure 14: pcm timing diagram (short frame sync, master mode) table 22: pcm interface timing specifications (short frame sync, master mode) reference characteristics minimum typical maximum unit 1 pcm bit clock frequency ? ? 20.0 mhz 2 pcm bit clock low 20.0 ? ? ns 3 pcm bit clock high 20.0 ? ? ns 4 pcm_sync delay 0 ? 5.7 ns 5 pcm_out delay ?0.4 ? 5.6 ns 6 pcm_in setup 16.9 ? ? ns 7 pcm_in hold 25.0 ? ? ns 8 delay from rising edge of pcm_bclk during last bit period to pcm_out becoming high impedance ?0.4 ? 5.6 ns pcm_bclk pcm_sync pcm_out 1 2 3 4 5 pcm_in 6 8 high impedance 7
timing and ac characteristics bcm20707 preliminary data sheet broadcom confidential broadcom ? bluetooth soc may 27, 2016 ? 20707-ds206-r page 52 short frame sync, slave mode figure 15: pcm timing diagram (short frame sync, slave mode) table 23: pcm interface timing specifications (short frame sync, slave mode) reference characteristics minimum typical maximum unit 1 pcm bit clock frequency ? ? tbd mhz 2 pcm bit clock low tbd ? ? ns 3 pcm bit clock high tbd ? ? ns 4 pcm_sync setup tbd ? ? ns 5 pcm_sync hold tbd ? ? ns 6 pcm_out delay tbd ? tbd ns 7 pcm_in setup tbd ? ? ns 8 pcm_in hold tbd ? ? ns 9 delay from rising edge of pcm_bclk during last bit period to pcm_out becoming high impedance tbd ? tbd ns pcm_bclk pcm_sync pcm_out 1 2 3 4 5 6 pcm_in 7 9 high impedance 8
timing and ac characteristics bcm20707 preliminary data sheet broadcom confidential broadcom ? bluetooth soc may 27, 2016 ? 20707-ds206-r page 53 long frame sync, master mode figure 16: pcm timing diagram (long frame sync, master mode) table 24: pcm interface timing specifications (long frame sync, master mode) reference characteristics minimum typical maximum unit 1 pcm bit clock frequency ? ? tbd mhz 2 pcm bit clock low tbd ? ? ns 3 pcm bit clock high tbd ? ? ns 4 pcm_sync delay tbd ? tbd ns 5 pcm_out delay tbd ? tbd ns 6 pcm_in setup tbd ? ? ns 7 pcm_in hold tbd ? ? ns 8 delay from rising edge of pcm_bclk during last bit period to pcm_out becoming high impedance tbd ? tbd ns pcm_bclk pcm_sync pcm_out 1 2 3 4 5 pcm_in 6 8 high impedance 7 bit 0 bit 0 bit 1 bit 1
timing and ac characteristics bcm20707 preliminary data sheet broadcom confidential broadcom ? bluetooth soc may 27, 2016 ? 20707-ds206-r page 54 long frame sync, slave mode figure 17: pcm timing diagram (long frame sync, slave mode) table 25: pcm interface timing specifications (long frame sync, slave mode) reference characteristics minimum typical maximum unit 1 pcm bit clock frequency ? ? tbd mhz 2 pcm bit clock low tbd ? ? ns 3 pcm bit clock high tbd ? ? ns 4 pcm_sync setup tbd ? ? ns 5 pcm_sync hold tbd ? ? ns 6 pcm_out delay tbd ? tbd ns 7 pcm_in setup tbd ? ? ns 8 pcm_in hold tbd ? ? ns 9 delay from rising edge of pcm_bclk during last bit period to pcm_out becoming high impedance tbd? tbdns pcm_bclk pcm_sync pcm_out 1 2 3 4 5 6 pcm_in 7 9 high impedance 8 bit 0 bit 0 bit 1 bit 1
timing and ac characteristics bcm20707 preliminary data sheet broadcom confidential broadcom ? bluetooth soc may 27, 2016 ? 20707-ds206-r page 55 i 2 s timing the bcm20707 supports two independent i 2 s digital audio ports. the i 2 s interface supports both master and slave modes. the i 2 s signals are: ?i 2 s clock: i 2 s sck ?i 2 s word select: i 2 s ws ?i 2 s data out: i 2 s sdo ?i 2 s data in: i 2 s sdi i 2 s sck and i 2 s ws become outputs in master mode and inputs in slave mode, while i 2 s sdo always stays as an output. the channel word length is 16 bits and the data is justified so that the msb of the left-channel data is aligned with the msb of the i 2 s bus, per the i 2 s specification. the msb of each data word is transmitted one bit clock cycle after the i 2 s ws transition, synchronous with the falling edge of bit clock. left-channel data is transmitted when i 2 s ws is low, and right-channel data is transmitted when i 2 s ws is high. data bits sent by the bcm20707 are synchronized with the falling edge of i2s_sck and should be sampled by the receiver on the rising edge of i2s_ssck. the clock rate in master mode is either of the following: 48 khz x 32 bits per frame = 1.536 mhz 48 khz x 50 bits per frame = 2.400 mhz the master clock is generated from the input reference clock using a n/m clock divider. in the slave mode, any clock rate is supported to a maximum of 3.072 mhz. note: timing values specified in ta b le 2 6 are relative to high and low threshold levels.
timing and ac characteristics bcm20707 preliminary data sheet broadcom confidential broadcom ? bluetooth soc may 27, 2016 ? 20707-ds206-r page 56 table 26: timing for i 2 s transmitters and receivers transmitter receiver notes lower limit upper limit lower limit upper limit min max min max min max min max clock period t t tr ???t r ??? a a. the system clock period t must be greater than t tr and t r because both the transmitter and receiver have to be able to handle the data transfer rate. master mode: clock generated by transmitter or receiver high t hc 0.35t tr ? ? ? 0.35t tr ??? b b. at all data rates in master mode, the transmitter or receiver generates a clock signal with a fixed mark/space ratio. for this reason, t hc and t lc are specified with respect to t. lowt lc 0.35t tr ? ? ? 0.35t tr ??? b slave mode: clock accepted by transmitter or receiver high t hc ?0.35t tr ???0.35t tr ?? c c. in slave mode, the transmitter and receiver need a clock signal with minimum high and low periods so that they can detect the signal. so long as the minimum periods are greater than 0.35t r , any clock that meets the requirements can be used. low t lc ?0.35t tr ???0.35t tr ?? c rise time t rc ? ? 0.15t tr ??? ? d d. because the delay (t dtr ) and the maximum transmitter speed (defined by t tr ) are related, a fast transmitter driven by a slow clock edge can result in t dtr not exceeding t rc which means t htr becomes zero or negative. therefore, the transmitter has to guarantee that t htr is greater than or equal to zero, so long as the clock rise time t rc is not more than t rcmax , where t rcmax is not less than 0.15t tr . transmitter delay t dtr ???0.8t???? e e. to allow data to be clocked out on a falling edge, the delay is specified with respect to the rising edge of the clock signal and t, always giving the receiver sufficient setup time. hold time t htr 0??????? d receiver setup time t sr ?????0.2t r ?? f f. the data setup and hold time must not be less than the specified receiver setup and hold time. hold time t hr ?????0?? f note: the time periods specified in figure 18 on page 57 and figure 19 on page 57 are defined by the transmitter speed. the receiver specifications must match transmitter performance.
timing and ac characteristics bcm20707 preliminary data sheet broadcom confidential broadcom ? bluetooth soc may 27, 2016 ? 20707-ds206-r page 57 figure 18: i 2 s transmitter timing figure 19: i 2 s receiver timing sd and ws sck v l = 0.8v t lc >0.35t t rc * t hc >0.35t t v h = 2.0v t htr >0 t otr <0.8t t = clock period t tr = minimum allowed clock period for transmitter t = t tr * t rc is only relevant for transmitters in slave mode. sd and ws sck v l = 0.8v t lc >0.35t t hc >0.35 t v h = 2.0v t hr >0 t sr >0.2t t = clock period t r = minimum allowed clock period for transmitter t > t r
mechanical information bcm20707 preliminary data sheet broadcom confidential broadcom ? bluetooth soc may 27, 2016 ? 20707-ds206-r page 58 section 4: mechan ical information package diagrams figure 20: bcm20707 49-pin fbga package (4.5 mm x 4.0 mm)
package diagrams bcm20707 preliminary data sheet broadcom confidential broadcom ? bluetooth soc may 27, 2016 ? 20707-ds206-r page 59 figure 21: bcm20707 36-pin wlbga package (2.8 mm x 2.5 mm)
tape reel and packaging specifications bcm20707 preliminary data sheet broadcom confidential broadcom ? bluetooth soc may 27, 2016 ? 20707-ds206-r page 60 tape reel and packaging specifications the top-left corner of the bcm20707 package is situated near the sprocket holes, as shown in figure 22 . figure 22: pin 1 orientation table 27: bcm20707 tape reel specifications parameter value quantity per reel 2500 reel diameter 13 inches hub diameter 4 inches tape width 16 mm tape pitch 12 mm pin 1: top left corner of package toward sprocket holes
ordering information bcm20707 preliminary data sheet broadcom confidential broadcom ? bluetooth soc may 27, 2016 ? 20707-ds206-r page 61 section 5: ordering information table 28: ordering information part number package bcm20707ua2kffb4g 49-pin fbga bcm20707ua2ekubgt 36-pin wlbga
acronyms and abbreviations bcm20707 preliminary data sheet broadcom confidential broadcom ? bluetooth soc may 27, 2016 ? 20707-ds206-r page 62 appendix a: acronyms and abbreviations the following list of acronyms and abbreviations may appear in this document. term description adc analog-to-digital converter afh adaptive frequency hopping ahb advanced high-performance bus apb advanced peripheral bus apu audio processing unit arm7tdmi-s? acorn risc machine 7 thumb instruction, debugger, multiplier, ice, synthesizable bsc broadcom serial control btc bluetooth controller coex coexistence dfu device firmware update dma direct memory access ebi external bus interface hci host control interface hv high voltage idc initial digital calibration if intermediate frequency irq interrupt request jtag joint test action group lcu link control unit ldo low dropout lhl lean high land lpo low power oscillator lv logicvision? mia multiple interface agent pcm pulse code modulation pll phase locked loop pmu power management unit por power-on reset pwm pulse width modulation qd quadrature decoder ram random access memory rc oscillator a resistor-capacitor oscillator is a circuit composed of an amplifier, which provides the output signal, and a resistor-capacitor network, which controls the frequency of the signal. rf radio frequency rom read-only memory
acronyms and abbreviations bcm20707 preliminary data sheet broadcom confidential broadcom ? bluetooth soc may 27, 2016 ? 20707-ds206-r page 63 rx/tx receive, transmit spi serial peripheral interface sw software uart universal asynchronous receiver/transmitter upi -processor interface wd watchdog term description
broadcom web: www.broadcom.com corporate headquarters: san jose, ca ? 2016 by broadcom. all rights reserved. 20707-ds206-r may 27, 2016 broadcom ? reserves the right to make changes without further notice to any products or data herein to improve reliability, function, or design. information furnished by broadcom is believed to be accurate and reliable. however, broadcom does not assume any liability arising out of the application or use of this information, nor the application or use of any product or circuit described herei n, neither does it convey any license under its patent rights nor the rights of others. bcm20707 preliminary data sheet

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Part #	Manufacturer	Description	Price	BuyNow Qty.
CYW20707VA1PKWBGT 2015-BCM20707VA1PKWBGTCT-ND	Infineon Technologies AG	IC RF TXRX+MCU BLE 36WLBGA	5000: USD1.2721 1: USD1.27	39306
CYW20707VA1PKWBGT 2832-CYW20707VA1PKWBGTTR-ND	Infineon Technologies AG	IC RF TXRX+MCU BLE 36WLBGA	200: USD2.87	25222
CYW20707VA1PKWBGT BCM20707VA1PKWBGT-ND	Infineon Technologies AG	IC RF TXRX+MCU BLE 36WLBGA	5000: USD3.25725	0

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CYW20707VA1PKWBGT CYW20707VA1PKWBGT	Infineon Technologies AG	BLUE TOOTH DUAL MODE - Tape and Reel (Alt: CYW20707VA1PKWBGT)	24000: USD2.666 12000: USD2.752 2400: USD2.838 1200: USD2.924 470: USD3.01 240: USD3.139 233: USD3.225	0

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CYW20707VA1PKWBG	Infineon Technologies AG	Stock		25222
CYW20707VA1PKWBGT	Cypress Semiconductor	Stock, ship today	1: USD2.15	25222

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