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1 NN30195A ver. ceb z high-speed response dc-dc step down regulator circuit that employs hy steretic control system z two 25 m ? (typ.) mosfets for high efficiency at 6 a z skip (discontinuous) mode for light load efficiency z up to 6 a output current z input voltagerange : avin : 4.5 v to 5.6 v pvin : 2.9 v to 5.6 v output voltage range : 0.6 v to 3.5 v selectable switching frequency 500 khz , 1 mhz , 2 mhz z adjustable soft start z low operating and standby quiescent current z open drain power good indication for output over , under voltage z built-in under voltage lockout (uvlo), thermal shut down (tsd), over voltage detection (ovd), under voltage detection (uvd), over current protection (ocp), short circuit protection (scp) z hqfn024-a3-0404a ( size : 4 mm x 4 mm, 0.5 mm pitch ), 24pin plastic quad flat non-leaded package heat slug down (qfn type) high current distributed power systems such as ? hdds (hard disk drives) ? ssds (solid state drives) ? pcs ? game consoles ? servers ? security cameras ? network tvs ? home appliances ? oa equipment etc. simplified application applications features description vin = 4.5 v to 5.6 v, 6 a synchronous dc-dc step down regulator comprising of controller ic and power mosfet NN30195A is a synchronous dc-dc step down regulator (1-ch) comprising of a controller ic and two power mosfets and employs the hysteretic control system. by this system, when load current changes suddenly, it responds at high speed and minimizes the changes of output voltage. since it is possible to use capacitors with small capacitance and it is unnecessary to add external parts for system phase compensation, this ic realizes downsizing of set and reducing in the number of external parts. output voltage is adjustable by user. maximum current is 6 a. notes) this application circuit is an example. the operation of mass production set is not guaranteed. you should perform enough evaluation and verification on the design of mass production set. you are fully responsible for the incorporation of the above application circuit and information in the design of your equipment. vfb vreg ctl1 ctl2 pgood bst lx pgnd agnd ss avin pvin dcdcout 1.8v vreg avin NN30195A pvin condition ) v in = 5.0 v, vout = 1.0 v , 1.2 v , 1.8 v , 3.3 v, lo = 1 h, co = 44 f (22 f x 2), frequency = 500 khz vout 1 h 22 f 10 f 100k ? 22 f x 2 0.1 f 2k ? 1k ? 1 f 10nf frequency = 500 khz 0 10 20 30 40 50 60 70 80 90 100 0.001 0.010 0.100 1.000 10.000 iout (a) efficiency (%) fccm/ vo= 1.0v fccm/ vo= 1.2v fccm/ vo= 1.8v fccm/ vo= 3.3v skip/ vo= 1.0v skip/ vo= 1.2v skip/ vo= 1.8v skip/ vo= 3.3v efficiency curve publication date: october 2012
2 NN30195A ver. ceb absolute maximum ratings *1, *3 v -0.3 to ( v in + 0.3 ) lx,pgood output voltage range *1, *3 v -0.3 to ( v in + 0.3 ) mode,ctl1,ctl2,vfb, vout input voltage range ? kv 2 hbm (human body model) esd *2 c ? 40 to + 150 t j operating junction temperature *2 c ? 55 to + 150 t stg storage temperature notes unit rating symbol parameter *2 c ? 40 to + 85 t opr operating free-air temperature *1 v 6.0 v in supply voltage notes) do not apply external currents and voltages to any pin not specifically mentioned. this product may sustain permanent damage if subjected to conditions higher than the above stated absolute maximum rating. this rating is the maximum rating and device operating at this range is not guaranteeable as it is higher than our stated recommended operating range. when subjected under the absolute maximum rating for a long time, the reliability of the product may be affected. *1:the values under the condition not exceeding the above absolute maximum ratings and the power dissipation. v in is voltage for avin, pvin. *2:except for the power dissipation, operating ambient temperature, and storage temperature, all ratings are for ta = 25 c. *3:( v in + 0.3 ) v must not exceed 6 v. *1 notes 1.06 w 2.03 w 61.6 c / w 24 pin plastic quad flat non-leaded package heat slug down (qfn type) pd ( ta = 85 c) pd ( ta = 25 c) ja package power dissipation rating note). for the actual usage, please refer to the pd-ta characteristics diagram in the package specification, follow the power s upply voltage, load and ambient temperature conditions to ensure that there is enough margin and the thermal design does not exceed the allowable value. *1:glass epoxy substrate ( 4 layers ) [ glass-epoxy: 50 x 50 x 0.8 t ( mm ) ] die pad exposed , soldered. caution although this has limited built-in esd protection circuit, but permanent damage may occur on it. therefore, proper esd precautions are recommended to avoid electrostatic damage to the mos gates
3 NN30195A ver. ceb recommended operating conditions note) do not apply external currents and voltages to any pin not specifically mentioned. voltage values, unless otherwise specified, are with respect to gnd. gnd is voltage for agnd, pgnd. agnd = pgnd v in is voltage for avin, pvin. avin = pvin. the values under the condition not exceeding the above absolute maximum ratings and the power dissipation. *1 : ( v in + 0.3 ) v must not be exceeded 6 v. *1 v v in + 0.3 ? ?0.3 pgood v v in + 0.3 ? ?0.3 mode *1 v v in + 0.3 ? ?0.3 lx output voltage range ? v 5.6 5.0 2.9 pvin *1 v v in + 0.3 ? ?0.3 ctl1 ? 5.0 typ. *1 input voltage range *1 v v in + 0.3 ?0.3 ctl2 4.5 min. ? v 5.6 avin supply voltage range notes unit max. pin name parameter
4 NN30195A ver. ceb ? v ? ? 1.5 ? v ctl1h ctl1 pin high-level input voltage ? a 10.0 3.5 ? ctl1 = 5 v i leakctl1 ctl1 pin leak current ? v 0.3 ? ? ? v ctl2l ctl2 pin low-level input voltage ? v ? ? 1.5 ? v ctl2h ctl2 pin high-level input voltage ? a 10.0 3.5 ? ctl2 = 5 v i leakctl2 ctl2 pin leak current ? v vreg 0.3 ? ? ? v model mode pin low-level input voltage ? v 0.3 ? ? ? v ctl1l ctl1 pin low-level input voltage ? v ? ? vreg 0.7 ? v modeh mode pin high-level input voltage vreg logic pin current consumption ? a 2 ? ? ctl1 = ctl2 = 0 v i vddstb consumption current at standby ? a 10.0 3.5 ? mode = 5 v i leakmd mode pin leak current ? mv 50 ? ? i vreg = 0 a to ? 6 ma v regdo vreg drop out voltage ? v 2.75 2.55 2.35 ivreg = ? 6 ma v regout vreg output voltage ? a 700 300 ? ctl1 = 5 v, i out = 0 a rfb1 = 1.0 k rfb2 = 1.5 k i vddact consumption current at active limits typ unit max note min condition symbol parameter elecrtrical characteristics co = 22 f x 2, lo= 1 h, vout setting = 1.0 v, v in = av in = pv in = 5 v, switching frequency = 1 mhz, mode = low (skip), t a = 25 c 2 c unless otherwise noted.
5 NN30195A ver. ceb ? ? 20 15 ? ctl1 = ctl2 = 0 v rpg pgood on resistance ? % 8 5 2 pgood : low to high v hyspg2 pgood hysteresis 2 (vfb ratio for ovd release) ? % 122 115 108 pgood : high to low v thpg2 pgood threshold 2 (vfb ratio for ovd detect) ? % 8 5 2 pgood : low to high v hyspg1 pgood hysteresis 1 (vfb ratio for uvd release) ? % 92 85 78 pgood : high to low v thpg1 pgood threshold 1 (vfb ratio for uvd detect) pgood ? v 3.75 3.50 3.25 av in = 0 v to 5 v v uvlormv2 avin uvlo recover voltage 2 ? v 3.05 2.80 2.55 pv in = 0 v to 5 v v uvlormv1 pvin uvlo recover voltage 1 ? v 2.85 2.60 2.35 pv in = 5 v to 0 v v uvlodet1 pvin uvlo start voltage 1 ? v 3.65 3.40 3.15 av in = 5 v to 0 v v uvlodet2 avin uvlo start voltage 2 ? a 1 ? ?1 vfb = 0 v i leakfb1 vfb pin leak current 1 under voltage lock out vfb ? a 1 ? ?1 vfb = 3.6 v i leakfb2 vfb pin leak current 2 ? v 0.606 0.600 0.594 ? v fbts vfb comparator threshold limits typ unit max note min condition symbol parameter elecrtrical characteristics ( continued ) co = 22 f x 2, lo= 1 h, vout setting = 1.0 v, v in = av in = pv in = 5 v, switching frequency = 1 mhz, mode = low (skip), t a = 25 c 2 c unless otherwise noted.
6 NN30195A ver. ceb *1 dc-dc ? %/v 1.5 0.5 ? pvin = 4.5 v to 5.6 v i out = ? 3 a dd regin dc-dc line regulation *1 % ? 3 ? i out = ? 10 ma to ? 6 a dd regld dc-dc load regulation *1 % ? 70 ? i out = ? 10 ma dd eff1 dc-dc efficiency 1 *1 % ? 81 ? i out = ? 3 a dd eff2 dc-dc efficiency 2 *1 mv [p-p] ? 25 ? i out = ? 20 ma dd vrpl1 dc-dc output ripple voltage 1 *1 mv [p-p] ? 10 ? i out = ? 3 a dd vrpl2 dc-dc output ripple voltage 2 *1 mv ? 20 ? i out = ? 100 ma ? ?3 a t = 0.5 a / s dd dvac dc-dc load transient response ? m ? 50 25 ? vgs = 5 v dd ronh dc-dc high side mos on resistance ? m ? 50 25 ? vgs = 5 v dd ronl dc-dc low side mos on resistance v ? 1.4 ? dv = pvin ? vout dv min input and out put voltage difference limits typ unit max note min condition symbol parameter elecrtrical characteristics ( continued ) co = 22 f x 2, lo= 1 h, vout setting = 1.0 v, v in = av in = pv in = 5 v, switching frequency = 1 mhz, mode = low (skip), t a = 25 c 2 c unless otherwise noted. *1 typical value checked by design.
7 NN30195A ver. ceb ? % 85 70 55 fb = 0.6 v to 0.0 v dd shpth dc-dc output gnd short protection threshold *1 a ? 9.0 ? ? dd ilmt dc-dc output current limit protection ? k ? 4 2 ? ctl1 = ctl2 = 0 v r ssdis ss discharge resistance (shut-down) ? a ? ?2 ?4 v ss = 0.3 v i sschg ss charge current *1 khz ? 2000 ? i out = ? 6 a ctl1 = 5 v ctl2 = 5 v dd fsw3 dc-dc switching frequency 3 soft-start timing *1 *1 switching frequency adjustment khz ? 500 ? i out = ? 6 a ctl1 = 0 v ctl2 = 5 v dd fsw1 dc-dc switching frequency 1 khz ? 1000 ? i out = ? 6 a ctl1 = 5 v ctl2 = 0 v dd fsw2 dc-dc switching frequency 2 limits typ unit max note min condition symbol parameter elecrtrical characteristics ( continued ) co = 22 f x 2, lo= 1 h, vout setting = 1.0 v, v in = av in = pv in = 5 v, switching frequency = 1 mhz, mode = low (skip), t a = 25 c 2 c unless otherwise noted. *1 typical value checked by design.
8 NN30195A ver. ceb pin functions supply input pin for high side fet gate driver output bst 21 power supply pin for power mosfet power supply pvin 22 23 24 ground pin for radiation of heat ground agnd 25 power supply pin for radiation of heat power supply pvin 26 soft start capacitor connect pin output ss 17 power supply pin power supply avin 18 power good open drain pin output pgood 19 ground pin ground agnd 20 power mosfet output pin for radiation of heat output lx 27 power mosfet output pin output lx 1 output voltage sense pin input vout 16 comparator negative input pin input vfb 15 ldo output pin (power supply for internal control circuit) output vreg 14 on/off control pin 2 / frequency selection pin input ctl2 13 5 4 2 ground pin ground agnd 11 skip / fccm mode select pin input mode 10 9 8 ground pin for power mosfet ground pgnd 7 6 3 on/off control pin 1 / frequency selection pin input ctl1 12 description type pin name pin no. pin configuration top view 16 7 10 12 13 18 19 20 24 26 pvin 25 agnd 27 lx 21 22 23 17 16 15 14 11 8 9 5 4 3 2 pgnd lx mode agnd ctl1 ctl2 vreg vfb vout ss avin pgood agnd bst pvin notes) concerning detail about pin description, please refer to operation and application information section.
9 NN30195A ver. ceb functional block diagram notes) this block diagram is for explaining functions. part of the block diagram may be omitted, or it may be simplified. lgo lpd hgd hpd control logic osc ctl1c vreg ss fccm/skip ton timer + comp toff timer + comp on cmp ref 0.6v aux timer uvlo scp ocp tsd vref soft-start soft-start vreg:2.55v vin ss avin pvin pgood bst lx pgnd agnd mode ctl2 vfb vout vreg ctl1 bgr vref on/off bs sw coast fault 0.6v +10% 0.6v +10% avin + - + - - + + current sense fsel fsel 22,23,24,26 19 21 1,2,3,4,5,6,27 7,8,9 11,20,25 10 15 16 14 12 13 17 18
10 NN30195A ver. ceb operation figure : ovd and uvd operation 115 % 110 % 90 % 85 % 0.6 v 0.6 v vfb pgood 1 ms 1 ms note: pgood pin is pulled up to vreg pin 1) 2) 3) 4) fccm high skip low mode mode pin (2).switching frequency setting the ic can operate at three different frequency : 1000 khz, 500 khz and 2000 khz. the switching frequency can be set by ctl1 & ctl2 pin as follows. 1000 low high high low low ctl1 pin 0 ( dcdc off) low 2000 500 frequency [khz] high high ctl2 pin 2. pin setting (1).operating mode setting the ic can operate at two different modes : skip mode and forced continuous conduction mode (fccm). in skip mode, the ic is working under pulse skipping mechanism to improve efficiency at light load condition. in fccm mode, the ic is working at fixed frequency to avoid emi issues. the operating mode can be set by mode pin as follows. note) the characteristics listed below are reference values derived from the design of the ic and are not guaranteed. (3).thermal shut down (tsd) when the ic internal temperature becomes more than about 140 c, tsd operates and dcdc turns off. (2).over voltage detection (ovd) and under voltage detection (uvd) 1).the nmos connected to the pgood pin turns on when the output voltage rises and the vfb pin voltage reaches 115 % of its set voltage (0.6 v). 2).after (1) above, the nmos connected to the pgood pin is turned off after 1 ms when the output voltage drops and the vfb pin voltag e reaches 110 % of its set voltage (0.6 v). 3).the nmos connected to the pgood pin turns on when the output voltage drops and the vfb pin voltage reaches 85 % of its set voltage (0.6 v). 4).after (3) above, the nmos connected to the pgood pin is turned off after 1 ms when the output voltage drops and the vfb pin voltage reaches 90 % of its set voltage (0.6 v). 1. protection ( 1).output over-current protection (ocp) function and short-circuit protection (scp) function 1) the over current protecti on is activated at about 9 a (typ.) during the ocp, the output voltage continues to drop at the specified current. 2) the short-circuit protecti on function is implemented when the output voltage decreases and the vfb pin reaches to about 70 % of the set voltage of 0.6 v. 3) the scp operates intermittently at 2 ms-on, 16 ms off intervals. figure : ocp and scp operation output current [a] pendency characteristics (ground short protection detection about 70% of vout ) intermittent operation area over current protection ( typ : 9 a ) ground short protection hysteresis output voltage [v] about 1.5 a 1) 2) 3) 6.1 a to 13 a
11 NN30195A ver. ceb operation ( continued ) 3. output voltage setting the output voltage can be set by external resistance of fb pin, and its calculation is as follows. (vin = 5 v, iout = 0 a, fccm, fsw = 1 mhz) below resistors are recommended for following popular output voltage. vout = ( 1 + ) 0.6 rfb1 rfb2 1.5 k 1.0 k 1.0 1.0 k 1.0 k rfb2 [ ? ] 2.0 k 1.8 4.5 k 3.3 rfb1 [ ? ] vout [v] vout rfb1 vfb ( 0.6 v ) rfb2 note) the characteristics listed below are reference values derived from the design of the ic and are not guaranteed. note: rfb2 can be set to a maximum value of 10 k ? . a larger fbr2 value will be more susceptible to noise. vfb comparator threshold is adjusted to 1 %, but the actual output voltage accuracy becomes more than 1 % due to the influence from the circuits other than vfb comparator. in the case of vout setting = 1.0 v, the actual output voltage accuracy becomes 2 %. (vin = 5.0 v, iout = 0 a, fccm, fsw = 1 mhz). 4. soft start setting soft start function maintains the smooth control of the output voltage during start up by adjusting soft start time. when the ctl1 or ctl2 (or both) pin becomes high, the current (2 a) begin to charge toward the external capacitor (css) of ss pin, and the voltage of ss pin increases straightly. when css is set at 10 nf, soft-start time is approximately 3 ms. css time start soft = 2 6 . 0 (sec) because the voltage of fb pin is controlled by the voltage of ss pin during star t up, the voltage of fb increase straightly to the regulation voltage (0.6 v) together with the voltage of ss pin and keep the regulation voltage after tha t. on the other hand, the voltage of ss pin increase to about 2.8 v and keep the voltage. the calculation of soft start time is as follows. ctl1 or ctl2 ss vout vfb 0.6 v soft start time (s) figure : soft start operation uvlo vreg 2.2 v 2.55 v 5. power on / off sequence (1) when the ctl1/2 pin is set to ?high? after the vin settles, uvlo is released if vin exceeds its threshold, then the vreg starts up. (2) when vreg voltage exceeds its threshold, the soft start sequence is enabled. the capacitor connected to the ss pin begins to charge and the ss pin voltage increases linearly. (3) the vout pin (dcdc ou tput) voltage increases at the same rate as the ss pin. normal operation begins after the vout pin reaches the set voltage. (4) when the ctl1/2 pin is set to ?low?, vreg and uvlo stop operation. the vout pin / ss pin voltage starts to drop and the vout pin discharge by internal mosfet (r = 50 ? ). note: the ss pin capacitor should be discharged completely before restarting the startup sequence. an incomplete discharge process might result in an overshoot of the output voltage.
12 NN30195A ver. ceb note) the characteristics listed below are reference values derived from the design of the ic and are not guaranteed. operation ( continued ) v in uvlo ss vout vreg 2.2 v (1) (2) (3) (4) vfb 0.6 v ctl1 / 2 pgood 2 delay time (s) = 0.2 css + 1.25 m figure : power on/off sequence 2 soft start time (s) = 0.6 css 2.55 v 6. inductor and output capacitor setting il io ic 0 0 eo S il/2 ton t=1/f vo S il/2 vrpl q2 q1 vo(eo) lo co il ei io ic rc given the desired input and ou tput voltages, the inductor value and operating frequency determine the ripple current. 2 il iox = () f lo ei eo ei eo il ? ? ? ? = highest efficiency operation is obtained at low frequency with small ripple current. however, achieving this requires a large inductor. there is a trade-off among component size, efficiency and operating frequency. a reasonable starting point is to choose a ripple current that is about 40 % of iout(max). the largest ripple current occurs at the highes t vin. to guarantee that ripple current does not exce ed a specified maximum, the inductance should be chosen according to: () ei_max ei @ 2 = ? ? ? ? f iox ei eo ei eo lo and its maximum current rating is ei_max) ei (@ 2 io_max _max = + = il il the selection of cout is primarily determined by the esr (rc) required to minimize voltage ripple and load transients. the output ri pple vrpl is approximately bounded by: () 2 2 2 8 2 8 2 f co lo ei eo ei eo lo rc co ei f co il lo rc co ei vob vop vrpl ? ? ? ? ? + ? ? = ? + ? ? = ? = from the above equation, to achieve desired output ripple, low esr ceramic capacitors are recommended, and its required rms current rating is: ei_max) ei (@ 3 2 (rms)_max = = il ic
13 NN30195A ver. ceb vin (pin) vref (int) 1.23v 0.75v uvlo (int) clk (int) vfb (pin) pog (pin) vreg (pin) 2.2v 90% soft-start power good flap ctl1/2 (pin) 2.55v 0.6v osc stop 2.25ms 2.4ms 75us 1.23v vin osc stop power good flap vin (pin) vref (int) uvlo (int) clk (int) vfb (pin) pog (pin) vreg (pin) ctl1/2 (pin) 3.5v 3.4v 2.2v 2.55v soft-start 90% 0.6v 0.75v 2.25ms 2.4ms 75us 7.start / stop sequence start / stop control of NN30195A is performed by ctl1 pin. the start / stop sequence is as follows. (css=10 nf) note) all values given in the above figure are typical values. start / stop sequence in case that ctl1/ 2 pin is connected to power supply (v in ) is as follows. (css=10 nf) operation ( continued )
14 NN30195A ver. ceb typical characteristics curves (1) output ripple voltage condition : vin=5v,vout = 1.0v,frequency = 1000khz,skip mode i load = 0a i load = 1a i load = 3a i load = 6a vout lx vout lx vout lx vout lx
15 NN30195A ver. ceb typical characteristics curves ( continued ) (1) output ripple voltage ( continued ) condition : vin=5v,vout = 1.0v,frequency = 1000khz,fccm mode i load = 0a i load = 1a i load = 3a i load = 6a vout lx vout lx vout lx vout lx
16 NN30195A ver. ceb typical characteristics curves ( continued ) (2) load transient condition : vin = 5.0 v, vout = 1.0 v, frequency = 1 mhz, iout = 10 ma ?? 6 a ( 0.5 a / s ) skip mode fccm mode (3) efficiency condition : vin = 5.0 v, vout = 1.0 v, frequency = 1 mhz, iout = 2.5 a ?? 5 a ( 0.15 a / s ) skip mode fccm mode condition : vin = 5 v, vout = 1.05 v / 1.2 v / 1.8v / 3.3v / 5.0 v, l = 4.7 h, cout = 66 f (22 f x 3), frequency = 250 khz condition : vin = 5 v, vout = 1.05 v / 1.2 v / 1.8v / 3.3v / 5.0 v, l = 1 h, cout = 66 f (22 f x 3), frequency = 750khz time (100 us/div) vout (50 mv/div) iout (2 a/div) 13.9mv 13.7mv time (100 us/div) vout (50 mv/div) iout (2 a/div) 11.5mv 14.1mv time (100 us/div) vout (50 mv/div) iout (5 a/div) 44.1mv 30.4mv time (100 us/div) vout (50 mv/div) iout (5 a/div) 27.1mv 35.1mv frequency = 500 khz 0 10 20 30 40 50 60 70 80 90 100 0.001 0.010 0.100 1.000 10.000 iout (a) efficiency (%) fccm/ vo= 1.0v fccm/ vo= 1.2v fccm/ vo= 1.8v fccm/ vo= 3.3v skip/ vo= 1.0v skip/ vo= 1.2v skip/ vo= 1.8v skip/ vo= 3.3v frequency = 1000 khz 0 10 20 30 40 50 60 70 80 90 100 0.001 0.010 0.100 1.000 10.000 iout (a) efficiency (%) fccm/ vo= 1.0v fccm/ vo= 1.2v fccm/ vo= 1.8v fccm/ vo= 3.3v skip/ vo= 1.0v skip/ vo= 1.2v skip/ vo= 1.8v skip/ vo= 3.3v
17 NN30195A ver. ceb (4) load regulation (5) line regulation condition : vin = 5.0 v, vout = 1.0 v, frequency = 500 khz condition : vin = 5.0 v, vout = 1.0 v, frequency = 1 mhz condition : vin = 5 v, vout = 1.0 v, frequency = 1 mhz, iout = 1.5 a typical characteristics curves ( continued ) load regulation_f = 500khz (skip mode) 0.900 0.920 0.940 0.960 0.980 1.000 1.020 1.040 1.060 1.080 1.100 0.00 1.00 2.00 3.00 4.00 5.00 6.00 iout (a) vout (v) load regulation_f = 500khz (fccm mode) 0.900 0.920 0.940 0.960 0.980 1.000 1.020 1.040 1.060 1.080 1.100 0.00 1.00 2.00 3.00 4.00 5.00 6.00 iout (a) vout (v) load regulation_f = 1000khz (skip mode) 0.900 0.920 0.940 0.960 0.980 1.000 1.020 1.040 1.060 1.080 1.100 0.00 1.00 2.00 3.00 4.00 5.00 6.00 iout (a) vout (v) load regulation_f = 1000khz (fccm mode) 0.900 0.920 0.940 0.960 0.980 1.000 1.020 1.040 1.060 1.080 1.100 0.00 1.00 2.00 3.00 4.00 5.00 6.00 iout (a) vout (v) line regulation_f = 1000khz (skip mode) 0.0 0.2 0.4 0.6 0.8 1.0 1.2 0.0 1.0 2.0 3.0 4.0 5.0 vin (v) vout (v) line regulation_f = 1000khz (fccm mode) 0.0 0.2 0.4 0.6 0.8 1.0 1.2 0.0 1.0 2.0 3.0 4.0 5.0 vin (v) vout (v)
18 NN30195A ver. ceb (6) start/shut down condition : vin = 5.0 v, vout = 1.0 v, frequency = 1 mhz, skip mode, iout = 0 a condition : vin = 5.0 v, vout = 1.0 v, frequency = 1 mhz, fccm mode, iout = 0 a condition : vin = 5.0 v, vout = 1.0 v, frequency = 1 mhz, skip mode, rload = 0.5 ? condition : vin = 5.0 v, vout = 1.0 v, frequency = 1 mhz, fccm mode, rload = 0.5 ? typical characteristics curves ( continued ) en (2 v/div) vout (0.5 v/div) ss (2 v/div) en (2 v/div) vout (0.5 v/div) ss (2 v/div) time (10 ms/div) time (10 ms/div) en (2 v/div) vout (0.5 v/div) ss (2 v/div) en (2 v/div) vout (0.5 v/div) ss (2 v/div) time (10 ms/div) time (10 ms/div) en (2 v/div) vout (0.5 v/div) ss (2 v/div) en (2 v/div) vout (0.5 v/div) ss (2 v/div) time (10 ms/div) time (10 ms/div) en (2 v/div) vout (0.5 v/div) ss (2 v/div) en (2 v/div) vout (0.5 v/div) ss (2 v/div) time (10 ms/div) time (10 ms/div)
19 NN30195A ver. ceb (7) short current protection condition : vin = 5.0 v, vout = 1.0 v, frequency = 1 mhz skip mode fccm mode (8) switching frequency typical characteristics curves ( continued ) condition : vin = 5.0 v, vout = 1.0 v, frequency = 1 mhz, iout = 10 ma ~ 10 a condition : vout = 1.0 v, frequency = 1 mhz, iout = 3 a lx (5 v/div) vout (1 v/div) ss (2 v/div) iout (10 a/div) time (10 ms/div) lx (5 v/div) vout (1 v/div) ss (2 v/div) iout (10 a/div) time (10 ms/div) lx average frequency (mhz) skip mode 0.0 0.2 0.4 0.6 0.8 1.0 1.2 0.01 0.1 1 10 iload (a) lx average frequency (mhz) lx average frequency (mhz) fccm mode 0 0.2 0.4 0.6 0.8 1 1.2 0.01 0.1 1 10 iload (a) lx average frequency (mhz) lx average frequency (mhz) skip mode 0.80 0.82 0.84 0.86 0.88 0.90 0.92 0.94 0.96 0.98 1.00 4.4 4.6 4.8 5.0 5.2 5.4 5.6 vin(v) lx average frequency (mhz) lx average frequency (mhz) fccm mode 0.80 0.82 0.84 0.86 0.88 0.90 0.92 0.94 0.96 0.98 1.00 4.4 4.6 4.8 5.0 5.2 5.4 5.6 vin(v) lx average frequency (mhz)
20 NN30195A ver. ceb (9) thermal performance typical characteristics curves ( continued ) condition : vin=5v , vout = 1.0v , frequency = 1000khz , iload = 5a , fccm mode
21 NN30195A ver. ceb applications information condition : vout = 1.0 v, frequency = 1 mhz, skip mode figure : application circuit figure : layout figure : top layer with silk screen ( top view ) with evaluation board figure : bottom layer with silk screen ( bottom view ) with evaluation board 789101112 13 14 15 16 17 18 19 20 21 22 23 24 123456 pgnd ctl2 l-lx c-dcdcout1 c-dcdcout2 r-fb2 r-fb1 lx bst mode agnd vreg vfb vout ss pgood agnd pvin c-pvin2 c-pvin3 c-avin1 c-avin2 c-bst dcdcout r-pg pvin avin c-ss c-vreg vout avin ctl1 pgnd vout c-dcdcout1 c-dcdcout2 c-dcdcout3 l-lx c-pvin2 c-pvin3 lx pvin c-bst r-fb2 r-fb1 vfb c-avin1 c-avin2 avin c-ss c-vreg vout notes) this application circuit and layout is an example. the opera tion of mass production set is not guaranteed. you should perform enough evaluation and verification on the design of mass production set. you are fully responsible for the incorporation of the above application circuit and information in the design of your equipment.
22 NN30195A ver. ceb applications information ( continued ) figure : recommended component 100 k ? 0 0 0 1.5 k ? 1.0 k ? 0 1.0 h 1.0 f 10 nf 0.1 f 22 f 22 f 0.1 f 0.1 f 10 f value 1 1 1 1 1 1 1 1 1 1 1 1 2 1 1 1 qty erj3gey0r00v panasonic r-fb6 erj3ekf1001v panasonic r-fb1 erj3ekf1501v panasonic r-fb2 erj3gey0r00v panasonic r-fb3 erj3gey0r00v panasonic r-avin etqp3w1r0wfn panasonic l-lx grm188r71e105ka12l murata c-vreg grm188r72a103ka01l murata c-ss grm31cr71a226ke15l murata c-pvin2 grm188r72a104ka35l murata c-pvin3 grm31cr71e226ke15l murata c-dcdcout grm188r72a104ka35l murata c-bst grm21br71a106ke51l murata c-avin1 grm188r72a104ka35l murata c-avin2 erj3ekf1003v panasonic r-pg erj3gey0r00v part number panasonic manufacturer r-fb6 reference designator
23 NN30195A ver. ceb package information ( reference data ) outline drawing unit : mm
24 NN30195A ver. ceb package information ( reference data ) power dissipation (supplementary explanation)
25 NN30195A ver. ceb important notice 1.the products and product specificat ions described in this book are subject to change without notice for modification and/or improvement. at the final stage of your design, purchasing, or use of the products, therefore, ask for the most up-to-date product standards in advance to ma ke sure that the latest specifications satisfy your requirements. 2.when using the lsi for new models, verify the safe ty including the long-term reliability for each product. 3.when the application system is designed by using this lsi, be sure to confirm notes in this book. be sure to read the notes to descr iptions and the usage notes in the book. 4.the technical information described in this book is inten ded only to show the main characteristics and application circuit examples of the products. no license is granted in and to any intellectual property right or other right owned by panasonic corporation or any other company. therefore, no responsibility is assumed by our company as to the infringement upon any such right owned by any other company which may arise as a result of the use of technical information de-scribed in this book. 5.this book may be not reprinted or r eproduced whether wholly or partially, without the prior written permission of our company. 6.this lsi is intended to be used for general electronic equipment. consult our sales staff in advance for information on the following applications: special applications in which exceptional quality and reliability are required, or if the failu re or malfunction of this lsi may directly jeopardize life or harm the human body. any applications other than t he standard applications intended. (1) space appliance (such as artificial satellite, and rocket) (2) traffic control equipment (such as fo r automobile, airplane, train, and ship) (3) medical equipment for life support (4) submarine transponder (5) control equipment for power plant (6) disaster prevention and security device (7) weapon (8) others : applications of which reliabili ty equivalent to (1) to (7) is required it is to be understood that our company sh all not be held responsible for any damage incurred as a result of or in connection with your using the lsi described in this book for any special application, unless our company agrees to your using the lsi in this book for any special application. 7.this lsi is neither designed nor intended for use in aut omotive applications or envir onments unless the specific product is designated by our company as comp liant with the iso/ts 16949 requirements. our company shall not be held responsible for any damage incurred by you or any third party as a result of or in connection with your using the lsi in aut omotive application, unless our compan y agrees to your using the lsi in this book for such application. 8.if any of the products or technical in formation described in this book is to be exported or provided to non-residents, the laws and regulations of the exporting country, especially , those with regard to security export control, must be observed. 9. please use this product in compliance with all applicable la ws and regulations that regula te the inclusion or use of controlled substances, including withou t limitation, the eu rohs directive. our company shall not be held responsible for any dama ge incurred as a result of your using the lsi not complying with the applicable laws and regulations.
26 NN30195A ver. ceb usage notes 1. when designing your equipment, comply with the range of absolute maximum rating and the guaranteed operating conditions (operating power supply voltage and operating environment etc. ). especially, please be careful not to exceed the range of absolute maximum rati ng on the transient state, such as power-on, power-off and mode-switching. otherwise, we will not be liable for any defect which may arise later in your equipment. even when the products are used within the guaranteed val ues, take into the consideration of incidence of break down and failure mode, possible to occur to semi conductor products. measures on the systems such as redundant design, arresting the spread of fire or preventing glitch are reco mmended in order to prevent physical injury, fire, social damages, for example, by using the products. 2. comply with the instructions for use in order to pr event breakdown and characteristics change due to external factors (esd, eos, thermal stress and mechanical stress) at the time of handling, mo unting or at customer's process. when using products for which damp-proof packing is required, satisfy the conditions, such as shelf life and the elapsed time since first opening the packages. 3. pay attention to the direction of lsi. when mounting it in the wrong directi on onto the pcb (printed-circuit-board), it might smoke or ignite. 4. pay attention in the pcb (printed-circuit-board) pattern layout in order to prevent damage due to short circuit between pins. in addition, refer to the pin description for the pin configuration. 5. perform a visual inspection on the pcb before applying power, otherwise damage might happen due to problems such as a solder-bridge between the pins of t he semiconductor device. also, perform a full technical verification on the assembly quality, because the same damage possibly can happen due to conductive substances, such as solder ball, that adhere to the lsi during transportation. 6. take notice in the use of this pr oduct that it might break or occasionally smoke when an abnormal state occurs such as output pin-vcc short (power supply fault), out put pin-gnd short (ground faul t), or output-to-output-pin short (load short) . and, safety measures such as an installation of fuses are recommended becaus e the extent of the above- mentioned damage and smoke emission will depend on the current capability of the power supply. 7. the protection circuit is for maintaining safety agai nst abnormal operation. theref ore, the protection circuit should not work during normal operation. especially for the thermal protection ci rcuit, if the area of safe operation or the absolute maximum rating is momentarily exceeded due to output pin to vcc short (pow er supply fault), or output pin to gnd short (ground fault), the lsi might be damaged before t he thermal protection circuit could operate. 8. unless specified in the product specifications, make sure that negative voltage or excessive voltage are not applied to the pins because the device might be damage d, which could happen due to negative voltage or excessive voltage generated during the on and off timing when the inductive load of a motor coil or actuator coils of optical pick-up is being driven. 9. the product which has spec ified aso (area of safe oper ation) should be operated in aso 10. verify the risks which might be caused by the malfunctions of external components. 11. connect the metallic plates on the back side of the lsi with their respecti ve potentials (agnd, pvin, lx). the thermal resistance and the electrical characteristics ar e guaranteed only when the meta llic plates are connected with their respective potentials.
request for your special attention and precautions in using the technical information and semiconductors described in this book (1) if any of the products or technical information described in this book is to be exported or provided to non-residents, the laws and regulations of the exporting country, especially, those with regard to security export control, must be observed. (2) the technical information described in this book is intended only to show the main characteristics and application circuit examples of the products. no license is granted in and to any intellectual property right or other right owned by panasonic corporation or any other company. therefore, no responsibility is assumed by our company as to the infringement upon any such right owned by any other company which may arise as a result of the use of technical information described in this book. (3) the products described in this book are intended to be used for general applications (such as office equipment, communications equipment, measuring instruments and household appliances), or for specific applications as expressly stated in this book. consult our sales staff in advance for information on the following applications: ? special applications (such as for airplanes, aerospace, automotive equipment, traffic signaling equipment, combustion equipment, life support systems and safety devices) in which exceptional quality and reliability are required, or if the failure or malfunction of the products may directly jeopardize life or harm the human body. it is to be understood that our company shall not be held responsible for any damage incurred as a result of or in connection with your using the products described in this book for any special application, unless our company agrees to your using the products in this book for any special application. (4) the products and product specifications described in this book are subject to change without notice for modification and/or im- provement. at the final stage of your design, purchasing, or use of the products, therefore, ask for the most up-to-date product standards in advance to make sure that the latest specifications satisfy your requirements. (5) when designing your equipment, comply with the range of absolute maximum rating and the guaranteed operating conditions (operating power supply voltage and operating environment etc.). especially, please be careful not to exceed the range of absolute maximum rating on the transient state, such as power-on, power-off and mode-switching. otherwise, we will not be liable for any defect which may arise later in your equipment. even when the products are used within the guaranteed values, take into the consideration of incidence of break down and failure mode, possible to occur to semiconductor products. measures on the systems such as redundant design, arresting the spread of fire or preventing glitch are recommended in order to prevent physical injury, fire, social damages, for example, by using the products. (6) comply with the instructions for use in order to prevent breakdown and characteristics change due to external factors (esd, eos, thermal stress and mechanical stress) at the time of handling, mounting or at customer's process. when using products for which damp-proof packing is required, satisfy the conditions, such as shelf life and the elapsed time since first opening the packages. (7) this book may be not reprinted or reproduced whether wholly or partially, without the prior written permission of our company. 20100202

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