1/8 july 2001 . STS4NF100 n-channel 100v - 0.065 w - 4a so-8 stripfet ? ii power mosfet n typical r ds (on) = 0.065 w n exceptional dv/dt capability n 100 % avalanche tested n application oriented characterization description this mosfet series realized with stmicroelectronics unique stripfet process has specifically been designed to minimize input capacitance and gate charge. it is therefore suitable as primary switch in advanced high- efficiency, high-frequency isolated dc-dc converters for telecom and computer applications. it is also intended for any applications with low gate drive requirements. applications n high-efficiency dc-dc converters n ups and motor control type v dss r ds(on) i d STS4NF100 100 v <0.070 w 4a so-8 absolute maximum ratings ( ? ) pulse width limit ed by safe operating area. symbol parameter value unit v ds drain-source voltage (v gs =0) 100 v v dgr drain-gate voltage (r gs =20k w )100v v gs gate- source voltage 20 v i d drain current (continuos) at t c =25 c drain current (continuos) at t c = 100 c 4 2.5 a a i dm ( ? ) drain current (pulsed) 16 a p tot total dissipation at t c =25 c 2.5 w internal schematic diagram
STS4NF100 2/8 thermal data (*) mounted on fr-4 board (t [ 10 sec.) electrical characteristics (t case =25 c unless otherwise specified) off on (* ) dynamic rthj-amb t j t stg (*)thermal resistance junction-ambient single operatio thermal operating junction-ambient storage temperature 50 -55 to 150 -55 to 150 c/w c c symbol parameter test conditions min. typ. max. unit v (br)dss drain-source breakdown voltage i d = 250 m a, v gs = 0 100 v i dss zero gate voltage drain current (v gs =0) v ds = max rating v ds = max rating t c = 125 c 1 10 m a m a i gss gate-body leakage current (v ds =0) v gs = 20 v 100 na symbol parameter test conditions min. typ. max. unit v gs(th) gate threshold voltage v ds =v gs i d = 250 m a 234v r ds(on) static drain-source on resistance v gs =10v i d =2a 0.065 0.070 w symbol parameter test conditions min. typ. max. unit g fs (*) forward transconductance v ds >i d(on) xr ds(on)max i d =2a 10 s c iss c oss c rss input capacitance output capacitance reverse transfer capacitance v ds = 25v, f = 1 mhz, v gs =0 870 125 52 pf pf pf
3/8 STS4NF100 switching on switching off source drain diode (*) pulsed: pulse duration = 300 m s, duty cycle 1.5 %. ( ? ) pulse width limited by safe operating area. symbol parameter test conditions min. typ. max. unit t d(on) t r turn-on delay time rise time v dd =50v i d =4a r g = 4.7 w v gs =10v (resistive load, figure 3) 58 45 ns ns q g q gs q gd total gate charge gate-source charge gate-drain charge v dd = 80v i d =4av gs =10v 30 6 10 41 nc nc nc symbol parameter test conditions min. typ. max. unit t d(off) t f turn-off delay time fall time v dd =50v i d =4a r g = 4.7 w, v gs =10v (resistive load, figure 3) 49 17 ns ns symbol parameter test conditions min. typ. max. unit i sd i sdm ( ? ) source-drain current source-drain current (pulsed) 4 16 a a v sd (*) forward on voltage i sd =4a v gs =0 1.2 v t rr q rr i rrm reverse recovery time reverse recovery charge reverse recovery current i sd = 4 a di/dt = 100a/ m s v dd =30v t j = 150 c (see test circuit, figure 5) 100 375 7.5 ns nc a electrical characteristics (continued) safe operating area thermal impedance
STS4NF100 4/8 output characteristics transfer characteristics transconductance static drain-source on resistance gate charge vs gate-source voltage capacitance variations
5/8 STS4NF100 normalized gate threshold voltage vs temperature normalized on resistance vs temperature source-drain diode forward characteristics . ..
STS4NF100 6/8 fig. 1: unclamped inductive load test circuit fig. 1: unclamped inductive load test circuit fig. 2: unclamped inductive waveform fig. 3: switching times test circuits for resistive load fig. 4: gate charge test circuit fig. 5: test circuit for inductive load switching and diode recovery times
7/8 STS4NF100 dim. mm inch min. typ. max. min. typ. max. a 1.75 0.068 a1 0.1 0.25 0.003 0.009 a2 1.65 0.064 a3 0.65 0.85 0.025 0.033 b 0.35 0.48 0.013 0.018 b1 0.19 0.25 0.007 0.010 c 0.25 0.5 0.010 0.019 c1 45 (typ.) d 4.8 5.0 0.188 0.196 e 5.8 6.2 0.228 0.244 e 1.27 0.050 e3 3.81 0.150 f 3.8 4.0 0.14 0.157 l 0.4 1.27 0.015 0.050 m 0.6 0.023 s 8 (max.) 0016023 so-8 mechanical data
STS4NF100 8/8 information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specifications mentioned in this publication are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectronics products are not authorized for use as critical components in lif e support devices or systems without express written approval of stmicroelectronics. the st logo is registered trademark of stmicroelectronics ? 2001 stmicroelectronics - all rights reserved all other names are the property of their respective owners. stmicroelectronics group of companies australia - brazil - china - finland - france - germany - hong kong - india - italy - japan - malaysia - malta - morocco - singapore - spain - sweden - switzerland - united kingdom - u.s.a . http://w ww.st.com
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