View ADG712BR-REEL_8395300.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

a adg711/adg712/adg713 information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781/329-4700 www.analog.com fax: 781/326-8703 ?2004 analog devices, inc. all rights reserved. rev. a cmos low voltage 4 quad spst switches functional block diagrams in1 in2 in3 in4 s1 d1 s2 d2 s3 d3 s4 d4 adg711 switches shown for a logic "1" input in1 in2 in3 in4 s1 d1 s2 d2 s3 d3 s4 d4 adg712 in1 in2 in3 in4 s1 d1 s2 d2 s3 d3 s4 d4 adg713 features 1.8 v to 5.5 v single supply low on resistance (2.5 typ) low on resistance flatness ? db bandwidth > 200 mhz rail-to-rail operation 16-lead tssop and soic packages fast switching times t on 16 ns t off 10 ns typical power consumption (< 0.01 w) ttl/cmos compatible applications usb 1.1 signal switching circuits cell phones pdas battery-powered systems communication systems sample hold systems audio signal routing video switching mechanical reed relay replacement general description the adg711, adg712, and adg713 are monolithic cmos devices containing four independently selectable switches. these switches are designed on an advanced submicron process that provides low power dissipation yet gives high switching speed, low on resistance, low leakage currents, and high bandwidth. they are designed to operate from a single 1.8 v to 5.5 v sup ply, making them ideal for use in battery-powered instrum ents and with the new generation of dacs and adcs from analog devices. fast switching times and high bandwidth make the parts suitable for switching usb 1.1 data signals and video signals. the adg711, adg712, and adg713 contain four independent single-pole/single-throw (spst) switches. the adg711 and adg712 differ only in that the digital control logic is inverted. the adg711 switches are turned on with a logic low on the appropriate control input, while a logic high is required to turn on the switches of the adg712. the adg713 contains two switches whose digital control logic is similar to the adg711, while the logic is inverted on the other two switches. each switch conducts equally well in both directions when on. the adg713 exhibits break-before-make switching action. the adg711/adg712/adg713 are available in 16-lead tssop and 16-lead soic packages. product highlights 1. 1.8 v to 5.5 v single-supply operation. the adg711, adg712, and adg713 offer high perfor- mance and are fully specified and guaranteed with 3 v and 5 v supply rails. 2. very low r on (4.5 w m ax at 5 v, 8 w m ax at 3 v). at supply voltage of 1.8 v, r on is typically 35 w over the tem perature range. 3. low on resistance flatness. 4. ? db bandwidth >200 mhz. 5. low power dissipation. cmos construction ensures low power dissipation. 6. fast t on /t off. 7. break-before-make switching. this prevents channel shorting when the switches are con- figured as a multiplexer (adg713 only). 8. 16-lead tssop and 16-lead soic packages.
? rev. a adg711/adg712/adg713?pecifications 1 (v dd = +5 v 10%, gnd = 0 v. all specifications ?0 c to +85 c unless otherwise noted.) b version ?0 c to parameter +25 c +85 c unit test conditions/comments analog switch analog signal range 0 v to v dd v on resistance (r on ) 2.5 ? typ v s = 0 v to v dd , i s = ?0 ma; 4 4.5 ? max test circuit 1 on resistance match between 0.05 ? typ v s = 0 v to v dd , i s = ?0 ma channels ( ? r on ) 0.3 ? max on resistance flatness (r flat(on) ) 0.5 ? typ v s = 0 v to v dd , i s = ?0 ma 1.0 ? max leakage currents v dd = +5.5 v; source off leakage i s (off) 0.01 na typ v s = 4.5 v/1 v, v d = 1 v/4.5 v; 0.1 0.2 na max test circuit 2 drain off leakage i d (off) 0.01 na typ v s = 4.5 v/1 v, v d = 1 v/4.5 v; 0.1 0.2 na max test circuit 2 channel on leakage i d , i s ( on) 0.01 na typ v s = v d = 1 v, or 4.5 v; 0.1 0.2 na max test circuit 3 digital inputs input high voltage, v inh 2.4 v min input low voltage, v inl 0.8 v max input current i inl or i inh 0.005 a typ v in = v inl or v inh 0.1 a max dynamic characteristics 2 t on 11 ns typ r l = 300 ? , c l = 35 pf, 16 ns max v s = 3 v; test circuit 4 t off 6 ns typ r l = 300 ? , c l = 35 pf, 10 ns max v s = 3 v; test circuit 4 break-before-make time delay, t d 6 ns typ r l = 300 ? , c l = 35 pf, (adg713 only) 1 ns min v s1 = v s2 = 3 v; test circuit 5 charge injection 3 pc typ v s = 2 v; r s = 0 ? , c l = 1 nf; test circuit 6 off isolation ?8 db typ r l = 50 ? , c l = 5 pf, f = 10 mhz ?8 db typ r l = 50 ? , c l = 5 pf, f = 1 mhz; test circuit 7 channel-to-channel crosstalk ?0 db typ r l = 50 ? , c l = 5 pf, f = 10 mhz; test circuit 8 bandwidth ? db 200 mhz typ r l = 50 ? , c l = 5 pf; test circuit 9 c s (off) 10 pf typ c d (off) 10 pf typ c d , c s (on) 22 pf typ power requirements v dd = +5.5 v i dd 0.001 a typ digital inputs = 0 v or 5 v 1.0 a max notes 1 temperature range: b version: ?0 c to +85 c. 2 guaranteed by design, not subject to production test. specifications subject to change without notice.
? rev. a adg711/adg712/adg713 (v dd = +3 v 10%, gnd = 0 v. all specifications ?0 c to +85 c unless otherwise noted.) b version ?0 c to parameter +25 c +85 c unit test conditions/comments analog switch analog signal range 0 v to v dd v on resistance (r on )5 5.5 ? typ v s = 0 v to v dd , i s = ?0 ma; 8 ? max test circuit 1 on resistance match between 0.1 ? typ v s = 0 v to v dd , i s = ?0 ma channels ( ? r on ) 0.3 ? max on resistance flatness (r flat(on) ) 2.5 ? typ v s = 0 v to v dd , i s = ?0 ma leakage currents v dd = +3.3 v; source off leakage i s (off) 0.01 na typ v s = 3 v/1 v, v d = 1 v/3 v; 0.1 0.2 na max test circuit 2 drain off leakage i d (off) 0.01 na typ v s = 3 v/1 v, v d = 1 v/3 v; 0.1 0.2 na max test circuit 2 channel on leakage i d , i s ( on) 0.01 na typ v s = v d = 1 v, or 3 v; 0.1 0.2 na max test circuit 3 digital inputs input high voltage, v inh 2.0 v min input low voltage, v inl 0.4 v max input current i inl or i inh 0.005 a typ v in = v inl or v inh 0.1 a max dynamic characteristics 2 t on 13 ns typ r l = 300 ? , c l = 35 pf, 20 ns max v s = 2 v; test circuit 4 t off 7 ns typ r l = 300 ? , c l = 35 pf, 12 ns max v s = 2 v; test circuit 4 break-before-make time delay, t d 7 ns typ r l = 300 ? , c l = 35 pf, (adg713 only) 1 ns min v s1 = v s2 = 2 v; test circuit 5 charge injection 3 pc typ v s = 1.5 v; r s = 0 ? , c l = 1 nf; test circuit 6 off isolation ?8 db typ r l = 50 ? , c l = 5 pf, f = 10 mhz ?8 db typ r l = 50 ? , c l = 5 pf, f = 1 mhz; test circuit 7 channel-to-channel crosstalk ?0 db typ r l = 50 ? , c l = 5 pf, f = 10 mhz; test circuit 8 bandwidth ? db 200 mhz typ r l = 50 ? , c l = 5 pf; test circuit 9 c s (off) 10 pf typ c d (off) 10 pf typ c d , c s (on) 22 pf typ power requirements v dd = +3.3 v i dd 0.001 a typ digital inputs = 0 v or 3 v 1.0 a max notes 1 temperature range: b version: ?0 c to +85 c. 2 guaranteed by design, not subject to production test. specifications subject to change without notice. specifications 1
adg711/adg712/adg713 ? rev. a caution esd (electrostatic discharge) sensitive device. electrostatic charges as high as 4000 v readily accumulate on the human body and test equipment and can discharge without detection. although the adg711/adg712/adg713 feature proprietary esd protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. therefore, proper esd precautions are recommended to avoid performance degradation or loss of functionality. warning! esd sensitive device absolute maximum ratings 1 (t a = +25 c unless otherwise noted) v dd to gnd . . . . . . . . . . . . . . . . . . . . . . . . . . .?.3 v to +6 v analog, digital inputs 2 . . . . . . . . . . . ?.3 v to v dd +0.3 v or 30 ma, whichever occurs first continuous current, s or d . . . . . . . . . . . . . . . . . . . . . 30 ma peak current, s or d . . . . . . . . . . . . . . . . . . . . . . . . . . 100 ma (pulsed at 1 ms, 10% duty cycle max) operating temperature range industrial (b version) . . . . . . . . . . . . . . . . ?0 c to +85 c storage temperature range . . . . . . . . . . . . ?5 c to +150 c junction temperature . . . . . . . . . . . . . . . . . . . . . . . . . . 150 c tssop package, power dissipation . . . . . . . . . . . . . 430 mw ja thermal impedance . . . . . . . . . . . . . . . . . . . . . 150 c/w jc thermal impedance . . . . . . . . . . . . . . . . . . . . . . 27 c/w ordering guide model temperature range package description package option adg711br ?0 c to +85 c standard small outline (soic) r-16 adg711br-reel ?0 c to +85 c standard small outline (soic) r-16 adg711br-reel7 ?0 c to +85 c standard small outline (soic) r-16 adg711bru ?0 c to +85 ct hin shrink small outline (tssop) ru-16 adg711bru-reel ?0 c to +85 ct hin shrink small outline (tssop) ru-16 adg711bru-reel7 ?0 c to +85 ct hin shrink small outline (tssop) ru-16 adg712br ?0 c to +85 c standard small outline (soic) r-16 ADG712BR-REEL ?0 c to +85 c standard small outline (soic) r-16 ADG712BR-REEL7 ?0 c to +85 c standard small outline (soic) r-16 adg712bru ?0 c to +85 ct hin shrink small outline (tssop) ru-16 adg712bru-reel ?0 c to +85 ct hin shrink small outline (tssop) ru-16 adg712bru-reel7 ?0 c to +85 ct hin shrink small outline (tssop) ru-16 adg712bruz * ?0 c to +85 ct hin shrink small outline (tssop) ru-16 adg712bruz-reel * ?0 c to +85 ct hin shrink small outline (tssop) ru-16 adg712bruz-reel7 * ?0 c to +85 ct hin shrink small outline (tssop) ru-16 adg713br ?0 c to +85 c standard small outline (soic) r-16 adg713br-reel ?0 c to +85 c standard small outline (soic) r-16 adg713br-reel7 ?0 c to +85 c standard small outline (soic) r-16 adg713bru ?0 c to +85 ct hin shrink small outline (tssop) ru-16 adg713bru-reel ?0 c to +85 ct hin shrink small outline (tssop) ru-16 adg713bru-reel7 ?0 c to +85 ct hin shrink small outline (tssop) ru-16 * z = pb-free part. soic package, power dissipation . . . . . . . . . . . . . . . 520 mw ja thermal impedance . . . . . . . . . . . . . . . . . . . . 125 c/w jc thermal impedance . . . . . . . . . . . . . . . . . . . . . 42 c/w lead temperature, soldering vapor phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . . 215 c infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 220 c esd . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 kv notes 1 stresses above those listed under absolute maximum ratings may cause perma- nent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. only one absolute maximum rating may be applied at any one time. 2 overvoltages at in, s, or d will be clamped by internal diodes. current should be limited to the maximum ratings given.
adg711/adg712/adg713 ? rev. a v dd most positive power supply potential. gnd ground (0 v) reference. s source terminal. may be an input or output. dd rain terminal. may be an input or output. in logic control input. r on ohmic resistance between d and s. ? r on on resistance match between any two chan- nels, i.e., r on max? on min. r flat(on) flatness is defined as the difference between the maximum and minimum value of on resistance as measured over the specified analog signal range. i s (off) source leakage current with the switch ?ff. i d (off) drain leakage current with the switch ?ff. i d , i s ( on) channel leakage current with the switch ?n. v d (v s )a nalog voltage on terminals d, s. c s (off) ?ff?switch source capacitance. c d (off) ?ff?switch drain capacitance. c d , c s (on) ?n?switch capacitance. t on delay between applying the digital control input and the output switching on. t off delay between applying the digital control input and the output switching off. t d ?ff?time or ?n?time measured between the 90% points of both switches, when switching from one address state to another. (adg713 only). crosstalk a measure of unwanted signal that is coupled through from one channel to another as a result of parasitic capacitance. off isolation a measure of unwanted signal coupling through an ?ff?switch. charge a measure of the glitch impulse transferred injection from the digital input to the analog output during switching. bandwidth the frequency at which the output is attenu- ated by 3 db. on response the frequency response of the ?n?switch. on loss the voltage drop across the ?n?switch, seen on the on response vs. frequency plot as how many dbs the signal is away from 0 db at very low frequencies. terminology pin configuration (tssop/soic) top view (not to scale) 16 15 14 13 12 11 10 9 1 2 3 4 5 6 7 8 nc = no connect in1 d1 s1 nc gnd s4 d4 in4 in2 d2 s2 v dd nc s3 d3 in3 adg711 adg712 adg713 table i. truth table (adg711/adg712) adg711 in adg712 in switch condition 01on 10 off table ii. truth table (adg713) logic switch 1, 4 switch 2, 3 0 off on 1on off
adg711/adg712/adg713 ? rev. a ?ypical performance characteristics v d or v s ?drain or source voltage (v) 6.0 r on ( ) 0 0 0.5 v dd = 2.7v 0.5 1.0 5.5 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 v dd = 3v v dd = 4.5v v dd = 5v t a = 25 c 5.0 figure 1. on resistance as a function of v d (v s ) v d or v s ?drain or source voltage (v) 6.0 r on ( ) 0 0 +85 c 0.5 1.0 5.5 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 3.0 v dd = 3v ?0 c 0.5 1.5 2.0 2.5 +25 c figure 2. on resistance as a function of v d (v s ) for different temperatures v dd = 3 v v d or v s ?drain or source voltage (v) 6.0 r on ( ) 0 0 0.5 0.5 1.0 5.5 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 v dd = 5v +85 c ?0 c +25 c figure 3. on resistance as a function of v d (v s ) for different temperatures v dd = 5 v v dd = 5v 4 sw 1 sw frequency (hz) 10m 1m 1n 100 10m 1k i supply (amps) 10k 100k 1m 100 10 1 100n 10n figure 4. supply current vs. input switching frequency frequency (hz) ?0 off isolation (db) ?0 ?10 ?20 ?30 10k 100k 1m 10m 100m ?00 ?0 ?0 ?0 ?0 ?0 v dd = 5v, 3v figure 5. off isolation vs. frequency frequency (hz) ?0 crosstalk (db) ?0 ?10 ?20 ?30 10k 100k 1m 10m v dd = 5v, 3v 100m ?00 ?0 ?0 ?0 ?0 ?0 figure 6. crosstalk vs. frequency
adg711/adg712/adg713 ? rev. a applications figure 9 illustrates a photodetector circuit with programmable gain. an ad820 is used as the output operational amplifier. with the resistor values shown in the circuit, and using different combinations of the switches, gain in the range of 2 to 16 can be achieved. frequency (hz) on response (db) ? 10k 100k 1m 10m v dd = 5v 100m ? ? 0 figure 7. on response vs. frequency source voltage (v) 25 q inj (pc) ?0 0 0.5 ? 0 20 15 10 5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 v dd = 5v v dd = 3v t a = 25 c figure 8. charge injection vs. source voltage +5v +2.5v r3 510k c1 v out gnd d1 s1 d1 gain range 2 to 16 +5v ad820 s2 d2 s3 d3 s4 d4 (lsb) in1 in2 in3 (msb) in4 r4 240k r5 240k r6 120k r7 120k r8 120k r9 120k r10 120k r1 33k r2 510k +2.5v figure 9. photodetector circuit with programmable gain
adg711/adg712/adg713 ? rev. a i ds v1 sd v s r on = v1/i ds test circuit 1. on resistance t est circuits v d i s (off) i d (off) sd v s a a test circuit 2. off leakage 0.1 f v s in s d v dd gnd r l 300 c l 35pf v out v dd adg711 adg712 v in v in v out t on t off 50% 50% 90% 90% 50% 50% v s test circuit 4. switching times s1 d1 0.1 f v dd in1, in2 v s1 gnd r l1 300 c l1 35pf v out1 v s2 v out2 r l2 300 c l2 35pf s2 v in d2 v dd adg713 t d t d 50% 50% 90% v in v out1 v out2 90% 90% 90% 0v 0v 0v test circuit 5. break-before-make time delay, t d v out v out q inj = c l v out sw on v in sw off s d v dd in r s gnd v s v out c l 1nf v dd test circuit 6. charge injection i d (on) sd a v d v s test circuit 3. on leakage
adg711/adg712/adg713 ? rev. a sd 0.1 f v dd in v s gnd r l 50 v out v in v dd test circuit 7. off isolation sd 0.1 f v dd v s gnd 50 v in1 v in2 s d r l 50 nc channel-to-channel crosstalk = 20 log | v s /v out | v dd v out test circuit 8. channel-to-channel crosstalk sd 0.1 f v dd in v s gnd r l 50 v out v in v dd test circuit 9. bandwidth
adg711/adg712/adg713 ?0 rev. a outline dimensions 16-lead standard small outline package [soic] narrow body (r-16) dimensions shown in millimeters and (inches) controlling dimensions are in millimeters; inch dimensions (in parentheses) are rounded-off millimeter equivalents for reference only and are not appropriate for use in design compliant to jedec standards ms-012ac 16 9 8 1 4.00 (0.1575) 3.80 (0.1496) 10.00 (0.3937) 9.80 (0.3858) 1.27 (0.0500) bsc 6.20 (0.2441) 5.80 (0.2283) seating plane 0.25 (0.0098) 0.10 (0.0039) 0.51 (0.0201) 0.31 (0.0122) 1.75 (0.0689) 1.35 (0.0531) 8 0 0.50 (0.0197) 0.25 (0.0098) 1.27 (0.0500) 0.40 (0.0157) coplanarity 0.10 45 0.25 (0.0098) 0.17 (0.0067) 16-lead thin shrink small outline package [tssop] (ru-16) dimensions shown in millimeters 16 9 8 1 pin 1 seating plane 8 0 4.50 4.40 4.30 6.40 bsc 5.10 5.00 4.90 0.65 bsc 0.15 0.05 1.20 max 0.20 0.09 0.75 0.60 0.45 0.30 0.19 coplanarity 0.10 compliant to jedec standards mo-153ab
adg711/adg712/adg713 ?1 rev. a ?1 revision history location page 3/04?ata sheet changed from rev. 0 to rev. a. added applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 changes to ordering guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 updated outline dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
?2 c00042??/04(a)

▲Up To Search▲

Price & Availability of ADG712BR-REEL

	To Download ADG712BR-REEL Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .