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may 2007 rev 1 1/13 13 low capacitance and gate charge 100% avalanche tested 175c maximum junction temperature description this fully clamped power mosfet is produced by using the latest advanced company?s mesh overlay process which is based on a novel strip layout. the inherent benefits of the new technology coupled with the extra clamping capabilities make this prod uct particularly suitable for the harshest operation conditions such as those encountered in the automotive environment. any other application requiring extra ruggedness is also recommended. applications switching applications ? abs, solenoid drivers ? motor control ? dc-dc converters internal schematic diagram features type v dss r ds(on) i d STP90NS04ZC clamped < 6m ? 80a 1 2 3 to-220 STP90NS04ZC n-channel clamped 5m ? - 80a to-220 fully protected safefet? power mosfet www.st.com order code part number marking package packaging STP90NS04ZC p90ns04zc to-220 tube
contents STP90NS04ZC 2/13 contents 1 electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2.1 electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3 test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 4 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 5 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
STP90NS04ZC electrical ratings 3/13 1 electrical ratings table 1. absolute maximum ratings symbol parameter value unit v ds drain-source voltage (v gs = 0) 33 (1) 1. voltage is limited by zener diodes v v dg drain-gate voltage 33 (1) v v gs gate-source voltage 20 (1) v i d (2) 2. current limited by wire bonding drain current (continuous) at t c = 25c 80 a i d (2) drain current (continuous) at t c =100c 80 a i dg drain gate current (continuous) 50 a i gs gate-source current (continuous) 50 a i dm (3) 3. pulse width limited by safe operating area drain current (pulsed) 320 a p tot total dissipation at t c = 25c 280 w derating factor 1.87 w/c v esd(g-s) gate-source esd (hbm-c=100pf, r=1.5k ? ) 8kv v esd(g-d) gate-drain esd (hbm-c=100pf, r=1.5k ? ) 8kv v esd(d-s) drain-source esd (hbm-c=100pf, r=1.5k ? ) 8 kv t j t stg operating junction temperature storage temperature -55 to 175 c table 2. thermal data symbol parameter value unit r thj-case thermal resistance junction-case max 0.53 c/w r thj-amb thermal resistance junction-ambient max 62.5 c/w t l maximum lead temperature for soldering purpose 300 c table 3. avalanche data symbol parameter value unit i as avalanche current, repeti tive or not repetitive (pulse width limited by tjmax) 80 a e as single pulse avalanche energy (starting tj=25c, i d =i as , v dd =50v) 750 mj
electrical characteristics STP90NS04ZC 4/13 2 electrical characteristics (t case =25c unless otherwise specified) table 4. on/off states symbol parameter test conditions min. typ. max. unit v (br)dg clamped voltage i d = 1ma, v gs = 0 33 v i dss zero gate voltage drain current (v gs = 0) v ds = 16v 1a i gss gate body leakage current (v ds = 0) v gs = 10v 2a v gss gate-source breakdown voltage i gs =100a 18 25 v v gs(th) gate threshold voltage v ds = v gs , i d = 1ma 234v r ds(on) static drain-source on resistance v gs = 10v, i d = 40a 56m ? table 5. dynamic symbol parameter test conditions min. typ. max. unit g fs (1) 1. pulsed: pulse duration=300s, duty cycle 1.5% forward transconductance v ds =15v, i d = 40a 100 s c iss c oss c rss input capacitance output capacitance reverse transfer capacitance v ds =25v, f=1 mhz, v gs =0 3400 1250 450 pf pf pf t r(voff) t f t c off voltage rise time fall time cross-over time v clamp =32v, i d =80a, v gs =10v, r g =4.7 ? (see figure 18) 230 140 295 ns ns ns q g q gs q gd total gate charge gate-source charge gate-drain charge v dd =20v, i d = 80a v gs =10v (see figure 19) 100 25 36 135 nc nc nc r g internal gate resistor 14 ?
STP90NS04ZC electrical characteristics 5/13 table 6. source drain diode symbol parameter test conditions min. typ. max. unit i sd i sdm (1) 1. pulse width limited by safe operating area source-drain current source-drain current (pulsed) 80 320 a a v sd (2) 2. pulsed: pulse duration=300s, duty cycle 1.5% forward on voltage i sd =80a, v gs =0 1.5 v t rr q rr i rrm reverse recovery time reverse recovery charge reverse recovery current i sd =80a, di/dt = 100a/s, v dd = 30 v, tj=150c (see figure 23) 55 85 3 ns nc a
electrical characteristics STP90NS04ZC 6/13 2.1 electrical characterist ics (curves) figure 1. safe operating area figure 2. thermal impedance figure 3. output characteristics figure 4. transfer characteristics figure 5. transconductance figure 6. static drain-source on resistance
STP90NS04ZC electrical characteristics 7/13 figure 7. gate charge vs gate-source voltage figure 8. capacitance variations figure 9. normalized gate threshold voltage vs temperature figure 10. normalized on resistance vs temperature figure 11. source-drain diode forward characteristics figure 12. maximum avalanche energy
electrical characteristics STP90NS04ZC 8/13 figure 13. zero gate voltage drain current vs temperature figure 14. typical drain source clamped voltage vs drain current figure 15. typ. drain source clamped voltage vs gate source clamping current figure 16. typ. drain source clamped voltage vs drain current figure 17. gate-source zener diodes: maximum energy dissipation
STP90NS04ZC test circuit 9/13 3 test circuit figure 18. switching times test circuit for resistive load figure 19. gate charge test circuit figure 20. test circuit for inductive load switching and diode recovery times figure 21. unclamped inductive load test circuit figure 22. unclamped inductive wavefo rm figure 23. switching time waveform
package mechanical data STP90NS04ZC 10/13 4 package mechanical data in order to meet environmental requirements, st offers these devices in ecopack? packages. these packages have a lead-free second level interconnect. the category of second level interconnect is marked on the package and on the inner box label, in compliance with jedec standard jesd97. the maximum ratings related to soldering conditions are also marked on the inner box label. ecopack is an st trademark. ecopack specifications are available at: www.st.com
STP90NS04ZC package mechanical data 11/13 to-220 mechanical data dim mm inch min typ max min typ max a 4.40 4.60 0.17 3 0.1 8 1 b 0.61 0. 88 0.024 0.0 3 4 b 1 1.14 1.70 0.044 0.066 c0.4 9 0.70 0.01 9 0.027 d 15.25 15.75 0.6 0.62 d1 1.27 0.050 e 10 10.40 0. 393 0.40 9 e 2.40 2.70 0.0 9 4 0.106 e1 4. 9 5 5.15 0.1 9 4 0.202 f1.2 3 1. 3 2 0.04 8 0.051 h1 6.20 6.60 0.244 0.256 j1 2.40 2.72 0.0 9 4 0.107 l1 3 14 0.511 0.551 l1 3 .50 3 . 93 0.1 3 7 0.154 l20 16.40 0.645 l 3 02 8 . 9 0 1.1 3 7 ? p 3 .75 3 . 8 5 0.147 0.151 q2.65 2. 9 5 0.104 0.116
revision history STP90NS04ZC 12/13 5 revision history table 7. revision history date revision changes 04-may-2007 1 first release
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