symbol v ds v gs i dm i ar e ar t j , t stg symbol typ max 16.7 25 40 50 r q jc 2.5 3 maximum junction-to-case d steady-state c/w thermal characteristics parameter units maximum junction-to-ambient a t 10s r q ja c/w maximum junction-to-ambient a steady-state c/w w t a =70c 1.6 junction and storage temperature range -55 to 175 power dissipation a t a =25c p dsm 2.5 a repetitive avalanche energy l=0.3mh c mj power dissipation b t c =25c p d w t c =100c avalanche current c continuous drain current b,g maximum units parameter t a =25c g t a =100c absolute maximum ratings t a =25c unless otherwise noted i d gate-source voltage drain-source voltage -30 pulsed drain current c -25 -20 -60 vv 20 25 a -14 30 50 c aod417 p-channel enhancement mode field effect transistor features v ds (v) = -30v i d = -25a (v gs = -10v) r ds(on) < 34m w (v gs = -10v) r ds(on) < 55m w (v gs = -4.5v) 100% uis tested! 100% rg tested! general description the aod417 uses advanced trench technology to provide excellent r ds(on) , low gate charge and low gate resistance. with the excellent thermal resista nce of the dpak package, this device is well suited for high current load applications. -rohs compliant -halogen free* g ds g to-252 d-pak top view s bottom view d g s alpha & omega semiconductor, ltd. www.aosmd.com
aod417 symbol min typ max units bv dss -30 v -1 t j =55c -5 i gss 100 na v gs(th) -1 -1.9 -3 v i d(on) -60 a 27 34 t j =125c 36 40 55 m w g fs 18 s v sd -0.75 -1 v i s -6 a c iss 920 pf c oss 140 pf c rss 90 pf r g 6 9 w q g (10v) 16.2 nc q g (4.5v) 8.2 nc q gs 2.9 nc q gd 3.6 nc t d(on) 8 ns t r 30 ns t d(off) 22 ns t f 26 ns t rr 23 ns q rr 14 nc this product has been designed and qualified for th e consumer market. applications or uses as critical components in life support devices or systems are n ot authorized. aos does not assume any liability ar ising out of such applications or uses of its products. aos reserves the right to improve product design, functions and reliability without notice. maximum body-diode continuous current input capacitance output capacitance turn-on delaytime dynamic parameters v gs =0v, v ds =-15v, f=1mhz gate drain charge total gate charge (10v) v gs =-10v, v ds =-15v, i d =-20a turn-on rise time turn-off delaytime v gs =-10v, v ds =-15v, r l =0.75 w , r gen =0.75 w gate resistance v gs =0v, v ds =0v, f=1mhz turn-off fall time switching parameters total gate charge (4.5v) gate source charge m w v gs =-4.5v, i d =-7a i s =-1a,v gs =0v v ds =-5v, i d =-20a r ds(on) static drain-source on-resistance forward transconductance diode forward voltage i dss m a gate threshold voltage v ds =v gs i d =-250 m a v ds =-24v, v gs =0v v ds =0v, v gs =20v zero gate voltage drain current gate-body leakage current electrical characteristics (t j =25c unless otherwise noted) static parameters parameter conditions body diode reverse recovery time body diode reverse recovery charge i f =-20a, di/dt=100a/ m s drain-source breakdown voltage on state drain current i d =-250 m a, v gs =0v v gs =-10v, v ds =-5v v gs =-10v, i d =-20a reverse transfer capacitance i f =-20a, di/dt=100a/ m s a: the value of r ja is measured with the device mounted on 1in 2 fr- 4 board with 2oz. copper, in a still air environmen t with t a =25c. the power dissipation p dsm is based on r ja (<10s) and the maximum allowed junction temperatur e of 150c. the value in any given application depends on the user's specific board de sign, and the maximum temperature of 175c may be u sed if the pcb allows it. b. the power dissipation p d is based on t j(max) =175c, using junction-to-case thermal resistance, and is more useful in setting the upper dissipation limit for cases where additional heatsi nking is used. c: repetitive rating, pulse width limited by juncti on temperature t j(max) =175c. d. the r ja is the sum of the thermal impedence from junction to case r jc and case to ambient. e. the static characteristics in figures 1 to 6 are obtained using <300 m s pulses, duty cycle 0.5% max. f. these curves are based on the junction-to-case t hermal impedence which is measured with the device mounted to a large heatsink, assuming a maximum junction temperature of t j(max) =175c. g. the maximum current rating is limited by bond-wi res. h. these tests are performed with the device mounte d on 1 in 2 fr-4 board with 2oz. copper, in a stil l air environment with t a =25c. the soa curve provides a single pulse rating. *this device is guaranteed green after data code 8x 11 (sep 1 st 2008). rev1: sep. 2008 alpha & omega semiconductor, ltd. www.aosmd.com
aod417 typical electrical and thermal characteristics i d =-10ma, v gs =0v 850 185 90 0 10 20 30 40 50 60 0 1 2 3 4 5 -v ds (volts) figure 1: on-region characteristics -i d (a) v gs =-3.5v -6v -4.5v -10v 0 5 10 15 20 25 1 1.5 2 2.5 3 3.5 4 4.5 5 -v gs (volts) figure 2: transfer characteristics -i d (a) 20 25 30 35 40 45 50 55 60 0 5 10 15 20 25 -i d (a) figure 3: on-resistance vs. drain current and gate voltage r ds(on) (m w ww w ) 1.0e-06 1.0e-05 1.0e-04 1.0e-03 1.0e-02 1.0e-01 1.0e+00 1.0e+01 0.0 0.2 0.4 0.6 0.8 1.0 -v sd (volts) figure 6: body-diode characteristics -i s (a) 25c 125c -40c 0.6 0.8 1 1.2 1.4 1.6 -50 -25 0 25 50 75 100 125 150 175 temperature (c) figure 4: on-resistance vs. junction temperature normalized on-resistance v gs =-10v i d =-20a v gs =-4.5v i d =-7a 20 30 40 50 60 70 80 3 4 5 6 7 8 9 10 -v gs (volts) figure 5: on-resistance vs. gate-source voltage r ds(on) (m w ww w ) 25c 125c v ds =-5v v gs =-4.5v v gs =-10v 25c 125c i d =-20a -40c alpha & omega semiconductor, ltd. www.aosmd.com
aod417 typical electrical and thermal characteristics i d =-10ma, v gs =0v 850 185 90 0 2 4 6 8 10 0 3 6 9 12 15 18 -q g (nc) figure 7: gate-charge characteristics -v gs (volts) 0 250 500 750 1000 1250 1500 0 5 10 15 20 25 30 -v ds (volts) figure 8: capacitance characteristics capacitance (pf) c iss 0 40 80 120 160 200 0.0001 0.001 0.01 0.1 1 10 pulse width (s) figure 10: single pulse power rating junction-to- case (note f) power (w) 0.01 0.1 1 10 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000 pulse width (s) figure 11: normalized maximum transient thermal imp edance (note f) z q qq q jc normalized transient thermal resistance c oss c rss v ds =-15v i d =-20a single pulse d=t on /t t j,pk =t c +p dm .z q jc .r q jc r q jc =3c/w t on t p d in descending order d=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse t j(max) =175c t c =25c 0.0 0.1 1.0 10.0 100.0 1000.0 0.01 0.1 1 10 100 v ds (volts) i d (amps) figure 9: maximum forward biased safe operating area (note f) 10 m s dc r ds(on) limited t j(max) =175c t c =25c 100 m s alpha & omega semiconductor, ltd. www.aosmd.com
aod417 typical electrical and thermal characteristics i d =-10ma, v gs =0v 850 185 90 0.001 0.01 0.1 1 10 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000 pulse width (s) figure 16: normalized maximum transient thermal imp edance (note h) z q qq q ja normalized transient thermal resistance single pulse d=t on /t t j,pk =t a +p dm .z q ja .r q ja r q ja =50c/w t on t p d in descending order d=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse 0 20 40 60 80 100 120 0.000001 0.00001 0.0001 0.001 time in avalanche, t a (s) figure 12: single pulse avalanche capability -i d (a), peak avalanche current 0 10 20 30 40 50 60 0 25 50 75 100 125 150 175 t case (c) figure 13: power de-rating (note b) power dissipation (w) 0 5 10 15 20 25 30 0 25 50 75 100 125 150 175 t case (c) figure 14: current de-rating (note b) current rating t a =25c 0 10 20 30 40 50 60 0.001 0.01 0.1 1 10 100 1000 pulse width (s) figure 15: single pulse power rating junction-to- ambient (note h) power (w) t a =25c t a =150c alpha & omega semiconductor, ltd. www.aosmd.com
aod417 vdc ig vds dut vdc vgs vgs qg qgs qgd charge gate charge test circuit & waveform - + - + -10v vdd vgs id vgs rg dut vdc vgs vds id vgs unclamped inductive switching (uis) test circuit & waveforms vds l - + 2 e = 1/2 li ar ar bv dss i ar ig vgs - + vdc dut l vgs isd diode recovery test circuit & waveforms vds - vds + di/dt rm rr vdd vdd q = - idt t rr -isd -vds f -i -i vdc dut vdd vgs vds vgs rl rg resistive switching test circuit & waveforms - + vgs vds t t t t t t 90% 10% r on d(off) f off d(on) alpha & omega semiconductor, ltd. www.aosmd.com
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