AOT12N40 400v,11a n-channel mosfet general description product summary v ds i d (at v gs =10v) 11a r ds(on) (at v gs =10v) <0.59 w 100% uis tested 100% r g tested for halogen free add "l" suffix to part number: AOT12N40l symbol v ds the AOT12N40 is fabricated using an advanced high voltage mosfet process that is designed to deliver high levels of performance and robustness in popular ac- dc applications.by providing low r ds(on) , c iss and c rss along with guaranteed avalanche capability this part can be adopted quickly into new and existing offline power supply designs. v units parameter absolute maximum ratings t a =25c unless otherwise noted 500v@150 drain-source voltage 400 maximum g d s g d s top view to-220 AOT12N40 v gs i dm i ar e ar e as peak diode recovery dv/dt dv/dt t j , t stg t l symbol r q ja r q cs r q jc - 65 0.68 11 7 184 5 0.56 0.5 300 -55 to 150 1.5 units c/w 54 avalanche current c 184 single pulsed avalanche energy g 368 3.5 repetitive avalanche energy c a w w/ o c c mj v/ns c v 30 gate-source voltage t c =100c a 28 pulsed drain current c continuous drain current t c =25c i d maximum case-to-sink a maximum junction-to-case mj c/w c/w derate above 25 o c parameter typical maximum maximum lead temperature for soldering purpose, 1/8" from case for 5 seconds junction and storage temperature range maximum junction-to-ambient a,d power dissipation b p d t c =25c thermal characteristics rev0: sep 2012 www.aosmd.com page 1 of 5
AOT12N40 symbol min typ max units 400 500 bv dss / ? tj 0.4 v/ o c 1 10 i gss gate-body leakage current 100 n a v gs(th) gate threshold voltage 3.3 3.9 4.5 v r ds(on) 0.49 0.59 w g fs 10 s v sd 0.72 1 v i s maximum body-diode continuous current 11 a i sm 28 a c iss 740 925 1110 pf c oss 70 100 130 pf c rss 3.5 6.4 9.0 pf r g 1.4 2.9 4.5 w q g 13 17 21 nc q gs 5.4 nc q gd 5.7 nc t d(on) 25 ns t r 57 ns t d(off) 41 ns m a v ds =0v, v gs =30v v drain-source breakdown voltage i d =250 a, v gs =0v, t j =25c i d =250 a, v gs =0v, t j =150c maximum body-diode pulsed current input capacitance output capacitance turn-on delaytime dynamic parameters turn-on rise time reverse transfer capacitance v gs =0v, v ds =25v, f=1mhz diode forward voltage turn-off delaytime v gs =10v, v ds =200v, i d =12a, r g =25 w gate resistance v gs =0v, v ds =0v, f=1mhz total gate charge v gs =10v, v ds =320v, i d =12a gate source charge gate drain charge switching parameters i s =1a,v gs =0v v ds =40v, i d =6a forward transconductance electrical characteristics (t j =25c unless otherwise noted) static parameters parameter conditions v ds =5v, i d =250 m a v ds =320v, t j =125c zero gate voltage drain current i dss zero gate voltage drain current v ds =400v, v gs =0v id=250 a, vgs=0v bv dss static drain-source on-resistance v gs =10v, i d =6a d(off) t f 32 ns t rr 180 235 290 ns q rr 1.9 2.4 2.9 m c this product has been designed and qualified for th e consumer market. applications or uses as critical components in life support devices or systems are n ot authorized. aos does not assume any liability ar ising out of such applications or uses of its products. aos reserves the right to improve product design, functions and reliability without notice. body diode reverse recovery charge i f =12a,di/dt=100a/ m s,v ds =100v body diode reverse recovery time i f =12a,di/dt=100a/ m s,v ds =100v turn-off fall time a. the value of r q ja is measured with the device in a still air environm ent with t a =25 c. b. the power dissipation p d is based on t j(max) =150 c, using junction-to-case thermal resistance, and i s more useful in setting the upper dissipation limit for cases where additional heatsi nking is used. c. repetitive rating, pulse width limited by juncti on temperature t j(max) =150 c, ratings are based on low frequency and duty cycl es to keep initial t j =25 c. d. the r q ja is the sum of the thermal impedance from junction t o case r q jc and case to ambient. e. the static characteristics in figures 1 to 6 are obtained using <300 m s pulses, duty cycle 0.5% max. f. these curves are based on the junction-to-case t hermal impedance which is measured with the device mounted to a large heatsink, assuming a maximum junction temperature of t j(max) =150 c. the soa curve provides a single pulse rating. g. l=60mh, i as =3.5a, v dd =150v, r g =25 ? , starting t j =25 c rev0: sep 2012 www.aosmd.com page 2 of 5
AOT12N40 typical electrical and thermal characteristics 0 5 10 15 20 25 0 5 10 15 20 25 30 i d (a) v ds (volts) fig 1: on-region characteristics v gs =5.5v 6v 10v 6.5v 7v 8v 0.1 1 10 100 2 4 6 8 10 i d (a) v gs (volts) figure 2: transfer characteristics - 55 c v ds =40v 25 c 125 c 0.0 0.4 0.8 1.2 1.6 2.0 0 5 10 15 20 25 r ds(on) ( w ww w ) i d (a) figure 3: on-resistance vs. drain current and gate voltage v gs =10v 0.0 0.6 1.2 1.8 2.4 3.0 -100 -50 0 50 100 150 200 normalized on-resistance temperature (c) figure 4: on-resistance vs. junction temperature v gs =10v i d =6a 40 1e-05 1e-04 1e-03 1e-02 1e-01 1e+00 1e+01 0.0 0.2 0.4 0.6 0.8 1.0 1.2 i s (a) v sd (volts) figure 6: body-diode characteristics (note e) 25 c 125 c voltage 0.8 0.9 1 1.1 1.2 1.3 -100 -50 0 50 100 150 200 bv dss (normalized) t j (c) figure 5:break down vs. junction temparature rev0: sep 2012 www.aosmd.com page 3 of 5
AOT12N40 typical electrical and thermal characteristics 0 3 6 9 12 15 0 6 12 18 24 30 v gs (volts) q g (nc) figure 7: gate-charge characteristics v ds =320v i d =12a 1 10 100 1000 10000 0.1 1 10 100 capacitance (pf) v ds (volts) figure 8: capacitance characteristics c iss c oss c rss 0.01 0.1 1 10 100 1 10 100 1000 i d (amps) v ds (volts) figure 9: maximum forward biased safe operating area for AOT12N40 (note f) 10 m s 10ms 1ms dc r ds(on) limited t j(max) =150 c t c =25 c 100 m s 0 3 6 9 12 15 0 25 50 75 100 125 150 current rating i d (a) t case (c) figure 10: current de - rating (note b) operating area for AOT12N40 (note f) figure 10: current de - rating (note b) 0.01 0.1 1 10 1e-05 0.0001 0.001 0.01 0.1 1 10 100 z q qq q jc normalized transient thermal resistance pulse width (s) figure 11: normalized maximum transient thermal imp edance for AOT12N40(note f) d=t on /t t j,pk =t c +p dm .z q jc .r q jc r q jc =0.68 c/w in descending order d=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse t on t p d single pulse rev0: sep 2012 www.aosmd.com page 4 of 5
AOT12N40 - + vdc ig vds dut - + vdc vgs vgs 10v qg qgs qgd charge gate charge test circuit & waveform - + vdc dut vdd vgs vds vgs rl rg vgs vds 10% 90% res istive switching test circuit & waveforms t t r d(on) t on t d(off) t f t off l bv unclamped inductive switching (uis) test circuit & waveforms vds 2 e = 1/2 li ar ar vdd vgs id vgs rg dut - + vdc vgs vds id vgs bv i ig vgs - + vdc dut l vds vgs vds isd isd diode recovery test circuit & waveforms vds - vds + i f ar dss e = 1/2 li di/dt i rm rr vdd vdd q = - idt t rr ar ar rev0: sep 2012 www.aosmd.com page 5 of 5
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