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may 2010 doc id 17493 rev 1 1/26 1 vn920db5-e high-side driver features ecopack ? : lead free and rohs compliant automotive grade: compliance with aec guidelines very low standby current cmos compatible input proportional load current sense current sense disable thermal shutdown protection and diagnosis undervoltage shutdown overvoltage clamp load current limitation description the vn920db5-e is a monolithic device designed in stmicroelectronics? vipower? m0-3 technology. the vn920db5-e is intended for driving any type of load with one side connected to ground. the active v cc pin voltage clamp protects the device against low energy spikes (see iso7637 transient compatibility table). active current limitatio n combined with thermal shutdown and automatic restart protects the device against overload. the device detects the open-load condition in both the on-state and off-state. in the off-state the device detects if the output is shorted to v cc . the device automatically turns-off in the case where the ground pin becomes disconnected. type r ds(on) i out v cc vn920db5-e 18 m 30 a 36 v p 2 pak table 1. device summary package order codes tube tape and reel p 2 pak vn920db5-e VN920DB5TR-E www.st.com
contents vn920db5-e 2/26 doc id 17493 rev 1 contents 1 block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.1 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.2 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.3 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.4 electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 3 application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 3.1 gnd protection network against reverse battery . . . . . . . . . . . . . . . . . . . 16 3.1.1 solution 1: resistor in the ground line (rgnd only) . . . . . . . . . . . . . . . . 16 3.1.2 solution 2: diode (dgnd) in the ground line . . . . . . . . . . . . . . . . . . . . . 17 3.2 load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 3.3 mcu i/os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 3.4 p2pak maximum demagnetization energy (v cc = 13.5 v) . . . . . . . . . . . 18 4p 2 pak thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 5 package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 5.1 ecopack ? packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 5.2 p 2 pak mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 5.3 p 2 pak packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 6 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
vn920db5-e list of tables doc id 17493 rev 1 3/26 list of tables table 1. device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 table 2. suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 5 table 3. absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 table 4. thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 table 5. power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 table 6. switching (v cc =13 v) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 table 7. input pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 table 8. v cc output diode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 table 9. status pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 table 10. protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 table 11. open-load detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 table 12. truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 table 13. electrical transient requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 table 14. p 2 pak thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 table 15. p 2 pak mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 table 16. document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
list of figures vn920db5-e 4/26 doc id 17493 rev 1 list of figures figure 1. block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 figure 2. configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 figure 3. current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 figure 4. status timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 figure 5. switching time waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 figure 6. waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 7. off-state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 8. high level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 9. input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 10. status leakage current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 11. status low output voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 12. status clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 13. on-state resistance vs t case . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 14. on-state resistance vs v cc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 15. overvoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 16. input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 17. input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 18. input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 19. i lim vs t case . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 20. turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 21. turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 22. application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 23. p 2 pak maximum turn-off curr ent versus inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 24. p 2 pak pc board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 25. p 2 pak rthj-amb vs pcb copper area in open box free air condition . . . . . . . . . . . . . . . . 19 figure 26. p 2 pak thermal impedance junction ambien t single pulse . . . . . . . . . . . . . . . . . . . . . . . . . 20 figure 27. thermal fitting model of a single channel hsd in p 2 pak. . . . . . . . . . . . . . . . . . . . . . . . . . 20 figure 28. p 2 pak package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 figure 29. p 2 pak tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 figure 30. p 2 pak tape and reel (suffix ?13tr?). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
vn920db5-e block diagram and pin description doc id 17493 rev 1 5/26 1 block diagram and pin description figure 1. block diagram figure 2. configurati on diagram (top view) table 2. suggested connections for unused and not connected pins connection / pin status n.c. output input floating x x x x to ground x through 10 k resistor undervoltage overtemperature v cc gnd input output overvoltage current limiter logic driver power clamp status v cc clamp on - state open-load off - state open-load and output shorted to v cc detection detection detection detection detection output status v cc input gnd 5 4 3 2 1 p 2 pak
electrical specifications vn920db5-e 6/26 doc id 17493 rev 1 2 electrical specifications figure 3. current and voltage conventions 2.1 absolute maximum ratings stressing the device above the rating listed in the ta bl e 3 may cause permanent damage to the device. these are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. exposure to absolute maximum rating conditions for ext ended periods may affect device reliability. refer also to th e stmicroelectronics sure progra m and other rele vant quality document. input i s i in v in v cc status i stat v stat gnd v cc i out v out i gnd output v f table 3. absolute maximum ratings symbol parameter value unit p 2 pak v cc dc supply voltage 41 v - v cc reverse dc supply voltage - 0.3 v - i gnd dc reverse ground pin current - 200 ma i out dc output current internally limited a - i out reverse dc output current - 25 a i in dc input current +/- 10 ma i stat dc status current +/- 10 ma v esd electrostatic discharge (human body model: r = 1.5 k ; c = 100 pf) - input - status - output - v cc 4000 4000 5000 5000 v v v v
vn920db5-e electrical specifications doc id 17493 rev 1 7/26 2.2 thermal data e max maximum switching energy (l = 0.25 mh; r l = 0 ; v bat = 13.5 v; t jstart = 150 c; i l = 45 a) 364 mj p tot power dissipation t c = 25 c 96.1 w t j junction operating temperature internally limited c t c case operating temperature - 40 to 150 c t stg storage temperature - 55 to 150 c table 3. absolute maximum ratings (continued) symbol parameter value unit p 2 pak table 4. thermal data symbol parameter max. value unit p 2 pak r thj-case thermal resistance junction-case 1.3 c/w r thj-lead thermal resistance junction-lead - c/w r thj-amb thermal resistance junction-ambient 51.3 (1) 1. when mounted on a standard single-sided fr-4 board with 0.5 cm 2 of cu (at least 35 m thick). c/w
electrical specifications vn920db5-e 8/26 doc id 17493 rev 1 2.3 electrical characteristics values specified in this section are for 8 v < v cc < 36 v; -40 c < t j < 150 c, unless otherwise stated. table 5. power symbol parameter test conditions min. typ. max. unit v cc operating supply voltage 5.5 13 36 v v usd undervoltage shutdown 3 4 5.5 v v usdhyst undervoltage shutdown hysteresis 0.5 v v ov overvoltage shutdown 36 v r on on-state resistance i out = 10 a; t j = 25 c; i out = 10 a; i out = 3 a; v cc = 6 v 18 36 50 m m m i s supply current off-state; v cc = 13 v; v in = v out = 0 v off-state; v cc = 13 v; v in = v out = 0 v; t j = 25 c on-state; v cc = 13v; v in = 5v; i out = 0a 10 10 25 20 3.5 a a ma i l(off1) off-state output current v in = v out = 0 v 0 50 a i l(off2) off-state output current v in = 0 v; v out = 3.5 v -75 0 a i l(off3) off-state output current v in = v out = 0 v; v cc = 13 v; t j = 125 c 5a i l(off4) off-state output current v in = v out = 0 v; v cc = 13 v; t j = 25 c 3a table 6. switching (v cc =13 v) symbol parameter test conditions min. typ. max. unit t d(on) turn-on delay time r l = 1.3 50 s t d(off) turn-off delay time r l = 1.3 50 s dv out /dt (on) turn-on voltage slope r l = 1.3 see figure 20 v/s dv out /dt (off) turn-off voltage slope r l = 1.3 see figure 21 v/s
vn920db5-e electrical specifications doc id 17493 rev 1 9/26 table 7. input pin symbol parameter test conditions min. typ. max. unit v il input low level 1.25 v i il low level input current v in = 1.25 v 1 a v ih input high level 3.25 v i ih high level input current v in = 3.25 v 10 a v hyst input hysteresis voltage 0.5 v v icl input clamp voltage i in = 1 ma i in = -1 ma 66.8 - 0.7 8v v table 8. v cc output diode symbol parameter test conditions min. typ. max. unit v f forward on voltage - i out = 5.5 a; t j = 150 c - - 0.7 v table 9. status pin symbol parameter test conditions min. typ. max. unit v stat status low output voltage i stat = 1.6 ma 0.5 v i lstat status leakage current normal operation; v stat = 5 v 10 a c stat status pin input capacitance normal operation; v stat = 5 v 100 pf v scl status clamp voltage i stat = 1 ma i stat = - 1 ma 66.8 - 0.7 8v v table 10. protections (1) 1. to ensure long term reliability under heavy overload or s hort circuit conditions, protection and related diagnostic signals must be used together with a pro per software strategy. if the device operates under abnormal conditions this software must limit the duration and number of activation cycles. symbol parameter test conditions min. typ. max. unit t tsd shutdown temperature 150 175 200 c t r reset temperature 135 c t hyst thermal hysteresis 7 15 c t sdl status delay in overload condition t j > t jsh 20 ms i lim current limitation v cc = 13 v 5.5 v < v cc < 36 v 30 45 75 75 a a v demag turn-off output clamp voltage i out = 2 a; v in = 0 v; l = 6 mh v cc - 41 v cc - 48 v cc - 55 v
electrical specifications vn920db5-e 10/26 doc id 17493 rev 1 figure 4. status timings figure 5. switching time waveforms table 11. open-load detection symbol parameter test conditions min. typ. max. unit i ol open-load on-state detection threshold v in = 5 v 300 500 700 ma t dol(on) open-load on-state detection delay i out = 0 a 250 s v ol open-load off-state voltage detection threshold v in = 0 v 1.5 2.5 3.5 v t dol(off) open-load detection delay at turn-off 1000 s v in v stat t dol(off) open-load status timing (with external pull-up) overtemp status timing i out < i ol v out > v ol t dol(on) t j > t jsh v in v stat t sdl t sdl figure 1: test conditions for high side switching times measurement. t t v out v in 80% 10% dv out /dt (on) t d(off) 90% dv out /dt (off) t d(on)
vn920db5-e electrical specifications doc id 17493 rev 1 11/26 table 12. truth table conditions input output status normal operation l h l h h h current limitation l h h l x x h (t j < t tsd ) h (t j > t tsd ) l overtemperature l h l l h l undervoltage l h l l x x overvoltage l h l l h h output voltage > v ol l h h h l h output current < i ol l h l h h l table 13. electrical transient requirements iso t/r 7637/1 test pulse test level i ii iii iv delays and impedance 1- 25v (1) 1. all functions of the device are performed as designed after exposure to disturbance. - 50 v (1) - 75 v (1) - 100 v (1) 2ms,10 2+ 25v (1) + 50 v (1) + 75 v (1) + 100 v (1) 0.2 ms, 10 3a - 25 v (1) - 50 v (1) - 100 v (1) - 150 v (1) 0.1 s, 50 3b + 25 v (1) + 50 v (1) + 75 v (1) + 100 v (1) 0.1 s, 50 4- 4v (1) - 5 v (1) - 6 v (1) - 7 v (1) 100 ms, 0.01 5 + 26.5 v (1) + 46.5 v (2) 2. one or more functions of the device is not perfor med as designed after exposure and cannot be returned to proper operation without replacing the device. + 66.5 v (2) + 86.5 v (2) 400 ms, 2
electrical specifications vn920db5-e 12/26 doc id 17493 rev 1 figure 6. waveforms open-load without external pull-up status input normal operation undervoltage v cc v usd v usdhyst input overvoltage v cc v cc > v ov status input status status input status input open-load with external pull-up undefined load voltage v cc v ol v ol
vn920db5-e electrical specifications doc id 17493 rev 1 13/26 2.4 electrical char acteristics curves figure 7. off-state output current figure 8. high level input current figure 9. input clamp voltage f igure 10. status leakage current figure 11. status low output voltage figure 12. status clamp voltage -50 -25 0 25 50 75 100 125 150 175 tc (oc) 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 il(off1) (a) off state vcc=36v vin=vout=0v -50 -25 0 25 50 75 100 125 150 175 tc (c) 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 iih (ua) vin=3.25v -50 -25 0 25 50 75 100 125 150 175 tc (c) 6 6.2 6.4 6.6 6.8 7 7.2 7.4 7.6 7.8 8 vicl (v) iin=1ma -50 -25 0 25 50 75 100 125 150 175 tc ( o c ) 0 0.005 0.01 0.015 0.02 0.025 0.03 0.035 0.04 0.045 0.05 ilstat( a) vstat=5v -50 -25 0 25 50 75 100 125 150 175 tc (c) 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 vstat (v) istat=1.6ma -50 -25 0 25 50 75 100 125 150 175 tc (c) 6 6.2 6.4 6.6 6.8 7 7.2 7.4 7.6 7.8 8 vscl (v) istat=1ma
electrical specifications vn920db5-e 14/26 doc id 17493 rev 1 figure 13. on-state resistance vs t case figure 14. on-state resistance vs v cc figure 15. overvoltage shutdown figure 16. input high level figure 17. input low level figure 18. input hysteresis voltage -50 -25 0 25 50 75 100 125 150 175 tc ( o c ) 0 5 10 15 20 25 30 35 40 45 50 ron (mohm) iout=10a vcc=8v; 36v 5 10152025303540 vcc (v) 0 5 10 15 20 25 30 35 40 45 50 ron (mohm) iout=10a tc=150oc tc=25oc tc= -40oc -50 -25 0 25 50 75 100 125 150 175 tc (c) 30 32 34 36 38 40 42 44 46 48 50 vov (v) -50 -25 0 25 50 75 100 125 150 175 tc (c) 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6 vih (v) -50 -25 0 25 50 75 100 125 150 175 tc (c) 1 1.2 1.4 1.6 1.8 2 2.2 2.4 2.6 vil (v) -50 -25 0 25 50 75 100 125 150 175 tc (c) 0.5 0.6 0.7 0.8 0.9 1 1.1 1.2 1.3 1.4 1.5 vhyst (v)
vn920db5-e electrical specifications doc id 17493 rev 1 15/26 figure 19. i lim vs t case figure 20. turn-on voltage slope figure 21. turn-off voltage slope -50 -25 0 25 50 75 100 125 150 175 tc (c) 0 10 20 30 40 50 60 70 80 90 100 ilim (a) vcc=13v -50 -25 0 25 50 75 100 125 150 175 tc (oc) 250 300 350 400 450 500 550 600 650 700 dvout/dt(on) (v/ms) vcc=13v rl=1.3ohm -50 -25 0 25 50 75 100 125 150 175 tc (c) 0 50 100 150 200 250 300 350 400 450 500 550 dvout/dt(off) (v/ms) vcc=13v rl=1.3ohm
application information vn920db5-e 16/26 doc id 17493 rev 1 3 application information figure 22. application schematic 3.1 gnd protection network against reverse battery 3.1.1 solution 1: resist or in the ground line (r gnd only) this can be used with any type of load. the following is an indication on how to dimension the r gnd resistor. 1. r gnd 600 mv / (i s(on)max ). 2. r gnd ( - v cc ) / (- i gnd ) where - i gnd is the dc reverse ground pin current and can be found in the absolute maximum rating section of the device?s datasheet. power dissipation in r gnd (when v cc < 0: during reverse battery situations) is: p d = (- v cc ) 2 / r gnd this resistor can be shared amongst several different hsds. please note that the value of this resistor should be calculated with formula (1) where i s(on)max becomes the sum of the maximum on-state currents of the different devices. please note that if the microprocessor ground is not shared by the device ground then the r gnd produces a shift (i s(on)max * r gnd ) in the input thresholds and the status output values. this shift varies depending on how many devices are on in the case of several high side drivers sharing the same r gnd . if the calculated power dissipation leads to a large resistor or several devices have to share the same resistor then st su ggests to utilize solution 2 (see section 3.1.2 ). v cc gnd output d gnd r gnd d ld c +5v r prot v gnd status input +5v r prot
vn920db5-e application information doc id 17493 rev 1 17/26 3.1.2 solution 2: diode (d gnd ) in the ground line a resistor (r gnd = 1 k ) should be inserted in parallel to d gnd if the device drives an inductive load. this small signal diode can be safely shared amongst several different hsds. also in this case, the presence of the ground network produces a shift (~600 mv) in the input threshold and in the status output values if the microprocessor ground is not common to the device ground. this shift does not vary if more than one hsd shares the same diode/resistor network. series resistor in input and status lines are also required to prevent that, during battery voltage transient, the current exceeds the absolute maximum rating. safest configuration for unused input and status pin is to leave them unconnected. 3.2 load dump protection d ld is necessary (voltage transient suppressor) if the load dump peak voltage exceeds the v cc max dc rating. the same applies if the device is subject to transients on the v cc line that are greater than the ones shown in ta bl e 1 3 . 3.3 mcu i/os protection if a ground protection network is used and negative transient are present on the v cc line, the control pins are pulled negative. st suggests to insert a resistor (r prot ) in line to prevent the microcontroller i/os pins to latch-up. the value of these resistors is a compromise between the leakage current of microcontroller and the current required by the hsd i/os (input levels compatibility) with the latch-up limit of microcontroller i/os. -v ccpeak /i latchup r prot (v oh c -v ih -v gnd ) / i ihmax calculation example: for v ccpeak = -100 v and i latchup 20 ma; v oh c 4.5 v 5k r prot 65 k . recommended values: r prot =10k .
application information vn920db5-e 18/26 doc id 17493 rev 1 3.4 p2pak maximum dema gnetization energy (v cc = 13.5 v) figure 23. p 2 pak maximum turn-off current versus inductance note: values are generated with r l =0 . in case of repetitive pulses, t jstart (at beginning of each demagnetization) of every pulse must not exceed the temperature specified above for curves a and b. c: t jstart = 125 c repetitive pulse a: t jstart = 150 c single pulse b: t jstart = 100 c repetitive pulse demagnetization demagnetization demagnetization t v in , i l 1 10 100 0.01 0.1 1 10 100 l(mh) i lmax (a) a b c
vn920db5-e p 2 pak thermal data doc id 17493 rev 1 19/26 4 p 2 pak thermal data figure 24. p 2 pak pc board note: layout condition of r th and z th measurements (pcb fr4 area = 60 mm x 60 mm, pcb thickness = 2 mm, cu thickness = 35 m , copper areas: 0.97 cm 2 , 8 cm 2 ). figure 25. p 2 pak r thj-amb vs pcb copper area in open box free air condition 30 35 40 45 50 55 0246810 pcb cu heatsink area (cm^2) rthj_amb (c/w) tj-tamb=50c
p 2 pak thermal data vn920db5-e 20/26 doc id 17493 rev 1 figure 26. p 2 pak thermal impedance junction ambient single pulse equation 1: pulse calculation formula where = t p /t figure 27. thermal fitting model of a single channel hsd in p 2 pak 0.01 0.1 1 10 100 1000 0.0001 0.001 0.01 0.1 1 10 100 1000 time (s) zt h (c /w) 0.97 cm 2 6 cm 2 z th r th z thtp 1 ? () + ? =
vn920db5-e p 2 pak thermal data doc id 17493 rev 1 21/26 table 14. p 2 pak thermal parameters area/island (cm 2 )0.976 r1 (c/w) 0.02 r2 (c/w) 0.1 r3 (c/w) 0.22 r4 (c/w) 4 r5 (c/w) 9 r6 (c/w) 37 22 c1 (ws/c) 0.0015 c2 (ws/c) 0.007 c3 (ws/c) 0.015 c4 (ws/c) 0.4 c5 (ws/c) 2 c6 (ws/c) 3 5
package and packing information vn920db5-e 22/26 doc id 17493 rev 1 5 package and packing information 5.1 ecopack ? packages in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions and product status are available at: www.st.com. ecopack ? is an st trademark. 5.2 p 2 pak mechanical data figure 28. p 2 pak package dimensions p010r
vn920db5-e package and packing information doc id 17493 rev 1 23/26 table 15. p 2 pak mechanical data dim. mm min. typ. max. a 4.30 4.80 a1 2.40 2.80 a2 0.03 0.23 b 0.80 1.05 c 0.45 0.60 c2 1.17 1.37 d 8.95 9.35 d2 8.00 e 10.00 10.40 e1 8.50 e 3.20 3.60 e1 6.60 7.00 l 13.70 14.50 l2 1.25 1.40 l3 0.90 1.70 l5 1.55 2.40 r 0.40 v2 0o 8o package weight 1.40 gr (typ)
package and packing information vn920db5-e 24/26 doc id 17493 rev 1 5.3 p 2 pak packing information figure 29. p 2 pak tube shipme nt (no suffix) figure 30. p 2 pak tape and reel (suffix ?13tr?) all dimensions are in mm. base q.ty 50 bulk q.ty 1000 tube length ( 0.5) 532 a 18 b 33.1 c ( 0.1) 1 c b a tape dimensions according to electronic industries association (eia) standard 481 rev. a, feb 1986 all dimensions are in mm. tape width w 24 tape hole spacing p0 ( 0.1) 4 component spacing p 12 hole diameter d ( 0.1/-0) 1.5 hole diameter d1 (min) 1.5 hole position f ( 0.05) 11.5 compartment depth k (max) 6.5 hole spacing p1 ( 0.1) 2 top cover tape end start no components no components components 500mm min 500mm min empty components pockets saled with cover tape. user direction of feed reel dimensions all dimensions are in mm. base q.ty 1000 bulk q.ty 1000 a (max) 330 b (min) 1.5 c ( 0.2) 13 f 20.2 g (+ 2 / -0) 24.4 n (min) 60 t (max) 30.4
vn920db5-e revision history doc id 17493 rev 1 25/26 6 revision history table 16. document revision history date revision changes 17-may-2010 1 initial release.
vn920db5-e 26/26 doc id 17493 rev 1 please read carefully: information in this document is provided solely in connection with st products. stmicroelectronics nv and its subsidiaries (?st ?) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described he rein at any time, without notice. all st products are sold pursuant to st?s terms and conditions of sale. purchasers are solely responsible for the choice, selection and use of the st products and services described herein, and st as sumes no liability whatsoever relating to the choice, selection or use of the st products and services described herein. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. i f any part of this document refers to any third party products or services it shall not be deemed a license grant by st for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoev er of such third party products or services or any intellectual property contained therein. unless otherwise set forth in st?s terms and conditions of sale st disclaims any express or implied warranty with respect to the use and/or sale of st products including without limitation implied warranties of merchantability, fitness for a parti cular purpose (and their equivalents under the laws of any jurisdiction), or infringement of any patent, copyright or other intellectual property right. unless expressly approved in writing by an authorized st representative, st products are not recommended, authorized or warranted for use in military , air craft, space, life saving, or life sustaining applications, nor in products or systems where failure or malfunction may result in personal injury, death, or severe property or environmental damage. st products which are not specified as "automotive grade" may only be used in automotive applications at user?s own risk. resale of st products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by st for the st product or service described herein and shall not create or extend in any manner whatsoev er, any liability of st. st and the st logo are trademarks or registered trademarks of st in various countries. information in this document supersedes and replaces all information previously supplied. the st logo is a registered trademark of stmicroelectronics. all other names are the property of their respective owners. ? 2010 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - philippines - singapore - spain - sweden - switzerland - united kingdom - united states of america www.st.com

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