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  stn 18t 20 n channel enhancement mode mosfet 18 .0 a stanson technology 120 bentley square, mountain view, ca 94040 usa www.stansontech.com copyright ?200 8 , stanson corp. stn 18 t 20 2 0 12 . v1 description stn 18t 20 is the n - channel logic enhancement mode power field effect transistor which is produced using high cell density, dmos trench technology. this high density process is especially tailored to minimize on - state resistance. these devices are particularly suited for low voltage application such as power management and other battery powered circuits where high - side switching . pin configuration to - 252 part marking y : year code a: date code q: process code feature l 200 v/ 12 a, r ds(on) = 17 0 m (typ.) @v gs = 10v l super high density cell design for extremely low r ds(on) l exceptional on - resistance and maximum dc current capability l to - 252 package design
stn 18t 20 n channel enhancement mode mosfet 18 .0 a stanson technology 120 bentley square, mountain view, ca 94040 usa www.stansontech.com copyright ?200 8 , stanson corp. stn 18 t 20 2 0 12 . v1 absoulte maximum ratings (ta = 25 unless otherwise noted ) parameter symbol typical unit drain - source voltage vdss 200 v gate - source voltage vgss 3 0 v continuous drain current (tj=150 ) ta=25 ta= 10 0 id 18 11.4 a pulsed drain current idm 36 a avalanche current i as 17 mj power dissipation ta=25 pd 112 w operation junction temperature tj 150 storgae temperature range tstg - 55/150 thermal resistance - junction to ambient r ja 80 /w
stn 18t 20 n channel enhancement mode mosfet 18 .0 a stanson technology 120 bentley square, mountain view, ca 94040 usa www.stansontech.com copyright ?200 8 , stanson corp. stn 18 t 20 2 0 12 . v1 electrical characteristics ( ta = 25 unless otherwise noted ) parameter symbol condition min typ max unit static drain - source breakdown voltage v (br)dss v gs =0v,id= 250ua 20 0 v gate threshold voltage v gs(th) v ds =v gs ,id = 2 50ua 2 5 v gate leakage current i gss v ds =0v,v gs = 3 0v ?00 na zero gate voltage drain current i dss v ds = 1 6 0 v,v gs =0v 2 ua on - state drain current i d( on) v ds R 5 v,v gs = 10v 18 a drain - source on - resistance r ds(on) v gs = 10v,i d = 12 a 1 70 2 20 m forward transconductance gfs v ds = 1 5v,i d = 20 a 8.5 s diode forward voltage v sd i s = 1a ,v gs =0v 1 v dynamic total gate charge q g v ds = 160 v,v gs = 10v i d 12 a 17.6 25 nc gate - source charge q gs 7.6 11 gate - drain charge q gd 3.7 5.2 input capacitance c iss v ds = 25 ,v g s =0v f =1mhz 1 000 1400 pf output capacitance c oss 11 0 155 reverse transfer c apacitance c rss 2.4 3.5 turn - on time t d(on) tr v d s = 100 ,r g = 3.3 v gen = 10 v , i d 12 a r g = 1.0 9.4 19 ns 23 41 turn - off time t d(off) tf 18.4 37 15.6 21.8
stn 18t 20 n channel enhancement mode mosfet 18 .0 a stanson technology 120 bentley square, mountain view, ca 94040 usa www.stansontech.com copyright ?200 8 , stanson corp. stn 18 t 20 2 0 12 . v1 package outline sop - 8p


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