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(1/11) 2007-01-17 (ver.0.2) product information features (1) 12.1?xga(1024x768 pixels) display size for notebook pc (2) led backlight ( led 44pcs : 11 serial connection x 4 ) (3) low reflection, anti-glare (4) light weight design : 165g(typ) mechanical specifications item specifications dimensional outline (typ.) 255.0( w ) x 198.0 ( h ) x 2.9/4.6( d ) mm number of pixels 1024 ( w ) x 768( h ) pixels active area 245.76( w ) x 184.32( h ) mm pixel pitch 0.240( w ) x 0.240( h ) weight (approximately) 165 g (typ) backlight led side-light-sysytem absolute maximum ratings item min. max. unit ( v dd ) -0.3 4.0 v supply voltage ( v led ) 0 5.0 v led currency ( i led ) - 30 ma input signal voltage ( v in ) -0.3 v dd +0.3 v operating temperature 0 50 c storage temperature -20 60 c storage humidity 10 90 %(rh) electrical specification item min. typ. max. unit remarks supply voltage ( v dd ) 3.0 3.3 3.6 v supply led currency ( i led ) --- --- 18 rma *2 supply led voltage ( v led ) 25.413 34.59 43.73 v @1parallel common mode input voltage ( v cm ) 1.0 1.25 2.0 v differential input amplitude ( v id ) 100 --- 600 mv current consumption *1 ( i dd ) --- (200) (320) ma power consumption --- (3.2) --- w i led =18ma *1 : 8 color bars pattern *2 : the current value of each row should be the same value. led driver supply should be constant current type. optical specification ( t a=25 c) item min. typ. max. unit remarks contrast ratio ( cr ) 200 (250) --- --- response time ( t on ) --- --- 40 ms ( t off ) --- 40 ms luminance ( l ) 140 200 --- cd/m 2 i led =18ma *the information contained herein is presented only as a guide for the applications of our products . no responsibility is assum ed by toshiba matsushita display technology or other rights of the third parties wh ich may result from its use. no license is granted by implication or otherwise under any patent or patent rights of toshiba matsushita display technology or others. *the information contained herein may be changed without prio r notice. it is therefore advisable to contact toshiba matsushita display technology before proceeding with the design of equipment incorporating this product. 31cm colour tft-lcd module (12.1 type) LTD121EDFS (p-si tft) tentative toshiba matsushita display technology co., ltd.
(2/11) 2007-01-17 (ver.0.2) LTD121EDFS dimensional outline (front side) tentative unit : mm standard tolerance : 0.5 (3/11) 2007-01-17 (ver.0.2) LTD121EDFS (front side) (4/11) 2007-01-17 (ver.0.2) LTD121EDFS block diagram 1, 1 2, 1 x2 n-1 , 1 x2 n , 1 1024, 1 1, 2 1, y x 2n-1 , y x 2n , y 1, 768 1024,768 1024 pixels 768 pixels cn1 circuit generation voltage manipulation gray scale connector liquid crystal panel converter dc/dc y-driver panel controller lvds include y-driver x-driver led 1024 x 768 pixels (5/11) 2007-01-17 (ver.0.2) LTD121EDFS timing chart (1) vertical timing tvp vspw vspw vsync tvsu tvhd va vbl hsync tvbp tvfp de data clk (2) horizontal timing thp hspw ta hspw hsync thbp thfp de odd-data even-data tc clk ha hbl x,1 x,2 x,767 x,768 1,y 3,y 5,y 1019,y 1021,y 1023,y 2,y 4,y 6,y 1020,y 1022,y 1024,y (6/11) 2007-01-17 (ver.0.2) LTD121EDFS timing specification 1) 2) 3) 4) 5) 6) item symbol min. typ. max. unit 1334 1344 1462 t c horizontal scanning term t h - 20.68 - us h-sync pulse width 12 - 140 t c horizontal front porch t hfp 4 - 136 t c horizontal back porch t a 4 - 136 t c horizontal blanking term 295 320 438 t c horizontal display term ha 1024 1024 1024 t c 778 806 860 t hp frame period t vp - 16.67 17.24 ms v-sync pulse width 2 - 7 t hp v-sync set up time (to h-sync) t vsu 8 - 14 t c v-sync hold time t vhd 8 - - - vertical front porch t vfp 2 - 8 - vertical back porch t vbp 8 - 14 - vertical blanking term 10 38 92 t hp vertical display term va 768 768 768 t hp de pulse width ha 1024 1024 1024 t c clock period t c 15.000 15.384 - ns note 1) refer to ?timing chart? and lvds (thc63lvdf 84a-85) specifications by thine electronics, inc. note 2) if clk is fixed to "h" or "l" level for certain period while de is supplied, the panel may be damaged. note 3) please adjust lcd operating signal timing and led driving frequency, to optimize the display quality. there is a possibility that flicker is observed by the in terference of lcd operating signal timing and led driving condition (especially driving frequency), even if the condition satisfies above timing specifications and recommended operating conditions shown in 3. note 4) do not make tv , t h, t hbp and tvds fluctuate. if t v, t h, t hbp and t vds are fluctuate, the panel displays black. note 5) in case of using the long frame period, the det erioration of display quality, noise etc. may be occurred. note 6) clk count of each horizontal scanning time should be always the same. v-blanking period should be ? n ? x ?horizontal scanning time?. ( n : integer) frame period should be always the same. note 7) please keep below equations. vbl = t vfp + t vbp hspw = hbl ? t hfp ? ta t hbp = hspw + ta (7/11) 2007-01-17 (ver.0.2) LTD121EDFS connector pin assignment for interface cn1 input signal connector : fi-jh30/jae terminal no . symbol 1vad 2nc 3vcd1 4vcd2 5vcd3 6vcd4 7nc 8vdd 9vdd 10 vdd 11 vdd 12 gnd 13 gnd 14 nc 15 nc 16 nc 17 vedid 18 clkedid 19 dataedid 20 gnd 21 gnd 22 rxin0- 23 rxin0+ 24 rxin1- 25 rxin1+ 26 rxin2- 27 rxin2+ 28 rxclkin- 29 rxclkin+ 30 gnd led cathode(negative) led cathode(negative) led cathode(negative) ddc 3.3v power ddc clock led cathode(negative) lvds differential data lvds differential data lvds differential data lvds differential data lvds differential data ddc data lvds differential data non-connection non-connection non-connection +3.3v +3.3v +3.3v function +3.3v non-connection led anode(positive) non-connection note 1) please connect gnd pin to ground. don't use it as no-connect nor connection with high impedance. note 2) please connect nc to nothing. don't connect it to ground nor to other signal input. (8/11) 2007-01-17 (ver.0.2) LTD121EDFS recommended transmitter (thc63lvdf63a,thc63lvdm63a,thc63lvdm63a-85) to LTD121EDFS interface assignment case1: 6bit transmitter thc63lvdf63a,thc63lvdm63a,thc63lvdm63a-85 input terminal no. input signal (graphics controller output signal) LTD121EDFS interface (cn1) symbol terminal symbol function output signal symbol terminal symbol tin0 44 r0 red pixels display data (lsb) tin1 45 r1 red pixels display data tin2 47 r2 red pixels display data tin3 48 r3 red pixels display data tin4 1 r4 red pixels display data tin5 3 r5 red pixels display data (msb) tin6 4 g0 green pixels display data (lsb) tout0- tout0+ no.22 no.23 in0- in0+ tin7 6 g1 green pixels display data tin8 7 g2 green pixels display data tin9 9 g3 green pixels display data tin10 10 g4 green pixels display data tin11 12 g5 green pixels display data (msb) tin12 13 b0 blue pixels display data (lsb) tin13 15 b1 blue pixels display data tout1- tout1+ no.24 no.25 in1- in1+ tin14 16 b2 blue pixels display data tin15 18 b3 blue pixels display data tin16 19 b4 blue pixels display data tin17 20 b5 blue pixels display data (msb) tin18 22 hsync h-sync tin19 23 vsync v-sync tin20 25 de compound synchronization signal tout2- tout2+ no.26 no.27 in2- in2+ clk in 26 clk data sampling clock tclk out- tclk out+ no.28 no.29 clk- clk+ note 1) please connect nc pin to nothing. don't connect it to ground nor to other signal input. g0 r5 r4 r3 r2 r1 r0 g5 b0 b1 g4 g1 b4 b5 g3 g2 b2 b3 in 0 in 1 in 2 tin4 tin3 tin2 tin1 tin0 tin13 t in 1 2 t in 1 1 t in 1 0 t in 9 t in 8 tin7 tin20 t in19 t in18 t in17 t in16 t in15 tin14 tin6 tin5 hsync vsync de (9/11) 2007-01-17 (ver.0.2) LTD121EDFS & |