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cystech electronics corp. spec. no. : c868j3 issued date : 2012.09.24 revised date : 2013.12.30 page no. : 1/9 MTDA5N10J3 cystek product specification n -channel logic level enha ncement mode power mosfet MTDA5N10J3 bv dss 100v i d 10a r dson @v gs =10v, i d =10a 144m (typ) r dson @v gs =5v, i d =10a 165m (typ) features ? low gate charge ? simple drive requirement ? pb-free lead plating & halogen-free package equivalent circuit outline to-252(dpak) ordering information device package shipping MTDA5N10J3-0-t3-g to-252 (pb-free lead plating & halogen-free package) 2500 pcs / tape & reel MTDA5N10J3 g d s g gate d drain s source environment friendly grade : s for rohs compliant products, g for rohs compliant and green compound products packing spec, t3 : 2500 pc s / tape & reel, 13? reel product rank, zero for no rank products product name
cystech electronics corp. spec. no. : c868j3 issued date : 2012.09.24 revised date : 2013.12.30 page no. : 2/9 MTDA5N10J3 cystek product specification absolute maximum ratings (t c =25 c, unless otherwise noted) parameter symbol limits unit drain-source voltage v ds 100 gate-source voltage v gs 30 v continuous drain current @ t c =25 c i d 10.2 continuous drain current @ t c =100c i d 6.4 pulsed drain current *1 i dm 20 avalanche current i as 10 a avalanche energy @ l=0.15mh, i d =10a, r g =25 e as 7.2 repetitive avalanche energy @ l=0.05mh *2 e ar 3.6 mj total power dissipation @t c =25 35 total power dissipation @t c =100 pd 14 w operating junction and storage te mperature range tj, tstg -55~+150 c note : *1 . pulse width limited by maximum junction temperature *2. duty cycle 1% thermal data parameter symbol value unit thermal resistance, junction-to-case, max r th,j-c 3.6 thermal resistance, junction-to-ambient, max r th,j-a 50 (note) thermal resistance, junction-to-ambient, max r th,j-a 110 c/w note : when the device is mounted on 1 in 2 fr-4 board with 2 oz. copper, in a still air environment with t a =25 c. the value in any given application depends on the user?s specific board design. characteristics (tc=25 c, unless otherwise specified) symbol min. typ. max. unit test conditions static bv dss 100 - - v gs =0, i d =250 a v gs(th) 1.5 2.2 3 v v ds =v gs , i d =250 a i gss - - 100 na v gs = 30, v ds =0 - - 1 v ds =80v, v gs =0 i dss - - 25 a v ds =70v, v gs =0, t j =125 c - 144 170 v gs =10v, i d =10a r ds(on) *1 - 165 200 m v gs =5v, i d =10a g fs *1 - 10 - s v ds =5v, i d =10a dynamic qg *1, 2 - 9 - qgs *1, 2 - 1 - qgd *1, 2 - 4 - nc i d =10a, v ds =80v, v gs =10v t d(on) *1, 2 - 5 - tr *1, 2 - 3 - t d(off) *1, 2 - 10 - t f *1, 2 - 3 - ns v ds =50v, i d =1a, v gs =10v, r g =6 cystech electronics corp. spec. no. : c868j3 issued date : 2012.09.24 revised date : 2013.12.30 page no. : 3/9 MTDA5N10J3 cystek product specification ciss - 253 - coss - 36 - crss - 14 - pf v gs =0v, v ds =25v, f=1mhz rg - 2 - v gs =15mv, v ds =0, f=1mhz source-drain diode i s *1 - - 10 i sm *3 - - 20 a v sd *1 - 0.91 1.3 v i f =i s , v gs =0v trr - 120 - ns qrr - 520 - nc i f =10a, di f /dt=100a/ s note : *1.pulse test : pulse width 300 s, duty cycle 2% *2.independent of operating temperature *3.pulse width limited by maximum junction temperature. recommended soldering footprint cystech electronics corp. spec. no. : c868j3 issued date : 2012.09.24 revised date : 2013.12.30 page no. : 4/9 MTDA5N10J3 cystek product specification typical characteristics typical output characteristics 0 5 10 15 20 0246810 v ds , drain-source voltage(v) i d , drain current(a) 10v 9v 8v 7v 6v v gs =4v v gs =3v v gs =5v brekdown voltage vs ambient temperature 0.4 0.6 0.8 1 1.2 1.4 -75 -50 -25 0 25 50 75 100 125 150 175 tj, junction temperature(c) bv dss , normalized drain-source breakdown voltage i d =250 a, v gs =0v static drain-source on-state resistance vs drain current 100 1000 0.01 0.1 1 10 100 i d , drain current(a) r ds(on) , static drain-source on-state resistance(m) v gs =10v v gs =3v v gs =4.5v reverse drain current vs source-drain voltage 0.2 0.4 0.6 0.8 1 1.2 0 4 8 12 16 20 i dr , reverse drain current(a) v sd , source-drain voltage(v) tj=25c tj=150c static drain-source on-state resistance vs gate-source voltage 100 150 200 250 300 350 400 450 500 024681 0 drain-source on-state resistance vs junction tempearture 0.4 0.8 1.2 1.6 2 2.4 -60 -40 -20 0 20 40 60 80 100 120 140 160 tj, junction temperature(c) r ds(on) , normalized static drain- source on-state resistance v gs =10v, i d =10a r ds( on) @tj=25c : 139m v gs , gate-source voltage(v) r ds(on) , static drain-source on- state resistance(m) i d =10a cystech electronics corp. spec. no. : c868j3 issued date : 2012.09.24 revised date : 2013.12.30 page no. : 5/9 MTDA5N10J3 cystek product specification typical characteristics(cont.) capacitance vs drain-to-source voltage 10 100 1000 0.1 1 10 100 v ds , drain-source voltage(v) capacitance---(pf) c oss ciss crss normalizedthreshold voltage vs junction tempearture 0.4 0.6 0.8 1 1.2 1.4 -60 -20 20 60 100 140 tj, junction temperature(c) v gs(th) , normalized threshold voltage i d =250 a forward transfer admittance vs drain current 0.01 0.1 1 10 0.001 0.01 0.1 1 10 i d , drain current(a) g fs , forward transfer admittance(s) v ds =5v pulsed ta=25c gate charge characteristics 0 2 4 6 8 10 024681012 total gate charge---qg(nc) v gs , gate-source voltage(v) v ds =80v i d =10a maximum safe operating area 0.1 1 10 100 1 10 100 1000 v ds , drain-source voltage(v) i d , drain current(a) dc 10ms 100ms 1ms 100 s 10 s r ds( on) limit t c =25c, tj=150, v gs =10v r jc =3.6c/w, single pulse maximum drain current vs case temperature 0 2 4 6 8 10 12 25 50 75 100 125 150 175 t c , case temperature(c) i d , maximum drain current(a) v gs =10v, r jc =3.6c/w cystech electronics corp. spec. no. : c868j3 issued date : 2012.09.24 revised date : 2013.12.30 page no. : 6/9 MTDA5N10J3 cystek product specification typical characteristics(cont.) typical transfer characteristics 0 2 4 6 8 10 12 14 16 18 20 024681012 v gs , gate-source voltage(v) i d , drain current (a) v ds =10v transient thermal response curves 0.01 0.1 1 10 1.e-05 1.e-04 1.e-03 1.e-02 1.e-01 1.e+00 1.e+01 t 1 , square wave pulse duration(s) z jc (t), thermal response single pulse 0.01 0.02 0.05 0.1 0.2 d=0.5 1.z jc (t)=3.6 c/w max. 2.duty factor, d=t 1 /t 2 3.t jm -t c =p dm *z jc (t) cystech electronics corp. spec. no. : c868j3 issued date : 2012.09.24 revised date : 2013.12.30 page no. : 7/9 MTDA5N10J3 cystek product specification reel dimension carrier tape dimension cystech electronics corp. spec. no. : c868j3 issued date : 2012.09.24 revised date : 2013.12.30 page no. : 8/9 MTDA5N10J3 cystek product specification recommended wave soldering condition soldering time product peak temperature pb-free devices 260 +0/-5 c 5 +1/-1 seconds recommended temperature profile for ir reflow profile feature sn-pb eutectic assembly pb-free assembly average ramp-up rate (tsmax to tp) 3 c/second max. 3 c/second max. preheat ? temperature min(t s min) ? temperature max(t s max) ? time(ts min to ts max ) 100 c 150 c 60-120 seconds 150 c 200 c 60-180 seconds time maintained above: ? temperature (t l ) ? time (t l ) 183 c 60-150 seconds 217 c 60-150 seconds peak temperature(t p ) 240 +0/-5 c 260 +0/-5 c time within 5 c of actual peak 10-30 seconds 20-40 seconds temperature(tp) ramp down rate 6 c/second max. 6 c/second max. time 25 c to peak temperature 6 minutes max. 8 minutes max. note : all temperatures refer to topside of t he package, measured on the package body surface. cystech electronics corp. spec. no. : c868j3 issued date : 2012.09.24 revised date : 2013.12.30 page no. : 9/9 MTDA5N10J3 cystek product specification to-252 dimension inches millimeters inches millimeters dim min. max. min. max. marking: style: pin 1.gate 2.drain 3.source 4.drain 3-lead to-252 plastic surface mount package cystek package code: j3 device name date code da5 n10 1 2 3 4 dim min. max. min. max. a 0.087 0.094 2.200 2.400 e 0.086 0.094 2.186 2.386 a1 0.000 0.005 0.000 0.127 e1 0.172 0.188 4.372 4.772 b 0.039 0.048 0.990 1.210 h 0.163 ref 4.140 ref b 0.026 0.034 0.660 0.860 k 0.190 ref 4.830 ref b1 0.026 0.034 0.660 0.860 l 0.386 0.409 9.800 10.400 c 0.018 0.023 0.460 0.580 l1 0.114 ref 2.900 ref c1 0.018 0.023 0.460 0.580 l2 0.055 0.067 1.400 1.700 d 0.256 0.264 6.500 6.700 l3 0.024 0.039 0.600 1.000 d1 0.201 0.215 5.100 5.460 p 0.026 ref 0.650 ref e 0.236 0.244 6.000 6.200 v 0.211 ref 5.350 ref notes: 1.controlling dimension: millimeters. 2.maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.if there is any question with packing specification or packing method, please c ontact your local cystek sales office. material: ? lead : pure tin plated. ? mold compound: epoxy resin family, flammability solid burning class: ul94v-0. important notice: ? all rights are reserved. reproduction in whole or in part is prohibited without the prior written approval of cystek. ? cystek reserves the right to make changes to its products without notice. ? cystek semiconductor products are not warranted to be suitable for use in life-support applications, or systems. ? cystek assumes no liability for any consequence of customer pr oduct design, infringement of pat ents, or application assistance . |
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