VN0808L/ls, vq1006p vishay siliconix document number: 70214 s-58620erev.c , 21-jun-99 www.siliconix.com faxback 408-970-5600 1 n-channel enhancement-mode mosfet transistors
part number v (br)dss min (v) r ds(on) max ( ) v gs(th) (v) i d (a) VN0808L 80 4 @ v gs = 10 v 0.8 to 2 0.3 VN0808Ls 80 4 @ v gs = 10 v 0.8 to 2 0.33 vq1006p 90 4 @ v gs = 10 v 0.8 to 2.5 0.4 low on-resistance: 3.6 low threshold: 1.6 v low input capacitance: 35 pf fast switching speed: 6 ns low input and output leakage low offset voltage low-voltage operation easily driven without buffer high-speed circuits low error voltage direct logic-level interface: ttl/cmos drivers: relays, solenoids, lamps, hammers, displays, memories, transistors, etc. battery operated systems solid-state relays to-226aa (to-92) top view s d g 1 2 3 to-92s top view s d g 1 2 3 sidebraze: vq1006p VN0808L VN0808Ls 1 2 3 4 5 6 7 14 13 12 11 10 9 8 top view dual-in-line d 1 d 4 s 1 s 4 g 1 g 4 nc nc g 2 g 3 s 2 s 3 d 2 d 3 n n n n
p sbl VN0808L VN0808Ls vq1006p ui parameter symbol VN0808L VN0808Ls single total quad unit drain-source voltage v ds 80 80 90 v gate-source voltage v gs 30 30 20 v continuous drain current (t 150 c) t a = 25 c i d 0.3 0.33 0.4 a (t j = 150 c) t a = 100 c i d 0.19 0.21 0.23 a pulsed drain current a i dm 1.9 1.9 2 power dissipation t a = 25 c p d 0.8 0.9 1.3 2 w power dissipation t a = 100 c p d 0.32 0.4 0.52 0.8 w maximum junction-to-ambient r thja 156 139 96 62.5 c/w operating junction and storage temperature range t j , t stg 55 to 150 c notes a. pulse width limited by maximum junction temperature.
VN0808L/ls, vq1006p vishay siliconix www.siliconix.com faxback 408-970-5600 2 document number: 70214 s-58620erev.c , 21-jun-99
limits VN0808L/ls vq1006p parameter symbol test conditions typ a min max min max unit static drain-source breakdown voltage v (br)dss v gs = 0 v, i d = 10 a 125 80 90 v gate-threshold voltage v gs(th) v ds = v gs , i d = 1 ma 1.6 0.8 2 0.8 2.5 v gate - body leakage i gss v ds = 0 v, v gs = 15 v 100 100 na gate - body leakage i gss t j = 125 c 500 na zgvl dic i v ds = 80 v, v gs = 0 v 10 a zero gate voltage drain current i dss t j = 125 c 500 a zero gate v oltage drain current i dss v ds = 72 v, v gs = 0 v 1 a t j = 125 c 500 on-state drain current b i d(on) v ds = 10 v, v gs = 10 v 1.8 1.5 1.5 a dis or i b v gs = 5 v, i d = 0.3 a 3.8 5 drain-source on-resistance b r ds(on) v gs = 10 v, i d = 1 a 3.6 4 4.5 t j = 125 c 6.7 8 8.6 forward transconductance b g fs v ds = 10 v, i d = 0.5 a 350 170 170 ms common source output conductance b g os v ds = 10 v, i d = 0.1 a 0.23 ms dynamic input capacitance c iss v 25v v 0v f 1mh 35 50 60 f output capacitance c oss v ds = 25 v, v gs = 0 v, f = 1 mhz 15 40 50 pf reverse transfer capacitance c rss 2 10 10 switching c turn-on time t on v dd = 25 v, r l = 23 i d 1a v gen =10v 6 10 10 ns turn-off time t off i d 1 a , v gen = 10 v r g = 25 8 10 10 ns notes a. for design aid only, not subject to production testing.. vndq09 b. pulse test: pw 300 s duty cycle 2%. c. switching time is essentially independent of operating temperature.
VN0808L/ls, vq1006p vishay siliconix document number: 70214 s-58620erev.c , 21-jun-99 www.siliconix.com faxback 408-970-5600 3
ohmic region characteristics output characteristics for low gate drive on-resistance vs. drain current normalized on-resistance vs. junction temperature transfer characteristics on-resistance vs. gate-to-source voltage v gs gate-source voltage (v) v gs gate-source voltage (v) drain current (a) i d drain current (ma) i d drain current (ma) i d on-resistance ( r ds(on) v ds drain-to-source voltage (v) v ds drain-to-source voltage (v) i d drain current (a) t j junction temperature ( c) r ds(on) drain-source on-resistance (normalized) 1.0 0 1.0 2.0 3.0 4.0 5.0 0.8 0.6 0.4 0.2 0 6 v 5 v 4 v 3 v 2 v t j = 25 c v gs = 10 v 0.5 0.4 0.3 0 02 10 0.2 0.1 468 125 c t j = 55 c 10 8 6 0 0 0.5 2.5 4 2 1.0 1.5 2.0 t j = 25 c 100 0 0.4 0.8 1.2 1.6 2.0 80 60 40 20 0 2.8 v 2.6 v 2.4 v 2.2 v 2.0 v 1.8 v t j = 25 c v gs = 3 v 2.25 2.00 1.75 0.50 50 10 150 1.50 1.25 30 70 110 1.00 0.75 7 0 4 8 12 16 20 6 5 4 0 3 2 1 0.5 a 1.0 a 25 c v gs = 10 v v gs = 10 v v ds = 15 v i d = 0.1 a r ds(on) drain-source on-resistance ( ) )
VN0808L/ls, vq1006p vishay siliconix www.siliconix.com faxback 408-970-5600 4 document number: 70214 s-58620erev.c , 21-jun-99
threshold region capacitance gate charge load condition effects on switching normalized effective transient thermal impedance t 1 square wave pulse duration (sec) i d drain current (a) v ds drain-to-source voltage (v) v gs gate-to-source voltage (v) q g total gate charge (pc) drain current (ma) i d c capacitance (pf) gate-to-source voltage (v) v gs t switching time (ns) 125 100 75 0 010 50 50 25 20 30 40 c oss c iss c rss v gs = 0 v f = 1 mhz 10 1 0.01 0.5 0.1 1.0 1.5 2.0 25 c 55 c 125 c v gs = 5 v t j = 150 c 15.0 12.5 10.0 0 0 100 500 7.5 5.0 200 300 400 2.5 i d = 1.0 a v ds = 45 v 72 v 0.1 1 2 100 10 1 v dd = 25 v r l = 23 v gs = 0 to 10 v i d = 1.0 a t d(on) t d(off) t r t f 10 k duty cycle = 0.5 0.2 0.1 0.05 0.02 single pulse 1 0.01 0.1 0.01 0.1 1 100 10 1 k normalized effective transient thermal impedance, junction-to-ambient (to-226aa) 1. duty cycle, d = 2. per unit base = r thja = 156 c/w 3. t jm t a = p dm z thja (t) t 1 t 2 t 1 notes: p dm t 2
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