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? semiconductor components industries, llc, 2012 july, 2012 ? rev. 5 1 publication order number: CAT6243/d CAT6243 1 amp adjustable cmos ldo voltage regulator description the CAT6243 is a low dropout cmos voltage regulator providing up to 1000 ma of output current with fast response to load current and line voltage changes. CAT6243 offers a user adjustable output voltage from 0.8 v to 5.0 v and its low quiescent current make CAT6243 ideal for energy conscious designs. CAT6243 is available in a dpak ? 5 4 and 5 lead packages and in a space saving 3 mm x 3 mm wdfn ? 6 package with a power pad for heat sinking to the pcb. features ? guaranteed 1000 ma continuous output current ? v out : 0.8 v to 5.0 v ? dropout voltage of 350 mv typical at 1000 ma ? 2.0% output voltage accuracy over temperature ? no ? load ground current of 70 a typical ? full ? load ground current of 140 a typical ? ?zero? current shutdown mode ? under voltage lockout ? stable with ceramic output capacitors ? current limit and thermal protection ? 4 and 5 lead dpak ? 5 and 3 mm x 3 mm wdfn ? 6 power packages ? these devices are pb ? free, halogen free/bfr free and are rohs compliant typical applications ? dsp core and i/o voltages ? fpgas, asics ? pdas, mobile phones, gps ? camcorders and cameras ? hard disk drives marking diagrams 6243 = specific device code a = assembly location xxx = last three digits of = assembly lot number y = production year (last digit) ww = production week (two digits) = pb ? free package 6243 axxx yww 1 *pb ? free indicator, ?g? or microdot ? ?, may or may not be present. x6243yg alyww x = p (cat) 6243 = device code y = output voltage = w = adjustable g = pb ? free package a = assembly location l = wafer lot y = year ww = work week x6243yg alyww http://onsemi.com wdfn ? 6 3 x 3 mm case 511ap pin connections (top views) vin vout en gnd byp 1 adj dpak ? 5 lead 3 crop case 175aa see detailed ordering and shipping information in the package dimensions section on page 15 of this data sheet. ordering information 1 gnd (tab) 5 adj vout gnd vin en dpak ? 5 to ? 252 case 369ae adj vout gnd vin en 15 gnd (tab)
CAT6243 http://onsemi.com 2 figure 1. application schematic vin enable CAT6243 adj byp vout gnd vin 1 f vout (optional) c byp c in 2.2 f c out figure 2. simplified block diagram adj gnd en 2.5 m vin byp vout enable logic thermal shutdown i sense v ref + ? + ? table 1. pin function description pin # wdfn ? 6 pin # dpak ? 5 ? 4 pin # dpak ? 5 ? 5 pin name description 1 5 5 en the enable input. an active high input, turning on the ldo. this input should be tied to v in if the ldo is not intended to be shut off during normal operation. a pull ? down 2.5 m resistor maintains the circuit in the off state if the pin is left open. 2, pad 3, tab 3, tab gnd power supply ground; device substrate. the center pad is internally con- nected to ground and as such can cause short circuits to signal traces run- ning beneath the ic. this pad is intended for heat sinking the ic to the pcb and is typically connected to the pcb ground plane. 3 nc nc byp bypass input. placing a capacitor of 100 pf to 470 pf between byp and ground reduces noise on v out. this capacitor is optional and it increases the turn ? on time. 4 2 2 v out regulated output voltage. a protection block eliminates any current flow from output to input if v out > v in . 5 1 1 adj output voltage adjust input. this input ties to the common point of a resistor divider which determines the regulator?s output voltage. see applications section for details on selecting resistor values. 6 4 4 v in positive power supply input. supplies power for v out as well as the regu- lator?s internal circuitry.
CAT6243 http://onsemi.com 3 table 2. absolute maximum ratings rating symbol value unit input voltage range (note 1) v in ? 0.3 to 6.0 v output voltage range v out ? 0.3 to 6.0 v enable input range en ? 0.3 to 5.5 v or (v in + 0.3), whichever is lower v adjust input range adj ? 0.3 to 5.5 v v bypass input range byp ? 0.3 to 5.5 v or (v in + 0.3), whichever is lower v power dissipation pd internally limited mw maximum junction temperature t j(max) 150 c storage temperature range t stg ? 65 to 150 c esd capability, human body model (note 2) esd hbm 2 kv esd capability, machine model (note 2) esd mm 200 v lead temperature soldering reflow (smd styles only), pb ? free versions (note 3) t sld 260 c stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above t he recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may af fect device reliability. 1. refer to electrical characteristis and application information for safe operating range. 2. this device series incorporates esd protection and is tested by the following methods: esd human body model tested per aec ? q100 ? 002 (eia/jesd22 ? a114) esd machine model tested per aec ? q100 ? 003 (eia/jesd22 ? a115) latchup current maximum rating: 150 ma per jedec standard: jesd78 3. for information, please refer to our soldering and mounting techniques reference manual, solderrm/d table 3. thermal characteristics rating symbol value unit thermal characteristics, wdfn ? 6, 3 x 3 mm thermal resistance, junction ? to ? air: 1 in 2 /1 oz. copper (note 4) thermal reference, junction ? to ? case (note 4) r ja r jl 55 10 c/w 4. values based on copper area of 645 mm 2 (or 1 in 2 ) of 1 oz copper thickness and fr4 pcb substrate. table 4. operating ranges (note 5) rating symbol min max unit input voltage CAT6243 (note 6) v in 1.8 5.5 v output current i out 0.1 1000 ma output voltage v out 0.8 5.0 v ambient temperature t a ? 40 85 c 5. refer to electrical characteristis and application information for safe operating range. 6. minimum v in_min = 1.8 v or (v out + v do ), whichever is higher. table 5. electrical characteristics (v in = (v out + 1 v) or v in_min , whichever is higher, c in = 1 f, c out = 2.2 f, for typical values t a = 25 c, for bold values t a = ? 40 c to 85 c; unless otherwise noted.) symbol parameter conditions min typ max unit input / output v in input voltage 1.8 5.5 v v out output voltage range 0.8 5.0 v v out ? acc output voltage accuracy initial accuracy, i out = 1 ma ? 2 2 % v adj voltage at adj input 0.784 0.8 0.816 v tc out output voltage temp. coefficient 25 ppm/ c i out output current 0.0001 1 a
CAT6243 http://onsemi.com 4 table 5. electrical characteristics (v in = (v out + 1 v) or v in_min , whichever is higher, c in = 1 f, c out = 2.2 f, for typical values t a = 25 c, for bold values t a = ? 40 c to 85 c; unless otherwise noted.) symbol unit max typ min conditions parameter input / output v r ? line line regulation v in = v out + 1.0 v to 5.5 v, i out = 10 ma ? 0.2 0.05 0.2 %/v v in = v out + 1.0 v to 5.5 v, i out = 10 ma ? 0.35 0.35 v r ? load load regulation i out = 100 a to 1000 ma 1.5 2 % i out = 100 a to 1000 ma 3 v do v out = 1.2 v i out = 300 ma t a = 25 c 600 mv v out = 2.5 v 110 v out = 3.3 v 85 v out = 1.2 v i out = 1 a t a = 25 c 625 v out = 2.5 v 350 v out = 3.3 v 275 i adj adj input current 100 na i gnd ground current i out = 0 a 70 a i out = 0 a 100 i out = 1000 ma 140 200 i out = 1000 ma 250 i gnd ? sd shutdown ground current v en < 0.4 v 2 a isc output short circuit current limit v out = 0 v 900 ma psrr and noise psrr power supply rejection ratio CAT6243 f = 1 khz, byp = 470 pf, i out = 10 ma 54 db f = 20 khz, byp = 470 pf, i out = 10 ma 42 e n output noise voltage for 1.8 v output bw = 10 hz to 100 khz byp = 470 pf, i out = 10 ma 45 vrms uvlo, r out and esr v uvlo under voltage lockout threshold 1.65 1.75 v r out ? sh on resistance of discharge transistor 150 esr c out equivalent series resistance 5 500 m enable input v hi logic high level v in = 1.8 to 5.5 v 1.6 v v lo logic low level v in = 1.8 to 5.5 v 0.4 v i en enable input current v en = 0.4 v 0.15 1 a v en = v in = 2.5 v 1 3 r en enable pull ? down resistor 2.5 m timing t on turn ? on time c byp = 0 pf 230 s c byp = 470 pf 1600 thermal protection t sd thermal shutdown 145 c t hys thermal hysteresis 10 c 7. performance guaranteed over the indicated operating temperature range by design and/or characterization tested at t j = t a = 25 c. low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible.
CAT6243 http://onsemi.com 5 typical characteristics (shown for v out = 2.5 v, v in = 3.5 v, i out = 1 ma, c in = 1 f, c out = 4.7 f, c byp = 0, and t a = 25 c unless otherwise specified.) figure 3. output voltage vs. load current figure 4. output voltage vs. input voltage input voltage (v) 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 2.48 2.49 2.50 2.51 2.52 figure 5. ground current vs. load current figure 6. ground current vs. input voltage output load current (ma) input voltage (v) 900 700 600 500 300 200 100 0 50 60 70 80 90 150 4.5 3.5 3.0 2.5 1.5 1.0 0.5 0 0 10 20 30 40 50 60 100 figure 7. dropout voltage vs. load current figure 8. dropout characteristics output load current (ma) input voltage (v) 800 700 500 400 300 200 100 0 0 50 100 150 250 350 400 4.5 4.0 3.0 2.5 1.5 0.5 0 0 0.5 1.0 1.5 2.5 3.0 output voltage (v) ground current ( a) ground current ( a) dropout voltage (mv) output voltage (v) 5.5 400 800 1000 1.0 2.0 3.5 5.5 2.0 4.0 5.0 5.5 1000 200 300 output load current (ma) 900 800 600 400 300 200 100 0 2.45 2.46 2.48 2.49 2.51 2.52 2.54 2.55 output voltage (v) 500 1000 2.47 2.50 2.53 700 100 110 120 130 140 70 80 90 600 900 5.0 2.0 i out = 1000 ma i out = 1 ma
CAT6243 http://onsemi.com 6 typical characteristics (shown for v out = 2.5 v, v in = 3.5 v, i out = 1 ma, c in = 1 f, c out = 4.7 f, c byp = 0, and t a = 25 c unless otherwise specified.) figure 9. rising enable threshold vs. supply voltage figure 10. falling enable threshold vs. supply voltage input voltage (v) input voltage (v) 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 0 0.2 0.4 0.6 0.8 1.0 1.2 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 0 0.2 0.4 0.6 0.8 1.0 1.2 figure 11. current limit on output vs. supply voltage figure 12. psrr @ 10 ma input voltage (v) frequency (hz) 1e+01 0 10 20 30 40 60 70 80 enable threshold (v) enable threshold (v) psrr (db) 5.5 5.5 50 1e+02 1e+03 1e+04 1e+05 1e+06 figure 13. adjustable voltage vs. temperature figure 14. ground current vs. temperature temperature ( c) temperature ( c) 100 80 60 40 20 0 ? 20 ? 40 780 790 800 810 820 adjustable voltage (mv) ground current ( a) 120 100 80 60 40 20 0 ? 20 ? 40 40 50 60 70 80 120 5 4 3 2 1 0 0 200 400 800 1000 1200 current limit (ma) 600 1400 v out = 0
CAT6243 http://onsemi.com 7 transient characteristics (shown for v out = 2.0 v, v in = 3.0 v, i out = 1 ma, c in = 1 f, c out = 4.7 f, c byp = 0, and t a = 25 c unless otherwise specified.) figure 15. enable turn ? on (1 ma load) figure 16. enable turn ? off (1 ma load) figure 17. enable turn ? on (1000 ma load) figure 18. enable turn ? off (1000 ma load) figure 19. enable turn ? on (1 ma load) cbyp = 470 pf figure 20. enable turn ? on (1000 ma load) cbyp = 470 pf
CAT6243 http://onsemi.com 8 transient characteristics (shown for v out = 2.0 v, v in = 3.0 v, i out = 1 ma, c in = 1 f, c out = 4.7 f, c byp = 0, and t a = 25 c unless otherwise specified.) figure 21. slow enable operation (1 ma load) figure 22. slow enable operation (1000 ma load) figure 23. load transient response (1 ma to 1000 ma) figure 24. enable turn ? on (1 ma load) (v out = 0.8 v and v in = 1.8 v) figure 25. load transient response (1 ma to 400 ma) (v out = 0.8 v and v in = 1.8 v) figure 26. load transient response (1 ma to 800 ma) (v out = 0.8 v and v in = 1.8 v)
CAT6243 http://onsemi.com 9 pin functions v in positive power input. power is supplied to the device through the v in pin. a bypass capacitor is required on this pin if the device is more than six inches away from the main input filter capacitor. in general it is advisable to include a small bypass capacitor adjacent to the regulator. in battery ? powered circuits this is particularly important because the output impedance of a battery rises with frequency, so a bypass capacitor in the range of 1 f to 10 f is recommended. gnd ground. the negative voltage of the input power source. the center pad on the back of the package is also electrically ground. this pad is used for cooling the device by making connection to the buried ground plane through solder filled vias or by contact with a topside copper surface exposed to free flowing air. enable enable is an active high logic input which controls the regulator?s the output state. if enable < 0.4 v the regulator is shutdown and v out = 0 v. if enable > 1.6 v the regulator is active and supplying power to the load. if the regulator is intended to operate continuously and won?t be shut down from time to time enable should be tied to v in . byp the bypass capacitor input is used to decrease output voltage noise by placing a capacitor between byp and ground. the recommended range of capacitance is from 100 pf to 470 pf. values larger than this will provide no additional improvement and will further extend ca t6243?s startup time. a bypass capacitor is not required for operation and byp may be left open or floating if no capacitor is used but do not ground byp as this will interfere with the error amplifier?s functioning. adj adj = adjust and is the voltage control input. adj connects to the center point of a resistor divider which determines the ca t6243?s output voltage. see applications section for resistor selection guidelines. v out v out is the regulator?s output and supplies power to the load. v out can be shut off via the enable input. all CAT6243 members are designed to block reverse current, meaning anytime v out becomes greater than v in the pass fet will be shut off so there is no reverse current flow from output to input. CAT6243 is also equipped with an output discharge transistor that is turned on anytime enable is at a logic low. this transistor ensures v out discharges to 0 v when the regulator is shutdown. this is especially important when powering digital circuitry because if v out fails to reach 0 v their por (power ? on reset) circuitry may not trigger and scrambled data or unpredictable operations may result. a minimum output capacitor of 2.2 f should be placed between v out and gnd to insure stable operation. increasing the size of c out , up to 22 f, will improve transient response to large changes in load current.
CAT6243 http://onsemi.com 10 applications information input decoupling (c in ) a ceramic or tantalum 1 f capacitor is recommended and should be connected close to the CAT6243?s package. higher capacitance and lower esr will improve the overall line and load transient response. output decoupling (c out ) the minimum output decoupling value is 2.2 f and can be augmented to fulfill stringent load transient requirements. the regulator works with ceramic chip capacitors. larger values, up to 22 f, improve noise rejection and load regulation transient response. the CAT6243 is a highly stable regulator and performs well over a wide range capacitor equivalent series resistances (esr). no ? load regulation considerations the CAT6243 adjustable regulator will operate properly under conditions where the only load current is through the resistor divider that sets the output voltage. however, in the case where the CAT6243 is configured to provide a 0.8 v output, there is no resistor divider and the adj pin is connected to v out . if the part is enabled under no ? load conditions, leakage current through the pass transistor at junction temperatures above 85 c can approach several microamperes, especially as junction temperature approaches 150 c. if this leakage current is not directed into a load, the output voltage will rise above nominal until a load is applied. for this reason it is recommended that a minimum load of 100 a be present at all times. normally the voltage setting resistor divider will serve this function but if no divider is used (v out = 0.8 v) then an external load of 8 k should be provided. output voltage adjust the output voltage can be adjusted from 0.8 v to 5.0 v using resistors between the output and the adj input. the output voltage and resistors are chosen using equation 1 and equation 2. v out 0.8 1 r 1 r 2 i adj r 1 (eq. 1) r 2 0.8 v i div (eq. 2) r 1 r 2 v out 0.8 v 1 (eq. 3) figure 27. adjustable output resistor divider vin enable CAT6243 adj vout gnd vin vout c out r 2 r 1 c in c byp byp input bias current, i adj , for all practical designs can be ignored (i adj = 0). considering that the lowest recommended i out value is 100 a, then, when there is no load on v out , i div must be 100 a to keep CAT6243 in regulation. this then sets r2?s value using equation 2 to 8k , which minimizes output no ise. use equation 3 to find the required value for r1. if needed, lower values for i div can be considered, but not lower than 10 a. the price will be worse values for both load regulation and tc out . thermal considerations as power in the CAT6243 increases, it may become necessary to provide thermal relief. the maximum power dissipation supported by this device is dependent upon board design and layout. mounting pad configuration on the pcb, the board material, and the ambient temperature af fect the rate of junction temperature rise for the part. when the CAT6243 has good thermal conductivity through the pcb, the junction temperature will be relatively low even with high power applications. the maximum dissipation the CAT6243 can handle is given by: p d(max) t j(max) t a
r ja (eq. 4) since t j is not recommended to exceed 125 c, then with CAT6243 soldered to 645 mm 2 (1 sq inch), 1 oz copper area, fr4 pcb material can dissipate in excess of 1 w when the ambient temperature (t a ) is 25 c. note that this assumes the pad in the center of the package is soldered to the dissipating copper foil. see figure below for r ja versus pcb area for heat dissipating areas smaller than 645 mm 2 . power dissipation can be calculated from the following equations: p d v in (i gnd i out ) i out (v in v out ) (eq. 5) or v in(max) p d(max) (v out i out ) i out i gnd (eq. 6)
CAT6243 http://onsemi.com 11 figure 28. thermal resistance vs. pcb copper area for 3 mm x 3 mm wdfn package 0 0 25 50 75 100 125 150 175 200 225 250 275 300 650 50 100 150 200 250 300 copper heat spreading area (mm 2 ) theta ja ( c/w) 1 oz c.f 2 oz c.f 1 oz sim 2 oz sim figure 29. topside copper foil pattern for heat dissipation close ? up of pad area pcb layout top layer and connections to heat spreading plane design hints v in and gnd printed circuit board traces should be as wide as possible. when the impedance of these traces is high due to narrow trace width or long length, there is a chance to pick up noise or cause the regulator to malfunction. place external components, especially the input and output capacitors, as close as possible to the CAT6243, and keep traces between power source and load as short as possible.
CAT6243 http://onsemi.com 12 package dimensions d a k b r v s f l g 5 pl m 0.13 (0.005) t e c u j h ? t ? seating plane z dim min max min max millimeters inches a 0.235 0.245 5.97 6.22 b 0.250 0.265 6.35 6.73 c 0.086 0.094 2.19 2.38 d 0.020 0.028 0.51 0.71 e 0.018 0.023 0.46 0.58 f 0.024 0.032 0.61 0.81 g 0.180 bsc 4.56 bsc h 0.034 0.040 0.87 1.01 j 0.018 0.023 0.46 0.58 k 0.102 0.114 2.60 2.89 l 0.045 bsc 1.14 bsc r 0.170 0.190 4.32 4.83 s 0.025 0.040 0.63 1.01 u 0.020 ??? 0.51 ??? v 0.035 0.050 0.89 1.27 z 0.155 0.170 3.93 4.32 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. r1 0.185 0.210 4.70 5.33 r1 1234 5 dpak 5, center lead crop case 175aa ? 01 issue a 6.4 0.252 0.8 0.031 10.6 0.417 5.8 0.228 5 ? lead dpak central lead crop scale 4:1 mm inches 0.34 0.013 5.36 0.217 2.2 0.086 soldering footprint
CAT6243 http://onsemi.com 13 package dimensions wdfn6 3x3, 0.95p case 511ap ? 01 issue o *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* ???? ???? ???? c 0.15 2x 2x top view d e c 0.15 notes: 1. dimensions and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeters. 3. dimesnion b applies to plated terminal and is measured between 0.15 and 0.30 mm from terminal. 4. coplanarity applies to the exposed pad as well as the terminals. e2 bottom view b 0.10 6x l 13 0.05 c ab c d2 4x e k 64 6x 6x (a3) c c 0.08 7x c 0.10 side view a1 a seating plane dim min max millimeters a 0.70 0.80 a1 0.00 0.05 a3 0.20 ref b 0.35 0.45 d 3.00 bsc d2 2.40 2.60 e 3.00 bsc e2 1.50 1.70 e 0.95 bsc k 0.20 ??? l 0.30 0.50 note 3 detail b detail a 2.60 3.30 0.95 0.45 6x 1.70 dimensions: millimeters 1 0.63 6x l1 detail a l alternate terminal constructions l ??? ?? ??? 0.15 pitch pkg outline
CAT6243 http://onsemi.com 14 package dimensions dpak ? 5 (to ? 252, 5 lead) case 369ae ? 01 issue o dim min max millimeters e 6.40 6.80 a 2.10 2.50 b 0.40 0.60 c2 0.40 0.60 e 1.27 bsc h 9.60 10.20 l3 0.90 1.30 a1 0.00 0.13 c 0.40 0.60 e d l3 b e l 1.39 1.78 *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. recommended dimensions: millimeters 5.70 5x 10.50 6.00 2.10 0.80 1.27 pitch soldering footprint* a1 c h l detail a notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeters. 3. thermal pad contour optional, within dimensions b3, e2, l3 and z. 4. dimensions d and e do not include mold flash, protrusions or burrs. mold flash, protrusions or gate burrs shall not exceed 0.15mm per side. these dimensions to be measured at datum h. 5. dimensions d and e are determined at the outermost extremes of the plastic body. 6. datums a and b are determined at datum plane h. d 5.90 6.30 a a m 0.12 c c2 c a detail a bottom view side view top view b2 5.14 5.54 e2 5.04 ref l1 2.50 2.90 l2 0.51 bsc z 2.74 ref 5x h b b2 b c e2 z l1 l2 0.10 c guage plane 2 1345
CAT6243 http://onsemi.com 15 table 6. ordering information (notes 8 ? 11) device output voltage package shipping CAT6243 ? adjmt5t3 adjustable wdfn ? 6, 3 mm x 3 mm (pb ? free) 3,000 / tape & reel CAT6243dtadj ? rkg adjustable dpak 5 4 ? lead (pb ? free) 2,500 / tape & reel CAT6243dcadj ? rkg adjustable dpak 5 5 ? lead (pb ? free) 2,500 / tape & reel 8. the standard lead finish is matte ? tin. 9. for additional package and temperature options, contact your nearest on semiconductor sales office. 10. for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and ree l packaging specifications brochure, brd8011/d. 11. for detailed information and a breakdown of device nomenclature and numbering systems, please see the on semiconductor devic e nomenclature document, tnd310/d, available at www.onsemi.com on semiconductor and are registered trademarks of semiconductor co mponents industries, llc (scillc). scillc owns the rights to a numb er of patents, trademarks, copyrights, trade secrets, and other intellectual property. a list ing of scillc?s product/patent coverage may be accessed at ww w.onsemi.com/site/pdf/patent ? marking.pdf. scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and s pecifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/ or specifications can and do vary in different applications and actual performance may vary over time. all operating parame ters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the right s of others. scillc products are not designed, intended, or a uthorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in whic h the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or us e scillc products for any such unintended or unauthorized appli cation, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unin tended or unauthorized use, even if such claim alleges that scil lc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyrig ht laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5817 ? 1050 CAT6243/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative

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