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1 ? fn4920.5 isl5571a access high voltage switch the isl5571a is a solid state device designed to replace the electromechanical relay used on subscriber line cards. the device contains two line break mosfet switches, one ring return mosfet switch and one ring access scr switch. the isl5571a is pin-for-pin compatible with the lucent l7581aae lcas and clare cpcl7581a products. improvements include: line break switches r on match (0.5 ? max) higher dv/dt sensitivity (5000v/ s), protection scr hold current set to 110ma. the line break mosfets have very low on resistance (<16.0 ? typ) and ron match (<0.05 ? typ, 0.5 ? max) and a blocking voltage >330v. the ring return mosfet has a typical ron of 50 ? and a blocking voltage >330v. the ringing access switch is impl emented with a scr device with a blocking voltage >480v. the scr switch inherently offers low emi connect and disco nnect circuitry. all control i/os use ttl thresholds making the device compatible with 3v logic. the isl5571a also includes on-chip protection in the form of an over-voltage clamping circuit, current-limited mosfet switches, and thermal shutdown circuitry. the over-voltage clamping circuit consists of a diode bridge and scr. features ? small size/surface-mount packaging ? low impulse noise, low emi ? clean, bounce-free switching ? line break switches -0.5 ? max r on match -28 ? max r on ? built-in current limiting, thermal shutdown and secondary protection for the slic ? optimized for short loop high ren applications ? 3v/5v logic-capable i/o ? pb-free available applications ? central office ? pbx ?dlc ?hfc ?fitl ?daml related literature ? technical brief tb363 ?guidelines for handling and processing moisture sensit ive surface mount devices (smds)? ? technical brief tb379 ?thermal characterization of packages for ics? ? texas instruments tispl758lf3d data sheet ? teccor electronics document do-214aa pinout isl5571a top view ordering information part number prot scr temp range (c) package type pkg. dwg. # isl5571aib yes -40 to 85 16 ld soic m16.3 ISL5571AIBZ (note) yes -40 to 85 16 ld soic (pb-free) m16.3 note: intersil pb-free products em ploy special pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which is compatible with both snpb and pb-free soldering operations. intersil pb-free products are msl classified at pb-free peak reflow te mperatures that meet or exceed the pb-free requirements of ipc/jedec j std-020b. add ?-t? for tape and reel. 14 15 16 9 13 12 11 10 1 2 3 4 5 7 6 8 f gnd t bat t line nc nc t ring t sd v dd v bat r line nc r ring latch input d gnd r bat data sheet july 2004 caution: these devices are sensitive to electrosta tic discharge; follow proper ic handling procedures. 1-888-intersil or 321-724-7143 | intersil (and design) is a registered trademark of intersil americas inc. copyright ? intersil americas inc. 2001, 2002, 2004. all rights reserved all other trademarks mentioned are the property of their respective owners.
2 block diagram scr line break line break t bat ring return ring access sw3 sw1 sw2 sw4 control logic r bat f gnd t ring r ring tsd 16 1 14 12 11 10 8 7 6 2 3 d gnd input latch v dd v bat r line t line 15 9 d1 d2 d3 d4 isl5571a - 16 lead soic isl5571a
3 electrical specifications t a = -40c to 85c, unless otherwise specified absolute m aximum ratings t a = 25 c thermal information maximum supply voltages (v dd ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5v to +7v (v bat ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -19v to -100v esd rating (human body model) . . . . . . . . . . . . . . . . . . . . . . .500v die characteristics substrate potential. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . v bat process . . . . . . . . . . . . . . . . . . . . . . . .6-inch bimos bonded wafer thermal resistance (typical, note 1) ja ( c/w) soic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 maximum junction temperature plastic . . . . . . . . . . . . . . . . .150 c maximum storage temperature range . . . . . . . . . -65 c to 150 c maximum lead temperature (soldering 10s) . . . . . . . . . . . . .300 c (soic - lead tips only) caution: stresses above those listed in ?abs olute maximum ratings? may cause permanent dam age to the device. this is a stress o nly rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. note: 1. ja is measured with the component mounted on a low effective ther mal conductivity test board in free air. see tech brief tb379 fo r details. table 1. break switches - isl5571a - sw1, sw2 parameter test condition measure min typ max units off-state leakage current: -40c 25c 85c v switch (differential) = -310v to gnd v switch (differential) = -60v to +250v v switch (differential) = -320v to gnd v switch (differential) = -60v to +260v v switch (differential) = -330v to gnd v switch (differential) = -60v to +270v i switch i switch i switch - - - - - - 1 1 1 a a a on-resistance: -40c 25c 85c t line = 10ma, 40ma, t bat = -2v t line = 10ma, 40ma, t bat = -2v t line = 10ma, 40ma, t bat = -2v ? v on ? v on ? v on - - - 12 16 - - - 28 ? ? ? on-resistance match per on-resistance test condition of sw1, sw2 magnitude r on sw1 - r on sw2 0.05 0.5 ? on-state voltage (note 2) break switches in on-state; i switch = i limit at 50/60hz v on - - 220 v peak dc current limit: -40c 25c 85c v switch (on) = 10v v switch (on) = 10v v switch (on) = 10v i switch i switch i switch - - 80 - 125 - 250 - ma ma ma dynamic current limit (t = <0.5 s) break switches in on-state; ringing access switches off; apply 1000v at 10/1000 s pulse; appropriate external secondary protection in place i switch -1.52.0a isolation: -40c 25c 85c v switch (both poles) = 310v logic inputs = gnd v switch (both poles) = 320v logic inputs = gnd v switch (both poles) = 330v logic inputs = gnd i switch i switch i switch - - - - - - 1 1 1 a a a dv/dt sensitivity (note 3) - 5000 - v/ s notes: 2. choice of secondary protection shoul d ensure this rating is not exceeded. 3. applied voltage is 100v p-p square wave at 100hz. isl5571a
4 table 2. ring return switch - isl5571a - sw3 parameter test condition measure min typ max unit s off-state leakage current: -40c 25c 85c v switch (differential) = -310v to gnd v switch (differential) = -60v to +250v v switch (differential) = -320v to gnd v switch (differential) = -60v to +260v v switch (differential) = -330v to gnd v switch (differential) = -60v to +270v i switch i switch i switch - - - - - - 1 1 1 a a a dc current limit -40c v switch (on) i switch - - 350 ma 25c v switch (on) i switch -200-ma 85c v switch (on) i switch 120 - - ma dynamic current limit (t = <0.5 s) break switches in off-state; ringing access switches on; apply 1000v at 10/1000 s pulse; appropriate external secondary protection in place i switch -1.52.0a on-resistance t line = 0, 10ma ? v on - - 100 ? on-state voltage (note 4) ring return switch in on-state; i switch = i limit at 50/60hz v on - - 130 v peak isolation: -40c 25c 85c v switch (both poles) = 310v logic inputs = gnd v switch (both poles) = 320v logic inputs = gnd v switch (both poles) = 330v logic inputs = gnd i switch i switch i switch - - - - - - 1 1 1 a a a dv/dt sensitivity (note 5) - 5000 - v/ s notes: 4. choice of secondary protection shoul d ensure this rating is not exceeded. 5. applied voltage is 100v p-p square wave at 100hz. table 3. ring access switch - isl5571a - sw4 parameter test condition measure min typ max units off-state leakage current: -40c 25c 85c v switch (differential) = -245v to +210v v switch (differential) = +245v to -210v v switch (differential) = -255v to +210v v switch (differential) = +255v to -210v v switch (differential) = -270v to +210v v switch (differential) = +270v to -210v i switch i switch i switch - - - - - - 1 1 1 a a a on-resistance i switch (on) = 70ma, 80ma ? v on -- 12 ? on voltage i switch (on) = 1ma v on --3v ring access switch quiescent current during ringing v cc = 5v, ring access sw itches on, all other switches off i ring quiescent (note 6) -2.0-ma steady state current (note 7) --150ma surge current (note 7) ring access switch on, time duration = 100 s--2a release current 200 - 1000 a isolation: -40c 25c 85c v switch (both poles) = 310v logic inputs = gnd v switch (both poles) = 320v logic inputs = gnd v switch (both poles) = 330v logic inputs = gnd i switch i switch i switch - - - - - - 1 1 1 a a a dv/dt sensitivity (note 8) - 5000 - v/ s notes: 6. magnitude of the ring generator current not supplied to the ring load. i ring quiescent = i ring gen - i ring load . 7. choice of secondary protector and series current-limit resistor should ensure these ratings are not exceeded. 8. applied voltage is 100v p-p square wave at 100hz. isl5571a
5 table 4. logic i/o electrical characteristics - isl5571a parameter test condition measure min typ max units digital input characteristics: input low voltage input high voltage input leakage current (high) input leakage current (low) - - v dd = 5.5v, v bat = -75v, v logic-in = 5v v dd = 5.5v, v bat = -75v, v logic-in = 0v - - i logic-in i logic-in - 2.4 - - - - - - 0.8 - 1 1 v v a a table 5. logic i/o power requirements - isl5571a parameter test condition measure min typ max units power requirements: power dissipation v dd current v bat current v dd = 5.5v, v bat = -48v, idle/talk state all off-state ringing state v dd = 5.5v, idle/talk state all off-state ringing state v bat = -48v, idle/talk state all off-state ringing state i dd , i bat i dd , i bat i dd i dd i dd i dd i bat i bat i bat - - - - - - - - - 6.6 8.8 11.0 1.2 1.6 2.0 1.0 1.0 1.0 8.5 11.5 18.2 2.0 2.1 3.3 10 10 10 mw mw mw ma ma ma a a a temp. shutdown requirements (note 9) shutdown activation temperature shutdown circuit hysteresis t j 115 7 125 14 135 21 c c note: 9. the temperature shutdown logic pin (tsd) will be high during normal operation and low during temperature shutdown state. table 6. electrical specification - protection circuitry - isl5571a parameter test conditio n measure min typ max units parameters related to diodes voltage drop at continuous current (50hz/60hz) apply dc current limit of break switches forward voltage - - 3 v voltage drop at surge current apply dynamic current limit of break switches forward voltage - 5 - v parameters related to protection scr surge current twice dynamic current limit of break switches - - 4 a gate trigger current -v bat current - 50 - ma hold current 110 - ma gate trigger voltage trigger current v bat - 4v - v bat - 2v v reverse leakage current v bat --1.0 a on-state voltage (note 10) 0.5a, t = 0.5 s 2.0a, t = 0.5 s - - -3 -5 - - v v notes: 10. in some instances, the typical on-state voltage can range as low as -25v. table 7. power supply specifications supply min typ max units v dd 4.5 - 5.5 v v bat -19 - -72 v isl5571a
6 pinout isl5571a top view table 8. pin descriptions - isl5571a pin no. pin name description pin no. pin name description 1f gnd fault ground. internally, this pin is electric ally isolated from d gnd. 16 v bat battery voltage. used as a reference for protection circuit. provides trigger current for the protection scr. 2t bat connect to tip on slic side. 15 r bat connect to ring on slic side. 3t line connect to tip on line or phone side. 14 r line connect to ring on line or phone side. 4 nc no connection. 13 nc no connection. 5 nc no connection. 12 r ring connect to ringing generator. 6t ring connect to return ground for ringing generator. 11 l atch logic state latch control, active-high, transparent low. 7v dd +5v supply. 10 input logic level input switch control. 8t sd temperature shutdown pin. can be used as a logic level input or output. see truth table. as an output, will read +5v when device is in its operational mode and 0v in the thermal shutdown mode. in the isl5571a, the thermal shutdown mechanism cannot be disabled. 9d gnd digital ground. internally, this pin is electrically isolated from f gnd . figure 1. application circuit crowbar protection ? ring tip r1 slic scr tip line break ring line break t bat ring return ring access sw3 sw1 sw2 sw4 control logic r bat f gnd t ring r ring tsd 16 1 14 12 11 10 8 7 6 2 3 input latch v dd v bat r line t line 15 9 r2 battery ring generator + 5 v dc - 48 v dc d gnd external tip ring rrly d1 d2 d3 d4 r gen tline external protector maximum voltage prior to switching to the on state should not exceed 130v. rline external protector maximum voltage prior to switching to the on state should not exceed 220v. v bat gnd ? ? isl5571a
7 circuit operation and design information introduction the isl5571a was designed to be used in subscriber line card applications. a typical application circuit is shown in figure 1. its main purpose is to momentarily disconnect the voice circuit (slic and codec) and connect an external ring generator to ring the phone. this function has been traditionally done by electromechanical relays. the isl5571a offers the system desi gner a solid-state switching solution with distinct advantag es over the electromechanical relay. these advantages are as follows: ? lower power consumption (20mw vs. 150mw for the relay) ? smaller size, surface mounted package ? bounce-free switching ? lower impulse noise, low emi ? longer life ? provides current limiting, thermal shutdown, and over- voltage protection for the slic and codec their bounce-free operation, long lifetime, small size, and low power consumption make the solid-state access switch the preferred choice over electromechanical relays whenever board area, high re liability, and heat reduction are primary concerns. the isl5571a was designed to be a drop in replacement for the lucent attl7581aae lcas device. the intersil isl5571a offers superior r on matching between the line break switches for optimal longitudinal balance, higher temperature operation (enabl ing continuous operation in short loop, high ringer equivalency number applications) and with 3v ttl logic controlled inputs. basic functional description this section describes the basic operation of the isl5571a. from the application circuit shown in figure 1, the isl5571a consists of four switches, th e line break switches (sw1, sw2), the ring return switch (sw3), and the ring access switch (sw4). the line break switches (sw1 and sw2) open and close in unison to connect and disconnect the voice / data signal from the phone. the ring access switch and the ring return switch (sw3 and sw4) open and close in unison, to connect and disconnect the external ring generator to the phone. the isl5571a has three possible operating states: the idle / talk state, the power ringing st ate, and the all off state. it also has a built in logic stat e latch. the logic state latch enables the user to latch the logic state of the isl5571a in either the idle / talk state or the power ringing state. the three control logic pins for the isl5571a are the input pin, the tsd pin and the latch pin. these logic pins are controlled by ttl logic levels (0v - 0.8v for logic low and 2.4v - 5.0v for logic high). the combination of the logic levels applied at these pins determine which of the three logic states the device will be in and whether the logic state latch is active. the truth table for the isl5571a is shown in table 9. a description of each operating state and the control logic pins follows: table 9. truth table - isl5571a logic state logic inputs switch condition latch input t sd tip line break switch ring line break switch ringing return switch ring access switch idle / talk 0 0 1 or floating (note 11) on on off off power ringing 0 1 1 or floating (note 11) off off on on idle / talk latched (note 12) 1 0 1 or floating (note 11) on on off off power ringing latched (note 12) 1 1 1 or floating (note 11) off off on on all off x x 0 (note 13) off off off off notes: 11. thermal shutdown mechanism is active with tsd floating or equal to 5v. 12. if the latch pin is low, the logic stat e of the device is controlled by the input pin. when the latch pin goes high, the cur rent logic state is latched. as long as the latch pin is held high, the device wi ll no longer respond to any changes applied to the input control p in. the state of the device will be permanently latched until the latch pin is taken low. 13. setting tsd to a logic low overrides the latch and in put logic pins and forces all switches to turn off. isl5571a
8 idle / talk state (latch = 0, input = 0, tsd = 1 or floating) in this state the line break switches (sw1 and sw2) are closed (on) and the ring return and ring access switches (sw3 and sw4) are open (off). the subscriber line circuit is either on-hook or off-hook: 1. in the on-hook condition, the slic is monitoring the tip and ring lines through the line break switches for an off- hook condition. this is called the idle state. 2. in the off-hook condition, a telephone conversation between two or more parties is in progress or data is being transferred between modems. this is called the talk state. the slic is providing dc power through the line break switches to the telephone handset for modulation. modulated ac vo ice signals or data are traveling through the line break switches sw1 and sw2. power ringing state (latch = 0, input = 1, tsd = 1 or floating) in this state the line break switches (sw1 and sw2) are open (off) and the ring return and ring access switches (sw3 and sw4) are closed (on). for ring injected ringing as shown in figure 1, a ring generator is connected to the phone through the ring access switch (sw4) and returned to ground through the ring return switch (sw3). all off state (latch = x, input = x, tsd = 0) in this state both the line access switches (sw1 and sw2) and the ring return and ring access switches (sw3 and sw4) are open (off). the isl5571a will enter the all off state when the following conditions occur: 1. the tsd pin is used as a control input and is programmed to logic low. 2. the device has enter thermal shutdown due to a fault condition. (thermal shut down is described in the auxiliary functions and features section below.) 3. if v bat rises above -10v or disappears. while in the all off state, communication and power ringing are inoperable because all t he isl5571a switches are open (off). logic state latch (latch = 1, tsd = 1 or floating, input = 0 or 1) a logic state latch is integrated into the isl5571a, see figure 2. if the latch control pin is high and the tsd pin is high or floating, the device will no longer respond to logic level changes at the input pin. the state of the switches will be determined by the logic level of the input pin at the time the latch pin transitions from logic low to logic high. the state of the switches at t he time of this transition will be permanently held as long as the latch pin is high. when the latch pin is taken low t he device will again be under the control of the input pin and the switches will immediately go to the state spec ified by the logic level at the input pin. (note: the tsd pin overrides the latch pin and the input pin. when the tsd pin is low the isl5571a goes to the all off state regardless of the logic levels applied at the latch pin and the input pin.) input pin the input pin (pin 10) is the main logic input control pin. reference table 9 for logic state table. when the latch pin is low and the tsd pin is high or floating, you can toggle back and forth between the idle / talk state and the power ringing state by changing the lo gic level at the input pin. this is the normal operating mode of the device. note: if the latch pin is high, the input pin is no longer active and the device will no longer respond to logic changes at the input pin. the tsd pin overrides all other logic pins. if the tsd pin is low, the device will enter an all off state and will no longer respond to logic changes at the input pin. latch pin the latch pin (pin 11) is t he control for the logic state latch. reference table 9 for logic state table. when the latch pin is low, the latch is disabled and the state of the isl5571a will be determined by the logic level applied at the other logic inputs. when the latch pin is high, the latch is active and the logic state of the switches at the time the latch pin went high will be latched. as long as the latch pin is held high the switches will not respond to logic changes at the input control pin. logic state latch input 10 11 isl5571a figure 2. block diagram of logic control logic switches tsd 8 control circuitry latch isl5571a
9 tsd pin the tsd pin (pin 8) can be used as a logic level input or output. reference table 9 for lo gic state table. the tsd pin overrides all other logic pins. as an input, if this pin is driven low, either by external logic applied to it or by the internal thermal shutdown circuitry, the isl5571a device will enter the all off state. in the all off state all switches of t he isl5571a are open (off). as an output, it is capable of driving a ttl input (2.8v at 200 a). the tsd pin will read +5v when the device is in normal operating mode and 0v when the device is in thermal shutdown. this pin can be monitored on an oscilloscope to determine if the isl5571a device has enter thermal shutdown. (thermal shutdown is described in the auxiliary functions and features section below.) connecting the tsd pin to 5v will have no effect on the performance of the isl5571a device and will not disable the thermal shutdown circuitry. auxiliary functions and features in addition to the isl5571a main function of momentarily connecting and disconnecting an external ring generator to ring the phone, the isl5571a device also provides surge and power-cross protection to the slic and codec. this fault protection is provided by a combination of current- limiting circuitry, a thermal shutdown mechanism and an over-voltage clamping circuit. another feature the device offers is a v bat fault detection circuit. the following describes each in detail. current limiting the line break switches (sw1 and sw2) and the ring return switch (sw3) are all current-limited. these switches have a dc current limiting response and a dynamic current limiting response which were built into the device to provide protection during lightning and power-cross faults. each of these current limiting responses are explained below. dc current limiting response the on state v-i graph for sw1, sw2, and sw3 is shown in figure 3. it represents the dc current limiting response of the switches. the graph shows that over a certain range of positive and negative voltages, the current and voltage relationship is linear and behaves according to ohms law (v = ir). note: at around 1.5v an inflection point occurs decreasing the on resistance by 2/3. the on resistance specified in the data sheet is measured in the region prior to the inflection point (between 1.5v). when current through the switch reaches the current limit of the switch, the current is cl amped and held at a constant value. the switch then operates as a constant current source. increasing the voltage beyond this point will not change the value of the current. current limiting +i -i i limit current limiting r on i limit +v figure 3. on state v-i graph of sw1, sw2 and sw3 r on +1.5 -1.5 2/3 r on 2/3 r on -v +i -i +v figure 4. effect of temperature on dc current limit t2 t1 t1 t2 > t1 t2 -v +i time 0 figure 5. dynamic current limit response 2a 0.5 s isl5571a
10 the dc current limiting response has a negative temperature coefficient. as the temperature of the device increases the dc current limit of the switch will decrease. this is illustrated in figure 4. figure 4 shows the v-i curves of a switch at two different die temperatures, t1 and t2. in this illustration t2 is greater in temperature than t1. this show s that when a switch is driven into current limit and held there, the current limit will decrease over time as the swit ch temperature increases. if the power through the switch is great enough, the temperature of the switch will continue to increase until the switch goes into thermal shutdown (thermal shutdown is described below). dynamic current limiting response the dc current limit response described above pertains to dc and ac voltage sources appl ied across the switches. the dynamic response is the response of the current limit circuit to a fast or high dv/dt pulse. the dynamic response would be seen, for example, during a lightning surge figure 5 shows the dynamic response that is observed when sw1, sw2 or sw3 is surged with a 1000v at 10/1000 s telecom surge pulse. (note: this surge test is done with the switch in the on state and with the appropriate external secondary protection in place.) the dynamic current limit of sw1, sw2 or sw3 will limit the current through the switch to less than 2.0a for 0.5 s as shown in figure 5. once the switch has turned off, the voltage at the t line and r line terminals will increase to a point where the external secondary protection device will trigger and crowbar the voltage at t line and r line to a low voltage, protecting the isl5571a against damage. since the line break switches (sw1, sw2) have this dynamic current limit feature, the internal over-voltage protection clamping circuit of the isl5571a device will need to only protect the slic against a 2.0a 0.5 s pulse during a lightning surge. thermal shutdown (tsd) the isl5571a has a built in thermal shutdown protection circuit. the thermal shutdown protection mechanism is invoked if a fault condition c auses the junction temperature of the die to exceed about 150c . once the thermal limit is exceeded the thermal shutdown circuitry will force the switches into an all off state, regardless of the logic inputs. while in thermal shutdown the tsd logic pin (pin 11) will be driven low by the thermal shutdown circuit. (note: during normal operation the tsd pin is high.) the thermal shutdown mechanism was designed to have a thermal hysteresis of about 12c. once in thermal shutdown the device will begin to cool down, because all the switches are off and no current flows. when the temperature of the die cools to about 138c the isl5571a will cycle out of thermal shutdown and the switches wil l close again. if the fault condition is still pr esent, the temperature of the die will again increase and this cycle will be repeated. over voltage protection clamping circuit the isl5571a contains an over-voltage clamping circuit on the slic side of the line brea k switches, see figure 1. this clamping circuit consists of a diode bridge and scr. during lightning surges and power-cross fault conditions this circuit will clamp the voltage at the t bat and r bat terminals of the slic to a safe level and will shunt harmful currents to ground away from the slic. the clamping circuit is externally connected to ground through the f gnd pin (pin 1) of the device. the battery voltage of the slic is connected to the clamping circuit through the v bat pin (pin 16) of the device. the operation of diode bridge and the scr circuit is described below. diode bridge with scr (isl5571a) during a positive lightning sur ge or during th e positive cycle of a power-cross / induction fault, the voltage at the t bat and r bat terminals of the slic will be clamped to a diode drop above ground. the fault current will flow harmlessly through diodes d1 and d2 of the diode bridge to ground (see figure 1). during a negative lightning surge or during the negative cycle of a power-cross / inducti on fault when th e voltage at the t bat and r bat terminals reach 2v to 4v more negative than the v bat voltage, the protecti on scr will trigger and turn on. when the scr turns on and latches, it will crowbar the voltage at the t bat and r bat lines to a low-voltage state, approximately 3 diode drops below ground. this low- voltage on state will c ause the current result ing from the over voltage to be safely direct to ground through diodes d3 and d4 of the diode bridge and the scr (see figure 1). once the fault current decrease below the protection scr holding current (110ma) the scr will turn off and the slic will be able to return to normal operation. v bat fault circuit protection - loss of battery voltage the isl5571a device contains a v bat fault circuit which monitors the slic battery voltage (v bat ). when this circuit detects that the v bat voltage has risen above -10v, it will cause the isl5571a to enter the all off state. all the switches will remain off (open) until the circuit detects that the slic battery voltage has dropped below -15v. design considerations external protection subscriber line card circuits using the isl5571a require the use of an external protection circuit on the loop side or phone side of the device, see figure 1. this protection is required to minimize the power stress on the isl5571a during overvoltage and overcu rrent conditions. when the proper external protection ci rcuitry is used in conjunction isl5571a
11 with the integrated secondary prot ection, features offered by the isl5571a, the application circuit will pass the ac power- cross and lightning immunity tests of the following regulatory requirements: ? gr 1089-core ?itu-t k.20 this section will discuss the issues that must be considered when designing an external protection circuit for use with the isl5571a. the external protection circui try should be designed to limit the peak voltages on the t line and r line terminals of the isl5571a. the most potentially st ressful condition concerning the isl5571a is low level pow er-cross when the isl5571a switches are closed. under th is condition, the external protection circuitry limits the voltage and corresponding power dissipation until the isl5571a thermal shutdown circuitry opens the switches. the external protector chosen for the t line terminal must limit at a maximum of 130v thereby limiting the power stress on the ring return switch (sw3). the protector chosen for the r line terminal must limit at a maximum of 220v thereby limiting the power stress on the line break switch (sw2). the 22 0v break-over voltage of the protector on rline is large enough to not interfere with the ac ring signal during ringing. texas instruments and teccor electronics have designed specific parts to protect solid state line card access switches. the following protectors are recommended: texas instruments part number tispl758lf3d(t line and r line ) teccor electronics part number p1200sc (t line ) and p2000sc (r line ) refer to the above company?s data sheets for information on their parts and reference designs for protection of solid state line card access switches, see re lated literature section on page one. break-before-make operation the isl5571a device inherently has a break-before-make condition between the following switches: a. between the line break switch sw1 and the ring return switch sw3 during the transition from the idle state to the power ringing state. b. between the line break switch sw2 and the ring access switch sw4 during the transition from the idle state to the power ringing state. make-before-break operation the isl5571a device could ex hibit a make-before-break condition between the line break switch sw2 and the ring access switch sw4 during the transition from the power ringing state to the idle / talk state. there is a period of time that can be as much as 25ms (1/2 cycle of the 20hz ring signal) when both sw2 and sw4 will both be on (closed). this occurs because sw4 is an scr and requires a zero current crossing to turn off. protection src latch-up in the make-before-break conditi on, when transiting from the power ringing state to the idle/ talk state, during the negative cycle of the ring generator it is possible for enough current to flow that the protection scr will turn on. this will result in shorting the ring generator and the ring terminal of the slic to ground. when either sw2 or sw4 turns off, the ring terminal of the slic will remain shorted to ground unless the output current limit of the slic is less than the holding current (110ma) of the protection scr. the current limit of most slics are set well below the 110ma minimum holding current of the isl5571a protection scr and therefore should not be a concern. another method to prev ent latch-up of the protection scr would be to strobe the tsd pin of the isl5571a. as discussed in break-before-make section. ring access switch quiescent current during ringing the ring access switch (sw4) is a silicon control rectifier type switch (scr). during power ringing, the ring access switch will draw a nominal 2ma of current from the ring generator. this current is called i ring quiescent and is equal to: i ring quiescent = i ring gen - i ring load . system designers need to ensure that this additional current can be provided by the ring generator. glossary of acronyms ac = alternating current bimos = bipolar metal-oxide semiconductor co = central office codec = coder-decoder dc = direct current dlc = digital loop carrier daml = digitally added main line emi = electromagnetic interference esd = electrostatic discharge fitl = fiber in the loop hfc = hybrid fiber coax ics = integrated circuits lcas = line card access switch pbx = private branch exchange ren = ring equivalency number mosfet = metal-oxide semicon ductor field-effect transistor scr = silicon control rectifier slic = subscriber line interface circuit smds = surface mount devices soic = small outlin e integrated circuit tsd = thermal shutdown ttl = transistor-transistor logic isl5571a
12 all intersil u.s. products are manufactured, asse mbled and tested utilizing iso9000 quality systems. intersil corporation?s quality ce rtifications can be viewed at www.intersil.com/design/quality intersil products are sold by description only. intersil corporation reserves the right to make changes in circuit design, soft ware and/or specifications at any time without notice. accordingly, the reader is cautioned to verify that da ta sheets are current before placing orders. information furnishe d by intersil is believed to be accurate and reliable. however, no responsibility is assumed by intersil or its subsidiaries for its use; nor for any infringements of paten ts or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of intersil or its subsidiari es. for information regarding intersil corporation and its products, see www.intersil.com isl5571a small outline plast ic packages (soic) notes: 1. symbols are defined in the ?mo series symbol list? in section 2.2 of publication number 95. 2. dimensioning and tolerancing per ansi y14.5m - 1982. 3. dimension ?d? does not include mold flash, protrusions or gate burrs. mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. dimension ?e? does not include inte rlead flash or protrusions. interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. the chamfer on the body is optional. if it is not present, a visual index feature must be located within the crosshatched area. 6. ?l? is the length of terminal for soldering to a substrate. 7. ?n? is the number of terminal positions. 8. terminal numbers are shown for reference only. 9. the lead width ?b?, as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch) 10. controlling dimension: millimeter. converted inch dimensions are not necessarily exact. index area e d n 123 -b- 0.25(0.010) c a m bs e -a- l b m -c- a1 a seating plane 0.10(0.004) h x 45 o c h 0.25(0.010) b m m m16.3 (jedec ms-013-aa issue c) 16 lead wide body small outline plastic package symbol inches millimeters notes min max min max a 0.0926 0.1043 2.35 2.65 - a1 0.0040 0.0118 0.10 0.30 - b 0.013 0.0200 0.33 0.51 9 c 0.0091 0.0125 0.23 0.32 - d 0.3977 0.4133 10.10 10.50 3 e 0.2914 0.2992 7.40 7.60 4 e 0.050 bsc 1.27 bsc - h 0.394 0.419 10.00 10.65 - h 0.010 0.029 0.25 0.75 5 l 0.016 0.050 0.40 1.27 6 n16 167 0 o 8 o 0 o 8 o - rev. 0 12/93

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