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cmos 4-bit single chip microcomputer description the CXP5084/5086 is a cmos 4-bit microcomputer which consists of 4-bit cpu, rom, ram, i/o port, 8-bit timer, 8-bit timer/counter, 18-bit time base timer, 8-bit serial i/o, vector interruption, power on reset function and a liquid crystal displayer (lcd) controller/ driver. they are integrated into a single clip with the standby function etc. which are to be operated at low power consumption. features ? instruction cycle 3.8s/4.19mhz 1.9s/4.19mhz (high speed version) ? rom capacity 4096 8 bits (CXP5084) 6144 8 bits (cxp5086) ? ram capacity 400 4 bits (including stack, display area) ? 32 general purpose i/o ports ? lcd controller/driver (direct drive possible) optional specification of 24, 20 or 16 segment outputs 1/2, 1/3, 1/4 duty selectable through program 1/3 bias ? 2 external interruption input pins ? 8-bit/4-bit variable serial i/o ? 8-bit timer, 8-bit timer/event counter and 18-bit time base timer are independently controllable ? arithmetic and logical operations possible between the entire ram area, i/o area and the accumulator by means of memory mapped i/o ? reference to the entire rom area is possible with the table look-up instruction ? 2 types of power down modes: sleep and stop ? power on reset circuit (mask option) ? available option of either crystal oscillation or cr oscillation (mask option) types for the oscillation circuit ? 64-pin plastic sdip/qfp available ? piggyback package (cxp5080) available structure silicon gate cmos ic C 1 C e90377a7z-ps sony reserves the right to change products and specifications without prior notice. this information does not convey any licens e by any implication or otherwise under any patents or other right. application circuits shown, if any, are typical examples illustr ating the operation of the devices. sony cannot assume responsibility for any problems arising out of the use of these circuits. CXP5084/5086 64 pin sdip (plastic) 64 pin qfp (plastic)
C 2 C CXP5084/5086 block diagram 4 4 a l u v l v l c 1 e x t a l s e g 1 6 t o s e g 2 3 x t a l v l c 3 v l c 2 4 p o r t f p o r t d a c c u m u l a t o r f l a g t i m e r ( 8 ) t i m e r / c o u n t e r ( 8 ) s e r i a l i / o ( 8 ) r e g i s t e r d a t a m e m o r y s t a c k d a t a m e m o r y i n t e r r u p t c o n t r o l p o r t e p o r t c p o r t b p o r t a ( e n a b l e s t o s p e c i f y t h e i / o w i t h b i t u n i t ) ( c o m b i n e s u s e o f m a s k w i t h s e g m e n t o u t p u t , o p t i o n a l ) ( e n a b l e t o s p e c i f y t h e i / o w i t h p o r t u n i t ) p r o g r a m c o u n t e r ( 1 3 ) 6 1 4 4 8 b i t s ( c x p 5 0 8 6 ) t i m e b a s e t i m e r ( 1 8 ) l c d c o n t r o l l e r / d r i v e r 4 0 9 6 8 b i t s ( c x p 5 0 8 4 ) 4 0 0 4 b i t s p r o g r a m m e m o r y c l o c k c o n t o r l i n s t r u c t i o n c o n t r o l p o r t y p o r t x ( c o m m o n w i t h p o r t e , p o r t f ) ( c o m m o n w i t h s e r i a l i / o ) 8 1 6 4 4 s e g 0 t o s e g 1 5 c o m 0 t o c o m 3 p x 3 / s i p x 2 / s o a p x 1 / s o b p x 0 / s c p y 3 / e c p y 2 / i n t 2 p y 1 p y 0 i n t 1 v d d w p v s s r s t
C 3 C CXP5084/5086 pin assignment 1 (top view) 64-pin sdip package note) do not make any connection to nc pin. 1 2 3 4 5 6 7 8 9 1 0 1 1 1 2 1 3 1 4 1 5 1 6 1 7 1 8 1 9 2 0 2 1 2 2 2 3 2 4 2 5 2 6 2 7 2 8 2 9 3 0 3 1 3 2 3 3 3 4 3 5 3 6 3 7 3 8 3 9 4 0 4 1 4 2 4 3 4 4 4 5 4 6 4 7 4 8 4 9 5 0 5 1 5 2 5 3 5 4 5 5 5 6 5 7 5 8 5 9 6 0 6 1 6 2 6 3 6 4 v l x t a l e x t a l r s t w p i n t 1 p y 0 p y 1 p y 2 / i n t 2 p y 3 / e c p x 0 / s c p x 1 / s o b p x 2 / s o a p x 3 / s i p d 0 p d 1 p d 2 p d 3 p c 0 p c 1 p c 2 p c 3 p b 0 p b 1 p b 2 p b 3 p a 0 p a 1 p a 2 p a 3 n c v s s s e g 5 s e g 6 s e g 7 s e g 8 s e g 9 s e g 1 0 s e g 1 1 s e g 1 2 s e g 1 3 s e g 1 4 s e g 1 5 s e g 1 6 / p f 0 s e g 1 7 / p f 1 s e g 1 8 / p f 2 s e g 1 9 / p f 3 s e g 2 0 / p e 0 s e g 2 1 / p e 1 s e g 2 2 / p e 2 s e g 2 3 / p e 3 v d d v l c 3 v l c 2 v l c 1 c o m 0 c o m 1 c o m 2 c o m 3 s e g 0 s e g 1 s e g 2 s e g 3 s e g 4
C 4 C CXP5084/5086 pin assignment 2 (top view) 64-pin qfp package note) do not make any connection to nc pin. 1 2 3 4 5 6 7 8 9 1 0 1 1 1 2 1 3 1 4 1 5 1 6 1 7 1 8 1 9 2 0 2 1 2 2 2 3 2 4 2 5 2 6 2 7 2 8 2 9 3 0 3 1 3 2 3 3 3 4 3 5 3 6 3 7 3 8 3 9 4 0 4 1 4 2 4 3 4 4 4 5 4 6 4 7 4 8 4 9 5 0 5 1 5 2 5 3 5 4 5 5 5 6 5 7 5 8 5 9 6 0 6 1 6 2 6 3 6 4 p y 0 p y 1 p y 2 / i n t 2 p y 3 / e c p x 0 / s c p x 1 / s o b p x 2 / s o a p x 3 / s i p d 0 p d 1 p d 2 p d 3 p c 0 p c 1 p c 2 p c 3 p b 0 p b 1 p b 2 p b 3 p a 0 p a 1 p a 2 p a 3 v s s n c s e g 2 3 / p e 3 s e g 2 2 / p e 2 s e g 2 1 / p e 1 s e g 2 0 / p e 0 s e g 1 9 / p f 3 s e g 1 8 / p f 2 i n t 1 w p r s t e x t a l x t a l v l v d d v l c 3 v l c 2 v l c 1 c o m 0 c o m 1 c o m 2 c o m 3 s e g 0 s e g 1 s e g 2 s e g 3 s e g 4 s e g 5 s e g 6 s e g 7 s e g 8 s e g 9 s e g 1 0 s e g 1 1 s e g 1 2 s e g 1 3 s e g 1 4 s e g 1 5 s e g 1 6 / p f 0 s e g 1 7 / p f 1
C 5 C CXP5084/5086 absolute maximum ratings item power supply voltage lcd bias voltage input voltage output voltage high level output current high level total output current low level output current low level total output current operating temperature storage temperature allowable power dissipation v dd v lc1 , v lc2 , v lc3 v in v out i oh i oh i ol i ol topr tstg p d C0.3 to +7.0 C0.3 to +7.0 * 1 C0.3 to +7.0 * 1 C0.3 to +7.0 * 1 C5 C50 15 50 C20 to +75 C55 to +150 1000 600 v v v v ma ma ma ma c c mw mw general purpose port * 2 : per pin entire pin total general purpose port * 2 : per pin entire pin total sdip qfp symbol ratings unit remarks * 1 v lc1 , v lc2 , v lc3 , v in and v out should not exceed v dd + 0.3v. * 2 the pe and pf are specified when pa to pd, px0 to px2, py0, py1 and mask option are selected as the port. note) usage exceeding absolute maximum ratings may permanently impair the lsi. normal operation should better take place under the recommended operating conditions. exceeding those conditions may adversely affect the reliability of the lsi. item power supply voltage v dd v lc1 , v lc2 , v lc3 v ih v ihs v ihex v il v ils v ilex topr lcd bias voltage high level input voltage low level input voltage operating temperature symbol min. 4.5 3.5 v ss 0.7v dd 0.8v dd v dd C 0.4 0 0 C0.3 C20 5.5 5.5 v dd v dd v dd v dd + 0.3 0.3v dd 0.2v dd 0.4 +75 v v v v v v v v v c guaranteed range during operation guaranteed data hold operation range during stop liquid crystal power supply voltage * 1 hysteresis input * 2 extal pin * 3 hysteresis input * 2 extal pin * 3 max. unit remarks * 1 the optimum value is determined by the characteristics of the liquid crystal display element used. * 2 they are the respective pins of int1, wp, px0, px3, py2, py3 and rst. * 3 specified only during external clock input. recommended operating conditions (v ss = 0v reference) (ta = C20 to +75 c, v ss = 0v reference)
C 6 C CXP5084/5086 electrical characteristics dc characteristics (ta = C20 to +75 c, v ss = 0v reference) item high level output voltage v oh pa to pf * 1 , px0 to px2, py0, py1, v l (v ol only) rst (v ol only) v dd = 4.5v, i oh = C0.5ma * 2 v dd = 4.5v, i oh = C1.0ma * 2 v dd = 4.5v, i oh = C10 a * 3 v dd = 4.5v, i oh = C200 a * 3 v dd = 4.5v, i ol = 1.8ma v dd = 4.5v, i ol = 3.6ma v dd = 5.5v, v ih = 5.5v v dd = 5.5v, v il = 0.4v 4.0 3.5 4.0 2.4 0.5 C0.5 C1.5 3 5 1.3 (2) * 9 0.4 (0.5) * 9 10 0.4 0.6 40 C40 C400 C2.0 10 5 15 4 (6) * 9 1.2 (2) * 9 10 20 v v v v v v a a a ma a k k ma ma a pf v dd = 5.5v v i = 0, 5.5v v dd = 5v v lc1 = 3.75v v lc2 = 2.5v v lc3 = 1.25v v dd = 5.5v during external clock 1mhz operation entire output pins open clock 1mhz 0v for no measured pins sleep mode stop mode extal * 4 rst * 5 pa to pf * 6 , px0 to px2 * 6 , px3 * 8 , py0 * 7 , py1 * 7 , py2 * 8 , py3 * 8 , int1 * 8 , wp * 8 , rst * 5 com0 to com3 seg0 to seg15 seg16 to seg23 * 1 v dd v lc1 to v lc3 , com0 to com3, seg0 to seg15, seg16 to seg23 * 1 , other pins than v dd , v ss v ol i ih i ile i ilr i il i iz r com r seg i dd i ddsp i dds c in low level output voltage input current high impedance i/o leakage current common output impedance segment output impedance current power supply input capacitance symbol pin condition min. typ. max. unit * 1 pe to pf show when the combined pins are selected as the port, and seg16 to seg23 show when the combined pins are selected as the segment output. * 2 it is when the respective pins of pa to pf and px0 to px2 select the 3-state output circuit, and py0 and py1 are when the inverter output circuit is selected. * 3 it is when the respective pins of pa to pf, px0 to px2, py0 and py1 select the pull-up resistance. * 4 it is when the crystal or ceramic oscillation circuit is selected. * 5 the rst pin specifies the input current when the pull-up resistance is selected, and specifies leakage current when non-resistance is selected. * 6 the respective pins of pa to pf and px0 to px2 specify the input current when the pull-up resistance is selected, and specify the leakage current when in the port state during the 3-state output circuit or standby is selected at high impedance. * 7 the respective pins of py0 and py1 specify the input current when the pull-up resistance is selected, and specify the leakage current when the port state during standby is selected at high impedance. * 8 the respective pins of px3, py2, py3, int1 and wp only specify the leakage current. * 9 the value in parentheses shows the specification of the current power supply of the high speed version.
C 7 C CXP5084/5086 ac characteristics (1) clock timing (ta = C20 to +75 c, v dd = 4.5 to 5.5v, v ss = 0v reference) item system clock frequency system clock input pulse width system clock input rising and falling times event count clock input pulse width event count clock input rising and falling times fc t xl t xh t cr t cf t el t eh t er t ef xtal extal extal extal ec ec fig. 1., fig. 2. fig. 1., fig. 2. * 1 external clock drive fig. 1., fig. 2. * 1 external clock drive fig. 3. fig. 3. 1 90 t sys * 2 + 0.05 5 200 20 mhz ns ns s ms symbol pin condition min. max. unit * 1 the external clock in fig. 2. is specified only when the option is selected for crystal or ceramic oscillation. * 2 i n the standard version, t sys = 16/fc i n the high speed version, t sys = 8/fc note) when adjusting the frequency accurately, there may be cases in which they differ from fig. 2. e x t a l 1 / f c t x h t c f t x l t c r v d d 0 . 4 v 0 . 4 v fig. 2. clock applying condition c r y s t a l o s c i l l a t i o n c e r a m i c o s c i l l a t i o n c r o s c i l l a t i o n e x t e r n a l c l o c k * 1 e x t a l x t a l c 1 c 2 e x t a l x t a l r c e x t a l x t a l o p e n fig. 3. event count clock timing e c t e h t e f t e l t e r 0 . 8 v d d 0 . 2 v fig. 1. clock timing
C 8 C CXP5084/5086 (2) serial transfer (ta = C20 to +75 c, v dd = 4.5 to 5.5v, v ss = 0v reference) item serial transfer clock (sc) cycle time t kcy t kh t kl t sik t ksi t ksoa t ksob t ksoa t ksob t ksoa t ksob sc input mode output mode input mode output mode * 1 output mode * 2 sc input mode sc output mode sc input mode sc output mode t sys/4 + 1.42 t sys t sys/8 + 0.7 t sys/2 C 0.1 t sys/2 C 1.6 0.1 0.2 t sys/8 + 0.5 0.1 t sys/8 + 0.5 t sys/8 + 1.6 t sys/8 + 0.5 s s s s s s s s s s s s sc si si soa sob soa sob soa sob serial transfer clock (sc) high and low level widths serial data input setup time (against sc - ) serial data input hold time (against sc - ) high data * 3 output delay time from the sc falling time high data * 4 output delay time from the sc falling time low data output delay time from the sc falling time symbol pin condition min. max. unit * 1 it is specified when sc pin is selected to the 3-state output by the mask option. * 2 it is specified when sc pin is selected to the pull-up resistance by the mask option. as the t sys receives restriction by this item, take notice that it limits the upper limit of the system clock frequency fc. * 3 it is specified when soa and px1/sob pins are selected to the 3-state output by the mask option. * 4 it is specified when soa and px1/sob pins are selected to the pull-up resistance by the mask option. note 1) i n the standard version, t sys = 16/fc i n the high speed version, t sys = 8/fc note 2) the load of data output delay time is 50pf + 1ttl.
C 9 C CXP5084/5086 t k c y 0 . 8 v d d 0 . 8 v d d 0 . 2 v d d 0 . 2 v d d 0 . 8 v d d 0 . 2 v d d t k l t s i k t k s o a t k s o b t k s i t k h s c s i s o a s o b i n p u t d a t a o u t p u t d a t a fig. 4. serial transfer timing (3) others (ta = C20 to +75 c, v dd = 4.5 to 5.5v, v ss = 0v reference) item external interruption high and low level widths t i1h , t i1l t i2h , t i2l t rsl t wph int1 int2 rst wp during edge detection mode stop mode sleep mode s s s ns s t sys + 0.05 t sys + 0.05 2 t sys 500 t sys + 0.05 reset input low level width wake-up input high level width symbol pin condition min. max. unit note) i n the standard version, t sys = 16/fc i n the high speed version, t sys = 8/fc
C 10 C CXP5084/5086 fig. 5. interruption input timing i n t 1 ( f a l l i n g e d g e ) 0 . 2 v d d 0 . 2 v d d i n t 1 ( r i s i n g e d g e ) t i 1 h t i 1 l t i 1 l t i 1 h 0 . 8 v d d 0 . 8 v d d 0 . 2 v d d i n t 2 t i 2 l t i 2 h 0 . 8 v d d fig. 6. reset input timing 0 . 2 v d d r s t t r s l fig. 7. wake-up input timing 0 . 8 v d d w p t w p h power supply rising time power supply cut-off time t r t off v dd power on reset repectitive power on reset 0.05 1 50 ms ms item symbol pin condition min. max. unit power on reset * (ta = C20 to +75 c, v ss = 0v reference) * specifies only when power on reset function is selected. fig. 8. power on reset v d d t r t o f f 0 . 2 v 0 . 2 v 4 . 5 v r a i s e t h e p o w e r s u p p l y s m o o t h l y .
p a c k a g e s t r u c t u r e p a c k a g e m a t e r i a l l e a d t r e a t m e n t l e a d m a t e r i a l p a c k a g e m a s s s o n y c o d e e i a j c o d e j e d e c c o d e s d i p - 6 4 p - 0 1 4 2 a l l o y s o l d e r p l a t i n g e p o x y r e s i n 6 4 p i n s d i p ( p l a s t i c ) s d i p 0 6 4 - p - 0 7 5 0 5 7 . 6 0 . 1 + 0 . 4 6 4 3 3 1 3 2 1 . 7 7 8 1 9 . 0 5 1 7 . 1 0 . 1 + 0 . 3 0 t o 1 5 0 . 2 5 0 . 0 5 + 0 . 1 0 . 5 m i n 4 . 7 5 0 . 1 + 0 . 4 3 . 0 m i n 0 . 5 0 . 1 0 . 9 0 . 1 5 8 . 6 g C 11 C CXP5084/5086 package outline unit: mm s o n y c o d e e i a j c o d e j e d e c c o d e 2 3 . 9 0 . 4 2 0 . 0 0 . 1 0 . 4 0 . 1 + 0 . 1 5 1 4 . 0 0 . 1 1 1 9 2 0 3 2 3 3 5 1 5 2 6 4 0 . 1 5 0 . 0 5 + 0 . 1 2 . 7 5 0 . 1 5 1 6 . 3 0 . 1 0 . 0 5 + 0 . 2 0 . 8 0 . 2 m 0 . 2 0 . 1 5 + 0 . 4 1 7 . 9 0 . 4 + 0 . 4 + 0 . 3 5 6 4 p i n q f p ( p l a s t i c ) q f p - 6 4 p - l 0 1 q f p 0 6 4 - p - 1 4 2 0 p a c k a g e m a t e r i a l l e a d t r e a t m e n t l e a d m a t e r i a l p a c k a g e m a s s e p o x y r e s i n s o l d e r / p a l l a d i u m 4 2 / c o p p e r a l l o y p a c k a g e s t r u c t u r e p l a t i n g 1 . 5 g 1 . 0 0 t o 1 0

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