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description the cxa1391q/r is a bipolar ic developed for signal processing in complementary color mosaic ccd cameras. features low power consumption (170mw) number of delay lines used for signal processing can be selected according to the system requirements the lpf peripheral to 1h delay line is built in structure bipolar silicon monolithic ic applications complementary color mosaic ccd cameras absolute maximum ratings supply voltage vcc 7 v storage temperature tstg ?5 to +150 ? allowable power dissipation p d 690 mw (lqfp: ta = 25?, without p.c.b) recommended operating conditions supply voltage vcc 4.75 to 5.25 v ambient temperature topr ?0 to +75 ? ?1 cxa1391q/r e89z18-st processing ic for complementary color mosaic ccd camera sony reserves the right to change products and specifications without prior notice. this information does not convey any license by any implication or otherwise under any patents or other right. application circuits shown, if any, are typical examples illustrating the operation of the devices. sony cannot assume responsibility for any problems arising out of the use of these circuits. cxa1391q 64 pin qfp (plastic) cxa1391r 64 pin lqfp (plastic) clp c yh dlyh in clp c dlyh dlyh out yh out 1 yh out 2 tp dlyh gain clp4 clp2 vap out vap gain clp c vap vap slice clp c cs cs in b-r g-r r-r clp (clp2) & mpx b g r -cb cr y c1 y0 y1 cs vap cs-y max cs v-apcn y2 y1 y0 y1 y2 c0 y0 y0 v-apcn yh1 yh0 yh0 yh1 v-apcn g ch slice cs-y b-y r-y c0 gc gc lpf lpf clp (clp4) lpf clp (clp4) 3h apcn 2h apcn knee lpf clp (clp2) clp (clp4) lpf clp slice clp (clp4) r yl mtx mtx hue & gc lpf wb amp matrix lpf lpf wb control gc gc 16 2 3 4 5 6 7 8 9 10 11 12 13 14 15 1 gc b-y r-y g-w b r-wb b-wb clp (clp2) lpf r b-r r-r g-r c slice wb dc wb b wb g wb r c-r cont gnd 1 yl out cs out cs gain r y hue b y hue r y out b y out b y gain r y gain 31 32 17 18 19 20 21 22 23 24 25 26 27 28 29 30 knee lpf abs knee s2 in s1 in clp c yo dly0 out dly1 out y1 gain dly1 in dly2 in y2 gain gnd 2 lpf adj 1 lpf adj 2 lpf adj 3 v cc y-r cont yh in 49 50 51 52 53 54 55 56 57 58 59 60 63 64 61 62 dlc1 in c1 gain dlco out r mtx clp c mpx1 clp c mpx2 b mtx id b gain b cont r cont r gain clp c b clp c g clf c r c level 40 39 38 37 36 35 34 33 41 42 43 44 45 46 47 48 gc slice clp (clp4) clp (clp4) clp (clp4) block diagram and pin configuration (top view)
?2 cxa1391q/r pin description pin no. 1 2 3 4 symbol clp c y h pin voltage 3 to 3.5v equivalent circuit description capacitor connecting pin for y h clamp (clamp at clp2) dl y h signal input pin (input from 1h delay line) sig: typ. 200mv (positive polarity) capacitor connecting pin for dl y h clamp (clamp at clp4) dl y h signal output pin (to 1h delay line) sig: typ. 400mv max. 600mv (negative polarity) 2.4k 2.4k 180a 80a 1k 147 800 80a 5k 1k 147 2.6k 2.6k 180a 40a 1k 147 1k 400a 200 1 2 3 4 dl y h in 3.65v clp c dl y h 2.6 to 3.8v dl y h out 2.7 to 3.1v note) pin voltage for input and output pins indicate black level.
?3 cxa1391q/r 5 y h out1 1.9 to 2.3v y h 1 signal output pin sig: typ. 1v max. 1.5v (positive polarity) 160a 100 400a 100 80a 500 1k 30k 147 100k 100k 30k 40a 5 6 7 8 54 6 y h out2 1.9 to 2.3v y h 2 signal output pin sig: typ. 1v max. 1.5v (positive polarity) 7 tp 2.6 to 3.0v (y h ) 2.5 to 2.9v (g) tp out (adjusting pin) 1h mode: outputs y h 1? h 0 0h mode: outputs gch c-slice out (mode selection is executed through pin 8) 8 dl y h gain 0v (0h mode) 1.8 to 5v (1h mode) dl y h signal gain control pin (for 1h delay line gain compensation of y h ) tp (pin 7) mode selection 0h mode: 0v 1h mode: 1.8 to 5v 54 y1 gain 0v: common control by pin 57 1.8 to 5v independent control dly 1 signal gain control pin (1h delay line gain compensation) 0v: dly 1 signal gain control is executed in common with dly 2 signal gain control. 1.8 to 5v: dly 1 signal gain control is executed independently from dly 2 signal gain control. pin no. symbol pin voltage equivalent circuit description
?4 cxa1391q/r 9 clp4 clp4 pulse input pin (blk clamp) (cmos level input, v th = 2.5v) 10 clp2 clp2 pulse input pin (opb clamp) (cmos level input, v th = 2.5v) 11 vap out 2.6 to 3.0v v-apcn signal output pin * sig: max. 1.2vp-p v-apcn signal output level adjustment pin 2.6k 2.6k 180a 12a 1k 147 280a 431 40a 30k 1k 40a 25k 1k 25k 147 147 9 10 11 12 13 12 vap gain 1.8 to 5v (control) capacitor connecting pin for vap clamp (clamp at clp4) 13 clp c vap 3.4 to 3.8v 5v 0 5v 0 * v-apcn: vertical aperture compensation pin no. symbol pin voltage equivalent circuit description
?5 cxa1391q/r 14 vap slice 1.8 to 5v (control) v-apcn signal dark slice volume adjustment pin 2.6k 2.6k 180a 20a 1k 147 40a 30k 1k 30k 147 147 2.6k 2.6k 1k 20a 180a 147 147 14 15 16 15 clp c cs 3.5 to 3.7v capacitor connecting pin for cs clamp (clamp at clp4) 16 cs in c-couple input 2.9 to 3.3v agc cs signal input pin sig: max. 1v pin no. symbol pin voltage equivalent circuit description
?6 cxa1391q/r 17 r? gain 0v: r? output 1.8 to 5v: r? output r? signal output level adjustment pin pin 20 mode select 0v: r? output 1.8 to 5v: r? output 18 b? gain 0v: b? output 1.8 to 5v: b? output b? signal output level adjustment pin pin 19 mode select 0v: b? output 1.8 to 5v: b? output 23 cs gain 1.8 to 5v (control) v-apcn cs signal gain control pin b? hue control pin r? hue control pin 19 b? out 20 r? out 2.75 to 3.15v (hue off) 2.35 to 2.75v (hue on) 46 dlc 0 out 1.8 to 2.2v 52 dly 0 out 1.4 to 1.8v 53 dly 1 out 2.8 to 3.2v 21 b? hue 0v: hue off 22 r? hue 0v: hue off b? signal output pin sig: typ. 590mvp-p r? signal output pin sig: typ. 800mvp-p dlc 0 signal output pin sig: typ. 200mvp-p max. 600mvp-p (positive polarity) dly 0 signal output pin sig: typ. 200mvp-p max. 600mvp-p (positive polarity) dly 1 signal output pin sig: typ. 200mvp-p max. 600mvp-p (positive polarity) 1k 30k 100k 100k 30k 40a 17 18 23 300a 431 19 20 46 52 53 1k 30k 147 80k 100k 30k 40a 21 22 pin no. symbol pin voltage equivalent circuit description
?7 cxa1391q/r 24 cs out 1.5 to 1.8v cs signal output pin sig: max. 1v 200a 431 1k 30k 100k 30k 40a 80a 431 147 24 25 27 25 y l out 1.9 to 2.3v y l signal output pin 26 gnd1 gnd 27 c- g cont 0v: typ. g curve chroma (r.g.b) g curve adjustment pin pin no. symbol pin voltage equivalent circuit description
?8 cxa1391q/r 28 wb r 1.4 to 2v r signal output pin wb mode: sig: typ. 400mv g mode: sig: typ. 500mv 29 wb g 1.4 to 2v g signal output pin wb mode: sig: typ. 400mv g mode: sig: typ. 500mv 30 wb b 1.4 to 2v b signal output pin wb mode: sig: typ. 400mv g mode: sig: typ. 500mv 31 wb dc 1.4 to 2v when used as output pin, it is an auto wb dc output pin. pin 28, 29 and 30 turn to wb mode. when connected to vcc: pins 28, 29 and 30 turn to g mode. 200a 431 67a 1k 40a 30k 1k 30k 18k 18k 100k 200a 431 1k 100k 300 28 29 30 31 32 33 47 32 c slice 0v: slice off chroma (r.g.b) signals dark slice level adjustment pin 33 c level 1.8 to 5v (control) chroma (r.g.b) gain control pin (chroma modulation factor control for all 3 channels) 47 c 1 gain 1.8 to 5v (control) dl c 1 signal gain control pin (1h delay line gain compensation) pin no. symbol pin voltage equivalent circuit description
?9 cxa1391q/r 34 clp c r 3.0 to 3.6v capacitor connecting pin for r wb amplifier clamp (clamp at clp2) 35 clp c g 3.0 to 3.6v capacitor connecting pin for g wb amplifier clamp (clamp at clp2) 36 clp c b 3.0 to 3.6v capacitor connecting pin for b wb amplifier clamp (clamp at clp2) 37 r gain 1.8 to 5v (control) rch wb amplifier gain control pin (pre-wb) 40 b gain 1.8 to 5v (control) bch wb amplifier gain control pin (pre-wb) 2.2k 2.2k 125a 40a 1k 1k 10a 1k 80a 15k 1k 15k 147 147 147 34 35 36 37 40 38 39 38 r cont 2.5 to 4.6v rch wb amplifier gain control pin 39 b cont 2.5 to 4.6v bch wb amplifier gain control pin pin no. symbol pin voltage equivalent circuit description
?10 cxa1391q/r 41 id id pulse (color discrimination pulse) input pin (cmos level v ih = 2.5v) id = l c 0 ? c r c 1 ? c b id = h c 0 ? c b c 1 ? c r 1k 15k 147 100k 15k 80a 40a 30k 1k 147 100k 147 6k 1k 6k 40a 147 41 42 43 44 42 b mtx 1.8 to 5v (control) 0v (preset) b signal operations mtx coefficient adjustment pin (coefficient 0.22) refer to note 2. 43 clp c mpx2 2.7 to 3.1v capacitor connecting pin for mpx clamp (clamp at clp2) 44 clp c mpx1 2.7 to 3.1v 5v 0 pin no. symbol pin voltage equivalent circuit description
?11 cxa1391q/r 45 r mtx 1.8 to 5v (control) 0v (preset) r signal operations mtx coefficient adjustment pin (coefficient 0.617) refer to note 2. 2.6k 2.6k 150a 11a 1k 147 1k 1k 300k 147 100k 30k 40a 100k 147 147 7.5k 40a 40a 40a 40a 40a 40a 40a 45 48 55 56 49 50 48 dlc 1 in c-couple input 3.1 to 3.5v dl c 1 signal input pin sig: typ. 150mvp-p (negative polarity) 55 dly 1 in c-couple input 3.6 to 4.0v dl y 1 signal input pin sig: typ. 150mvp-p (negative polarity) 56 dly 2 in c-couple input 3.6 to 4.0v dl y 2 signal input pin sig: typ. 150mvp-p (negative polarity) 49 s2 in 1.9v s2 signal input pin sig: typ. 500mv max. 1500mv 50 s1 in 1.9v s1 signal input pin sig: typ. 500mv max. 1500mv pin no. symbol pin voltage equivalent circuit description
?12 cxa1391q/r 51 clp c y 0 3.3 to 3.7v capacitor connecting pin for y 0 clamp (clamp at clp4) 20k 10a 300 80a 1k 147 15k 5k 147 1k 2.6k 1k 40a 150a 51 57 59 60 57 y 2 gain 1.8 to 5v (3h mode) 0v (2h mode) dl y 2 signal gain control pin (1h delay line gain compensation) v-apcon mode selection 0v: 2h mode 1.8 to 5v: 3h mode 59 lpf adj. 1 1.8 to 2.2v connecting pin of the external resistor that determines the characteristics of the lpf for 1h dl. (external resistor in the range of 15 to 27k ) 60 lpf adj. 2 1.8 to 2.2v connecting pin of the external resistor that determines the characteristics of the chroma lpf (lpf for r, g, b, cs). (external resistor in the range of 15 to 62k ) 58 gnd2 gnd pin no. symbol pin voltage equivalent circuit description
?13 cxa1391q/r 61 lpf adj. 3 1.8 to 2.2v connecting pin of the external resistor that determines the characteristics of the lpf for v-apcn. (external resistor in the range of 15 to 62k ) when connected to vcc, the lpf for v-apcn turns off. 1k 30k 147 30k 40a 100k 10a 300 300 1k 120k 10k 61 63 64 63 y- g cont 0v (typ. g curve ) 1.8 to 5v (control) y h g curve adjustment 64 y h in 0.95v y h signal input sig: typ. 220mv max. 660mv 62 vcc power supply 5v (typ.) pin no. symbol pin voltage equivalent circuit description
?14 cxa1391q/r electrical characteristics item current consumption s2?1 amp gain dlc 1 gain control s1+s2 amp chroma matrix (gch) note 3) chroma matrix (rch) note 3) chroma matrix (bch) note 3) max. min. gch y c r /y ? b /y rch c r y (preset) y (max.) y (min.) bch? b y (preset) y (max.) y (min.) id ssg dlc 1 h dlc 1 l sag gy gc r gc b rc r ryp ryh ryl bc b byp byh byl input: s1 in = ?2.5mv, s2 in = 62.5mv calculations: dlc 0 out/s1 in input: dlc 1 in = 100mv conditions: c 1 gain = 5v c-level = 5v calculations: (wb-r/dlc 1 in) ?g note2) conditions: c 1 gain = 0v (others same as dlc 1 h) input: s1 in = 500mv calculations: dly 0 out/s1 in input: s1 in = s2 in = 300mv conditions: c-level = 5v calculations: wb-g (id = h, l average) input: s1 in = s2 in = 62.5mv conditions: c-level = 5v calculations: wb-g/gy (id = l) id = h (others same as gc r ) input: s1 in = ?2.5mv, s2 in = 62.5mv conditions: c-level = 5v calculations: wb-r (id = l) input: s1 in = s2 in = 500mv conditions: c-level = 5v calculations: wb-r/rc r (id = h) rmtx = 5v (others same as ryp) rmtx = 1.8v (others same as ryp) input: s1 in = 62.5mv, s2 in = ?2.5mv conditions: c-level = 5v calculations: wb-b (id = h) input: s1 in = s2 in = 500mv conditions: c-level = 5v calculations: wb-b/bc b (id = h) bmtx = 5v (others same as byp) bmtx =1.8v (others same as byp) 25 ? 6 ? ?5 80 0.9 ?.1 70 0.15 0.22 0.11 80 0.2 0.31 0.13 34.5 ?.95 7 ?.85 ?4 100 1 ? 85 0.168 0.25 0.125 100 0.22 0.34 0.15 43 ? 9 0 ?3 120 1.1 ?.9 100 0.186 0.27 0.14 120 0.24 0.37 0.17 ma db db db db mv mv mv symbol conditions min. typ. max. unit
?15 cxa1391q/r wb gain rcont max. rcont min. bcont max. bcont min. rgain max. bgain max. rch rcl bch bcl rgh bgh input: dlc 1 in = ?00mv conditions: c-level = 5v rcont = 4.6v (id = h) calculations: wb-r/wb-rtyp. note 4) wb-r typ. is the tested output of wb-r when rcont is set to 4v (other inputs, conditions same as rch) test: rcont = 2.5v (others same as rch) input: dlc 1 in = 150mv conditions: c-level = 5v bcont = 4.6v (id = l) calculations: wb-b/wb-btyp. note 4) wb-b typ. is the tested output of wb-b when bcont is set to 4v (other inputs, conditions same as bch) test: bcont = 2.5v (others same as bch) input: dlc 1 in = ?00mv conditions: rcont = 2.5v rgain = 5v c-level = 5v (id = h) calculations: wb-r/wb-rmin. wb-r min. is the tested wb-r, when tested under the same conditions as rcl. input: dlc 1 in = 150mv conditions: bcont = 2.5v bgain = 5v c-level = 5v (id = l) calculations: wb-b/wb-bmin. wb-b min. is the tested wb-b, when tested under the same conditions as bcl. 7.5 8.4 7.5 8.4 8.6 11.4 8.2 7.9 8.2 7.9 9.2 12.2 8.5 ?.4 8.5 ?.4 db db db db db db item symbol conditions min. typ. max. unit
?16 cxa1391q/r bch color difference matrix note 5) gch color difference matrix note 5) r? out/ wb-b r? out/ wb-b b? gain max. b? hue max. b? hue min. r?/r? b?/b? bmby bmry bmg bmhh bmhl gmr gmb input: s1in = 200mv s2in = 160mv dlc 1 in = 220mv conditions: c- g cont = wb dc = c-slice = c-level = 5v rcont = 2.5v bcont = 4.6v (id = l) calculations: by out/wb-b conditions: ry gain = 1.8v calculations: ry out/wb-b (others same as bmby) conditions: bcont = 4v 1. b? out is tested when b? gain = 0v and taken as a. (other conditions are the same as bmby) 2. b? out is tested when b? gain = 5v and taken as b. (other conditions are the same as bmby) calculations: b/a conditions: b? hue = 1.8v (others same as bmby) calculations: ry out/by typ. by typ. is the value of the tested b? out when b? hue=0v (other conditions are the same as bmby). note 6) by hue = 5v (others same as bmhh) input: s1in = 830mv s2in = 660mv dlc 1 in = ?30mv conditions: wb-dc = c-level = 5v rcont = bcont = 2.5v 1. r? out is tested when r? gain = 0v and taken as a. 2. r? out is tested when r? gain = 1.8v and taken as b. calculations: b/a input: (the same as gmr) conditions: 1. b? out is tested when b? gain = 0v and taken as a. 2. b? out is tested when r? gain = 1.8v and taken as b. (others same as gmr) calculations: b/a 0.4 ?.24 3.0 0.58 0.81 0.63 0.44 ?.21 3.3 0.68 ?.67 0.85 0.66 0.48 ?.17 ?.58 0.89 0.7 item symbol conditions min. typ. max. unit
?17 cxa1391q/r c-slice gch g curve typ.?in. typ.?ax. c- g cont=0v gch-wb=400mv c- g cont=0v gch-wb=800mv c- g cont=0v gch-wb=100mv c- g cont=1.8v gch-wb=400mv c- g cont=1.8v gch-wb=800mv c- g cont=1.8v gch-wb=100mv c- g cont=5v gch-wb=400mv c- g cont=5v gch-wb=800mv c- g cont=5v gch-wb=100mv csll cslh g typ. g l8 g l1 g m4 g m8 g m1 g h4 g h8 g h1 input: dly 1 in = ?00mv conditions: c-level = 5v y 1 gain = 1.8v c-slice = 1.8v (id = h) calculations: c-slice typ. -tp c-slice typ. is the tp output of c-slice = 0v. conditions: c-slice =5v (others same as csll) input: dly 1 in = ?00mv s1in = s2in = 500mv conditions: y 1 gain = 1.8v c-level is valied and adjusted to obtain 400mv at wb-g. after that c-level is fixed during test. wb-dc is set to open during c-level adjusted and set to 5v during test. calculations: wb-g is tested. input: dly 1 in = ?00mv s1in = s2in = 1000mv conditions: same as g typ. calculations: wb-g/ g typ. input: dly 1 in = ?0mv s1in = s2in = 125mv (others same as g l8) input: dly 1 in = ?00mv s1in = s2in = 500mv conditions: c g cont = 1.8v calculations: wb-g/ g typ. input: dly 1 in = ?00mv s1in = s2in = 1000mv (others same as g m4) input: dly 1 in = ?0mv s1in = s2in = 125mv (others same as g m4) input: dly 1 in = ?00mv s1in = s2in = 500mv conditions: c g cont = 1.8v calculations: wb-g/ g typ. input: dly 1 in = ?00mv s1in = s2in = 1000mv (others same as g h4) input: dly 1 in = ?0mv s1in = s2in = 125mv (others same as g h4) 0 95 450 1.13 0.36 0.9 1.13 0.45 0.9 1.13 0.26 5 120 500 1.2 0.4 1 1.2 0.5 1 1.2 0.3 15 145 550 1.25 0.44 1.1 1.25 0.55 1.1 1.25 0.35 mv mv mv item symbol conditions min. typ. max. unit
?18 cxa1391q/r y g tp y h amp chroma level max./min. wb dc y g 1.0 (typ.) y g 2.0/y g 1.0 y g 0.5/y g 1.0 y g 0.5 (max.)/ y g 1.0 y g 0.5 (min.)/ y g 1.0 tp (yh) tp (dly h ) tp (gwbs) min. gain max. gain y g t y g 2.0 y g 0.5 y g h y g l tpy tpdy tpg ylg yhg gcl wddc input: y h in = 220mv calculations: dly h out input: y h in = 440mv calculations: dly h out/y g t input: y h in = 110mv calculations: dly h out/y g t input: y h in = 110mv conditions: y g cont = 1.8v calculations: dly h out/y g t input: y h in = 110mv conditions: y g cont = 5v calculations: dly h out/y g t input: y h in = 220mv conditions: dly h gain = 1.8v calculations: tp/dly h out input: dly h in = y g t 0.7 conditions: same as tpy calculations: tp/?ly h out note 7) input: s1in = s2in = 500mv dly1in = 200mv conditions: y1gain = 1.8v calculations: tp/wb-g input: y h in = 220mv dly h in = ?[y g t ?.5db] conditions: dly h gain = 1.8v calculations: tp is tested to check that the signal level is below 0mv in relation to black level. note 8) input: y h in = 220mv dly h in = ?[y g t ?2db] conditions: dly h gain = 5v calculations: tp tp is tested to check that the signal level is over 0mv in relation to black level. note 8) input: dlc 1 in = 200mv conditions: 1. wb-g is tested when c-level = 5v and taken as gc-level min. 2. wb-g is tested when c-level = 1.8v and taken as gc-level max. (both 1 and 2 test at id-h.) calculations: gc-level max. / gc-level min. test: wb-dc ?40 1.23 0.59 0.64 0.54 ? ? ? 12 1.55 1.4 ?00 1.37 0.66 0.71 0.6 ? ? 0 1.65 1.6 ?60 1.51 0.73 0.78 0.66 ? ? 2 3.5 1.75 2 mv db db db db db v item symbol conditions min. typ. max. unit
?19 cxa1391q/r y l note 5) y h out1 (oh mode) y h out1 1h/0h y h out2 (0h) /y h out1 y h out2 (1h) /y h out1 vap typ. note 9) vap slice note 9) y l out/ r g out y l out/ b g out y l out/ g g out y l r y l b y l g yh1z yh1o yh2z yh2o vapt vs input: s1in = 150mv s2in = 450mv conditions: c- g cont = wb dc = c-slice = c-level = 5v rcont = 4.6v bcont = 2.5v bgain = 1.8v (id = l) calculations: y l out/wb-r input: s1in = 200mv s2in = 160mv dlc 1 in = 220mv conditions: c- g cont = wb dc = c-slice = c-level = 5v rcont = 2.5v bcont = 4.6v (id = l) calculations: y l out/wb-b input: s1in = 830mv s2in = 660mv dlc 1 in = ?30mv conditions: wb-dc = c-level = 5v rcont = bcont = 2.5v calculations: y l out/wb-g input: y h in = 220mv calculations: y h out1 is tested. input: dly h in = ?(y g t ?db) conditions: dly h gain = 1.8v calculations: y h out1/yh1z note 8) input: y h in = 220mv calculations: y h out2/yh1z input: y h in = 220mv conditions: dly h gain = 1.8v calculations: y h out2/y h out2typ. y h out2typ. is y h out2 output tested at yh2z. input: s1in = s2in = 125mv conditions: vap gain = 1.8v vap slice = 1.8v y 2 gain = 1.8v calculations: vap out is tested. input: s1in = s2in = 1000mv conditions: y 2 gain = 1.8v 1. vap out is tested when vap slice=1.8v and taken as smin. 2. vap out is tested when vap slice=5v and taken as smax. calculations: smax.?min. note 10) 0.27 0.08 0.54 900 ? ? ?.5 ?50 256 0.3 0.1 0.6 1000 0 0 ? ?00 320 0.34 0.12 0.66 1100 1 1 ?.5 ?50 384 mv db db db mv mv item symbol conditions min. typ. max. unit
?20 cxa1391q/r dly 1 gain note 11) dly 2 gain note 11) cs note 12) min. max. min. max. vcs typ. vcs min. vcs max. vcs typ. dy 1 l dy 1 h dy 2 l dy 2 h vcst vcsl vcsh cst input: s1in = s2in = 500mv dly 1 in = ?00mv conditions: vap gain = vap slice = y 1 gain = 1.8v calculations: vap-out is tested to check that the signal level is over 0mv in relation to black level. input: s1in = s2in = 500mv dly 1 in = ?10mv conditions: vap gain = vap slice = 1.8v y 1 gain = 5v calculations: vap-out is tested to check that the signal level is below 0mv in relation to black level. input: s1in = s2in = ?67mv dly 2 in = ?6.7mv conditions: vap gain = vap slice = y 1 gain = y 2 gain = 1.8v calculations: vap-out is tested to check that the signal level is over 0mv in relation to black level. input: s1in = s2in = ?67mv dly 2 in = ?7.5mv conditions: y 2 gain = 5v (others same as dy 2 l) calculations: vap-out is tested to check that the signal level is below 0mv in relation to black level. input: s1in = s2in = 167mv conditions: y 1 gain = y 2 gain = 1.8v cs gain = 5v calculations: cs out is tested. conditions: cs gain = 0v (others same as vcst) calculations: cs out/vcst conditions: cs gain = 1.8v (others same as vcsl) input: cs-in = 500mv 5 5 90 4.4 440 120 0 465 0 0 150 0.05 490 db db db db mv mv item symbol conditions min. typ. max. unit
?21 cxa1391q/r note 1) for pins without specific instructions regarding input, feed the dc value shown on the test circuit. calculations are mentioned utilizing the pin name or the electrical characteristics symbols. otherwise, for exceptional notations explanatory notes, are given with every case. note 2) in this item, the gain of dlc 1 amplifier exclusively is calculated. cg is the gain of the system from dlc 1 in to wb-r from which dlc 1 gc amplifier gain has been excluded. ?g calculating method in the actual calculation, the system on c 0 side is utilized. input: s1in = ?2.5mv s2in = 62.5mv condition: same as dlc 1 h calculations: cg = 20log (wb-r/dlc 0 out) note 3) chroma matrix operations r = 2 [c r + a y] a : control with rmtx (preset 0.167) g = y ?(c r + c b ) b = 2 [c b + ?(y ?c)] ? control with bmtx (preset 0.22) note 4) with the typical gain taken when r cont is at 4v, compare with the gain during max. and min. the same for b cont. note 5) adjustment and testing is performed so that signals are output only for each of r, g, b channels respectively. note 6) comparison with b? out when r? hue = 0v (hue off). the same for b? hue. note 7) the compensation of difference in gain of y h 0 andy h 1 is as follows. 1) at dly h gain = 1.8v, dly h amplifier gain is 3db. 2) test dly h out (tested at yrt) when y h in = 220mv signal is input. 3) the difference in gain between y h 0 and y h 1 is compensated by inputting the signal as ?db to dly h in. note 8) the amplifier input is varied and the gain confirmed. note 9) vap (vertical aperture compensation) note 10) dark slice variable volume. (output level difference between the value slice volume at max. and slice volume at min.) note 11) utilizing v-apcn 2h mode, dly 1 amplifier exclusive gain is obtained through operations. however, as the amplifier gain cannot be tested directly, only the upper and lower limits of the gain control are checked according to the following method. (a) lower limit check s1 in = s2 in = 500mv (at that time knee circuit input turns to 200mv) dly 1 in = ?00mv (for others refer to the conditions chart) in this condition, if we have vap out 3 0, this indicates that dly 1 amplifier is below 0db. (b) upper limit check s1 in = s2 in = 500mv dly 1 in = ?10mv (in (a) the ?db of ?00mv) in this condition, if we have vap out 0, this indicates that dly 1 amplifier is above 5db. note 12) cs (chroma suppress)
?22 cxa1391q/r timing chart for testing 30 30 30 30 differs with each test d l y h in cs in dlc 1 in s1 s2 dly 1 in dly 2 in y h in output signal 2 2 2 2 5 5 15 15 0v 5v 0v 5v 0v 5v input waveform t d clp2 clp4 output waveform dly h out y h out1 y h out2 tp vap_out b ?y out r ?y out cs out y l out wb_r wb_g wb_b dlc 0 out dly 0 out dly 1 out
?23 cxa1391q/r clp c yh dlyh in clp c dlyh dlyh out yh out 1 yh out 2 tp dlyh gain clp4 clp2 vap out vap gain clp c vap vap slice clp c cs cs in c slice wb dc wb b wb g wb r c-r cont gnd 1 yl out cs out cs gain r-y hue b-y hue r-y out b-y out b-y gain r-y gain s2 in s1 in clp c yo dly0 out dly1 out y1 gain dly1 in dly2 in y2 gain gnd 2 lpf adj 1 lpf adj 2 lpf adj 3 v cc y-r cont yh in v v dlc1 in c1 gain dlco out r mtx clp c mpx1 clp c mpx2 b mtx id b gain b cont r cont r gain clp c b clp c g clf c r c level 0.1 0v 0v 0.1 v 0v 0v 4v 0v 0.1v 0v 0.1v 0.1v 4v id 0.1 v dc 1.9v dc 1.9v 0.1 0.1 0.1 0v 0v 27k 62k 62k 5v 5v 0v dc 0.95v 0.1 0.1 dc 3.65v 0v clp4 clp2 0v 0v 0.1 0.1 0.1 0v 5v 0v 0v 0v 0v 0v 0v 10 62k b-r g-r r-r clp (clp2) & mpx b g r -cb cr y c1 y0 y1 cs vap cs-y max cs v-apcn y2 y1 y0 y1 y2 c0 y0 y0 v-apcn yh1 yh0 yh0 yh1 v-apcn g ch slice cs-y b-y r-y c0 gc gc lpf lpf clp (clp4) lpf clp (clp4) 3h apcn 2h apcn knee lpf clp (clp2) clp (clp4) lpf clp slice clp (clp4) r yl mtx mtx hue & gc lpf wb amp matrix lpf lpf wb control gc gc 16 2 3 4 5 6 7 8 9 10 11 12 13 14 15 1 gc b-y r-y g-w b r-wb b-wb clp (clp2) lpf r b-r r-r g-r 31 32 17 18 19 20 21 22 23 24 25 26 27 28 29 30 knee lpf abs knee 49 50 51 52 53 54 55 56 57 58 59 60 63 64 61 62 40 39 38 37 36 35 34 33 41 42 43 44 45 46 47 48 gc slice clp (clp4) clp (clp4) clp (clp4) test circuit (typ. setting) note 1) f is unit of capacitor note 2) indicates testing pin. (ac, dc test) note 3) input pin dc value indicates input signal black level. note 4) indicate relay, side, normal close.
?24 cxa1391q/r standard control characteristics (vcc = 5v, ta = 25?) c1 gain control characteristics r-mtx coefficient r gain control characteristics b-mtx coefficient b gain control characteristics r/b cont control characteristics gain converted into unit 3 2 1 gain c1 gain voltage (v) 234 0 0.3 0.2 0.1 234 5 r-mtx voltage (v) preset preset 0.4 b-mtx voltage (v) 0 0.3 0.2 0.1 245 3 7 r gain voltage (v) 02 3 4 5 6 5 4 3 2 1/gain 3 r/b cont voltage (v) 2345 2 1 gain 10 8 6 4 2 2345 b gain voltage (v) 5 gain
?25 cxa1391q/r 3 2 1 2345 r?/b? gain voltage (v) gain r?/b? gain control characteristics 3 2 1 2345 y1/y2 gain voltage (v) gain y1/y2 gain control characteristics c-slice control characteristics gain 1.5 1 0.5 3 c-level voltage (v) 245 c-slice control characteristics 5 c-slice power supply (v) 4 3 2 (mv) 150 100 50 0 black dc difference between sliced signal and during sliced off r?/b? hue control characteristics 5 r?/b? hue voltage (v) 4 3 2 40 30 20 10 ?0 0 ?0 ?0 cs gain control characteristics 5 cs gain voltage (v) 4 3 2 400 (mv) 300 200 100 cs output during s1 = s2 = 125mv input (3h_mode)
?26 cxa1391q/r dly h gain control characteristics vap control characteristics 15 5 10 gain (db) 0 2345 dly h gain voltage (v) 400 100 300 vap out (mv) 0 200 vap gain voltage (v) 2345 vap_out output during s1 = s2 = 250mv input (3h_mode) vap slice control characteristics 100 300 200 (mv) 23 45 vap slice voltage (v) vap gain = 0v diminution of vap out output level
?27 cxa1391q/r chroma g curve (standardize) 1.2 1.0 0.8 0.6 0.4 0.2 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 g input (standardize) g output (standardize) 1 2 3 y h g curve (standardize) (mv) g output (standardize) 1.4 1.2 1.0 0.8 0.6 0.4 0.2 g input (standardize) 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 1 2 3 v-apcn knee (standardize) (mv) knee output (standardize) 1.0 0.2 knee input (standardize) standardize at typical input (s1 = s2 = 500mv) 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 0.8 0.6 0.4 0.2 2.0 standardize at typical input (220mv) 1: y ? g cont=1.6v (max.) 2: y ? g cont=0v (typ.) 1: y ? g cont=5v (min.) standardize at typical input (400mv) 1: c ? g cont=1.6v (max.) 2: c ? g cont=0v (typ.) 1: c ? g cont=5v (min.) standard design data
?28 cxa1391q/r 800 600 400 200 20k 10k 30k 40k 50k 60k 70k 80k r ext [lpf adj2 (60pin) ] ( w ) t d (nsec) chroma adjust characteristics r? out b? out s1, s2 ? fc (mhz) 1.5 1.0 0.5 10k 20k 30k 40k 50k 60k 70k 80k r ext [lpf adj2 (60pin) ] ( w ) (fc: ?db) pre-filter adjust characteristics dl y0 out dl c0 out s1, s2 ? (fc: ?db) 300 250 200 150 100 10k 15k 20k 25k 30k t d (nsec) r ext [lpf adj1 (59pin) ] ( w ) 10k 15k 20k 25k 30k r ext [lpf adj1 (59pin) ] ( w ) 3.0 2.5 2.0 1.5 1.0 fc (mhz)
?29 cxa1391q/r (fc: ?db) cs-vap adjust characteristics (s1, s2 ? cs out) 800 600 400 t d (nsec) 10k 20k 30k 40k 50k 60k 70k 80k r ext [lpf adj2 (60 pin) ] ( w ) 10k 20k 40k 50k 60k 70k r ext [lpf adj2 (60 pin) ] ( w ) 80k 30k 1.0 fc (mhz) 1.5 0.5
?30 cxa1391q/r 600 400 200 10k 20k 30k 40k 50k 60k 70k 80k 10k 20k 40k 50k 60k 70k 80k 30k 1.0 1.5 2.0 0.5 (fc: ?db) cs-y lpf adjust characteristics (cs in ? cs out) t d (nsec) r ext [lpf adj2 (60 pin) ] ( w ) r ext [lpf adj2 (60 pin) ] ( w ) fc (mhz) vap lpf adjust characteristics
?31 cxa1391q/r 600 400 200 10k 20k 30k 40k 50k 60k 70k 80k 10k 20k 40k 50k 60k 70k 80k 30k 1.0 1.5 0.5 (fc: ?db) vap lpf adjust characteristics (s1, s2 ? vap out) t d (nsec) r ext [lpf adj3 (61 pin) ] ( w ) r ext [lpf adj3 (61 pin) ] ( w ) fc (mhz)
?32 cxa1391q/r pg-in data-in v cc 1 xsp3 xsp2 xsp1 gnd fshi f3-clp f2-clp f1-clp xsh2 clp4 xshd xshp agc-sel agc-max agc-cont op -out op in-n op in-p agc-out agc-clp det- level xsh1 dc-out gy -out f1-out f2-out f3-out cs-clp cs-ccd-sl cs-ccd-gc cs-out cs-agc-gc cs-agc- sl det- out v cc 2 iris-gc iris-level det-clp gnd iris-clp iris-out vg-out wnd pblk clp1 cxa1390 q/r dly0- out dly1-out y1-gain dly1-in dly2-in y2-gain gnd lpf-adj1 lpf-adj2 lpf-adj3 v cc ygam- cont yh-in yo- clp s1-in s2-in dlc1-in c1-gain dlco-out r-mix mpx2-clp mpx1-clp b-mtx id b-gain b-cont r-cont r-gain b-clp g-clp r-clp c level yh- clp dlyh-in dlyh-clp dlyh-out yh-out1 yh-out2 tp dlyh-gain clp4 clp2 vap-out vap-gain vap-clp vap-slice cs-clp cs-in r-y gain b-y gain b-y out c- slice wb-dc wb-b wb-g wb-r cgam-cont gnd yl-out cs-out vcs-gain r-y hue b-y hue r-y out cxa1391 q/r ytblk noise-slice yh-clp yh-in yl-yh clp yl-yh in agnd clp4 clp2 b-level b-y in b-y clp shp- level dle shp-clp1 dld shp-clp2 shp-out y-level fader-mode fader-sig setup sync-level sync r-y in r-y clp dv cc 4fsc lalt nc nc fsc-out bfg bf cblk ctblk wc setup- clp v-out v ide o-out chroma-out dgnd c-in av cc c-out cs-y cs-agc mode cxa1392 q/r dr-out ct-blk dy-out yt-blk dy-clp dy-in v cc yg-in yr-in yb-in yt-gc ct-gc clp4 db-out db-in dr-in gnd cb-in cg-in cr-in hys- cont th-cont comp-in comp- out 2 3 4 5 6 7 8 9 10 11 12 1 13 14 15 16 17 18 19 20 21 23 24 22 detector lpf lpf ihdl dl ihdl ihdl ihdl w/b controller dl lpf bpf lpf 5v 5v cxa1393an/am 5v 5v ccd y vid c 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 36 35 34 31 32 33 40 39 38 37 41 42 43 44 45 46 47 48 2 3 4 5 6 7 8 9 10 11 12 1 20 21 22 23 24 25 26 27 28 29 30 31 32 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 1 40 39 38 37 36 35 34 33 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 63 64 61 62 26 27 28 29 30 36 35 34 31 32 33 25 40 39 38 37 41 42 43 44 45 46 47 48 2 3 4 5 6 7 8 9 10 11 12 1 13 14 15 16 17 18 19 20 21 22 23 24 tg sg controller for titler 5v 5v xsh1 xsp1 xsp2 clp4 xshd xshp clp2 bfg hd.vd cl wnd blk cr yr dl xsh2 clp1 id pblk cg yg cb yb bf sync lalt 4fsc cxa series system diagram
?33 cxa1391q/r package outline unit: mm cxa1391q cxa1391r sony code eiaj code jedec code 23.9??.4 20.0?.1 1.0 0.4 ?0.1 + 0.15 14.00.1 1 19 20 32 33 51 52 64 0.15 ?0.05 + 0.1 2.75 ?0.15 16.3 0.1 ?0.05 + 0.2 0.8 0.2 m 0.12 0.15 +?.4 17.9??.4 +0.4 + 0.35 64pin qfp(plastic) qfp?4p?01 * qfp064??420 package material lead treatment lead material package weight epoxy resin solder/palladium copper /42 alloy package structure plating 1.5g sony code eiaj code jedec code package material lead treatment lead material package weight epoxy / phenol resin solder plating 42 alloy package structure 12.0 0.2 * 10.0 0.1 (0.22) 0.18 ?0.03 + 0.08 0.5 0.08 1 16 17 32 33 48 49 64 0.5 0.2 (11.0) 0.127 ?0.02 + 0.05 a 1.5 ?0.1 + 0.2 0.1 0.1 0.5 0.2 0?to 10 64pin lqfp (plastic) lqfp-64p-l01 * qfp064-p-1010-a 0.3g detail a 0.1 note: dimension * ?does not include mold protrusion.

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