PB58 ? PB58a PB58u 1 PB58, PB58a features ? wide supply range 15v to 150v ? high output current 1.5a continuous (PB58) 2.0a continuous (PB58a) ? voltage and current gain ? high slew 50v/s minimum (PB58) 75v/s minimum (PB58a) ? programmable output current limit ? high power bandwidth 320 khz minimum ? low quiescent current 12ma typical ? evaluation kit see ek50 applications ? high voltage instrumentation ? electrostatic transducers & deflection ? programmable power supplies up to 280v p-p description the PB58 is a high voltage, high current amplifer designed to provide voltage and current gain for a small signal, general purpose op amp. including the power booster within the feed - back loop of the driver amplifer results in a composite amplifer with the accuracy of the driver and the extended output voltage range and current capability of the booster. the PB58 can also be used without a driver in some applications, requiring only an external current limit resistor to function properly. the output stage utilizes complementary mosfets, pro - viding symmetrical output impedance and eliminating second breakdown limitations imposed by bipolar transistors. internal feedback and gainset resistors are provided for a pin-strapable gain of 3. additional gain can be achieved with a single external resistor. compensation is not required for most driver/gain confgurations, but can be accomplished with a single external capacitor. enormous fexibility is provided through the choice of driver amplifer, current limit, supply voltage, voltage gain, and compensation. this hybrid circuit utilizes a beryllia (beo) substrate, thick flm resistors, ceramic capacitors and semiconductor chips to maximize reliability, minimize size and give top performance. ultrasonically bonded aluminum wires provide reliable inter - connections at all operating temperatures. the 8-pin to-3 package is electrically isolated and hermetically sealed using one-shot resistance welding. the use of compressible isolation washers voids the warranty. typical application figure 1. inverting composite amplifer. equivalent schematic external connections 3 1 2 6 8 5 4 7 in gain com comp q1 q4 q2 q3 q5 q6 q7 q8 q10 q9 +vs out cl Cvs q11 6.2k 50k 3.1k 1 2 3 4 5 6 7 8 top view cl +v s in com Cv s gain r g comp c c out r cl op amp PB58 c f r f v in r i +15v C15v in com +vs Cvs r cl out c c r g r l 8-pin to-3 package style ce power booster amplifier PB58 ? PB58a p r o d u c t i n n o v a t i o n f r o m copyright ? cirrus logic, inc. 2009 (all rights reserved) http://www.cirrus.com may 2009 apex ? PB58urevk p r o d u c t i n n o v a t i o n f r o m
PB58 ? PB58a 2 PB58u supply voltage, +v s to Cv s 300v output current, within soa 2.0a power dissipation, internal at t c = 25c 1 83w input voltage, referred to com 15v temperature, pin solder10 sec max 300c temperature, junction 1 175c temperature, storage C65 to +150c operating temperature range, case C55 to +125c specifications absolute maximum ratings PB58 PB58a parameter test conditions 2 min typ max min typ max units input offset voltage, initial .75 1.75 * 1.0 v offset voltage, vs. temperature full temperature range 3 C4.5 C7 * * mv/c input impedance, dc 25 50 * * k input capacitance 3 * pf closed loop gain range 3 10 25 * * * v/v gain accuracy, internal rg, rf a v = 3 10 15 * * % gain accuracy, external rf a v = 10 15 25 * * % phase shift f = 10khz, av cl = 10, c c = 22pf 10 * f = 200khz, av cl = 10, c c = 22pf 60 * output voltage swing io = 1.5a (PB58), 2a (PB58a) v s C11 v s C8 v s C15 v s C11 v voltage swing io = 1a v s C10 v s C7 * * v voltage swing io = .1a v s C8 v s C5 * * v current, continuous 1.5 2.0 a slew rate full temperature range 50 100 75 * v/s capacitive load full temperature range 2200 * pf settling time to .1% r l = 100, 2v step 2 * s power bandwidth v c = 100 vpp 160 320 240 * khz small signal bandwidth c c = 22pf, a v = 25, vcc = 100 100 * khz small signal bandwidth c c = 22pf, a v = 3, vcc = 30 1 * mhz power supply voltage, v s 4 full temperature range 15 6 60 150 * * * v current, quiescent v s = 15 11 * ma v s = 60 12 * ma v s = 150 14 18 * * ma thermal resistance, ac junction to case 5 full temp. range, f > 60hz 1.2 1.3 * * c/w resistance, dc junction to case full temp. range, f < 60hz 1.6 1.8 * * c/w resistance, junction to air full temperature range 30 * c/w temperature range, case meets full range specifcations C25 25 85 * * * c notes: * the specifcation of PB58a is identical to the specifcation for PB58 in applicable column to the left. 1. long term operation at the maximum junction temperature will result in reduced product life. derate internal power dissipation to achieve high mttf (mean time to failure). 2. the power supply voltage specifed under typical (typ) applies, t c = 25c unless otherwise noted. 3. guaranteed by design but not tested. 4. +v s and Cv s denote the positive and negative supply rail respectively. 5. rating applies if the output current alternates between both output transistors at a rate faster than 60hz. 6. +v s /Cv s must be at least 15v above/below com. the PB58 is constructed from mosfet transistors. esd handling procedures must be observed. the internal substrate contains beryllia (beo). do not break the seal. if accidentally broken, do not crush, machine, or subject to temperatures in excess of 850c to avoid generating toxic fumes. caution p r o d u c t i n n o v a t i o n f r o m
PB58 ? PB58a PB58u 3 C25 0 25 50 75 100 0 power derating internal power dissipation, p(w) C25 25 125 0 1.5 2 current limit 1 .5 slew rate, sr (v/s) 100 10m frequency, f (hz) 0 60 small signal response open loop gain, a (db) 20 40 80 1k 10k 10m C10 20 30 small signal response 10 1k 10k 10m frequency, f (hz) C180 100k 1m 10m frequency, f (hz) 10 300 power response output voltage, v q (v p-p ) 20 100 200 1 time, t (s) -80 pulse response 300 3k 30k frequency, f (hz) .001 .1 harmonic distortion distortion, thd (%) .01 .03 C25 75 case temperature, t c (c) 0 quiescent current 20 100 0 25 input offset voltage input offset voltage, v os (v) .01 .05 2 output current, i o (a) 4 12 14 output voltage swing voltage drop from supply, v s - v o (v) 10 300k 3m 1k .003 slew rate vs. temp. 0 300 400 100 200 0 50 75 100 40 small signal response 100k 1 1.5 8 -1.5 1k 10k 100k 1m 125 20 100k 1m frequency, f (hz) closed loop gain, a (db) current limit, i lim (a) 6 50 125 5 10 15 -1 -.5 0 .5 1m C135 C90 C45 0 30 10k case temperature, t c (c) case temperature, t c (c) open loop phase, () C180 C135 C90 C45 0 closed loop phase, () 0 av cl = 10 av cl = 3 av cl = 25 av cl = 25 av cl = 10 av cl = 3 v o + v o - quiescent current, i q (ma) vs = 100v vs = 30v case temperature, t c (c) C25 75 100 0 25 50 125 vs = 150v C25 75 case temperature, t c (c) 100 0 25 50 125 driver = tl070 v s = 60v v o = 95v p-p 60 80 100 r cl = .47 r cl = .68 r cl = 1.5 c c = 22pf c c = 22pf 40 50 2 3 4 5 6 7 8 -60 -40 -20 0 20 40 60 80 output voltage, v q (v) r l = 35 r l = 1k -slew +slew p r o d u c t i n n o v a t i o n f r o m
PB58 ? PB58a 4 PB58u stability stability can be maximized by observing the following guidelines: 1. operate the booster in the lowest practical gain. 2. operate the driver amplifer in the highest practical effective gain. 3. keep gain-bandwidth product of the driver lower than the closed loop bandwidth of the booster. 4. minimize phase shift within the loop. a good compromise for (1) and (2) is to set booster gain from 3 to 10 with total (composite) gain at least a factor of 3 times booster gain. guideline (3) implies compensating the driver as required in low composite gain confgurations. phase shift within the loop (4) is minimized through use of booster and loop compensation capacitors cc and cf when required. typical values are 5pf to 33pf. stability is the most difficult to achieve in a confguration where driver effective gain is unity (ie; total gain = booster gain). for this situation, table 1 gives compensation values for optimum square wave response with the op amp drivers listed. driver c ch c f c c fpbw sr op07 - 22p 22p 4khz 1.5 741 - 18p 10p 20khz 7 lf155 - 4.7p 10p 60khz >60 lf156 - 4.7p 10p 80khz >60 tl070 22p 15p 10p 80khz >60 for: r f = 33k, r i = 3.3k, r g = 22k table 1: typical values for case where op amp effective gain = 1. figure 2. non-inverting composite amplifer. slew rate the slew rate of the composite amplifer is equal to the slew rate of the driver times the booster gain, with a maximum value equal to the booster slew rate. output swing the maximum output voltage swing required from the driver op amp is equal to the maximum output swing from the booster divided by the booster gain. the vos of the booster must also be supplied by the driver, and should be subtracted from the available swing range of the driver. note also that effects of vos drift and booster gain accuracy should be considered when calculating maximum available driver swing. general please read application note 1 "general operating con - siderations" which covers stability, supplies, heat sinking, mounting, current limit, soa interpretation, and specifcation interpretation. visit www.cirrus.com for design tools that help automate tasks such as calculations for stability, internal power dissipation, current limit; heat sink selection; apex precision powers complete application notes library; technical seminar workbook; and evaluation kits. current limit for proper operation, the current limit resistor (r cl ) must be con nected as shown in the external connection diagram. the minimum value is 0.33 with a maximum practical value of 47. for optimum reliability the resistor value should be set as high as possible. the value is calculated as follows: +i l = .65/r cl + .010, -i l = .65/r cl . safe operating area note: the output stage is protected against transient fyback. however, for protection against sustained, high energy fyback, external fast-recovery diodes should be used. composite amplifier considerations cascading two amplifers within a feedback loop has many advantages, but also requires careful consideration of several amplifer and system parameters. the most important of these are gain, stability, slew rate, and output swing of the driver. operating the booster amplifer in higher gains results in a higher slew rate and lower output swing requirement for the driver, but makes stability more difficult to achieve. gain set r g = [ (av-1) ? 3.1k] C 6.2k r g + 6.2k av = +1 3.1k the boosters closed-loop gain is given by the equation above. the composite amplifers closed loop gain is determined by the feedback network, that is: Crf/ri (inverting) or 1+rf/ri (non-inverting). the driver amplifers effective gain is equal to the composite gain divided by the booster gain. example: inverting confguration (fgure 1) with r i = 2k, r f = 60k, r g = 0 : av (booster) = (6.2k/3.1k) + 1 = 3 av (composite) = 60k/2k = C 30 av (driver) = C 30/3 = C10 t = 100ms steady state t c = 25c steady state t c = 85c steady state t c = 125c 3 2 1 .2 .3 .4 .5 10 20 30 40 50 100 200 300 output current from +v s or Cv s (a) supply to output differential voltage, v s Cv o (v) .1 soa op amp PB58 c f r f r i +15v C15v in com +vs Cvs r cl out c c r g r l v in gain comp c ch p r o d u c t i n n o v a t i o n f r o m
PB58 ? PB58a PB58u 5 cont acting cirrus logic support for all apex precision power product questions and inquiries, call toll free 800-546-2739 in north america. for inquiries via email, please contact apex.support@cirrus.com. international customers can also request support by contacting their local cirrus logic sales representative. to fnd the one nearest to you, go to www.cirrus.com important notice cirrus logic, inc. and its subsidiaries ("cirrus") believe that the information contained in this document is accurate and reliable. however, the information is subject to change without notice and is provided "as is" without warranty of any kind (express or implied). customers are advised to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. all products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those pertaining to warranty, indemnifcation, and limitation of liability. no responsibility is assumed by cirrus for the use of this information, including use of this information as the basis for manufacture or sale of any items, or for infringement of patents or other rights of third parties. this document is the property of cirrus and by furnishing this information, cirrus grants no license, express or implied under any patents, mask work rights, copyrights, trademarks, trade secrets or other intellectual property rights. cirrus owns the copyrights associated with the information contained herein and gives con - sent for copies to be made of the information only for use within your organization with respect to cirrus integrated circuits or other products of cirrus. this consent does not extend to other copying such as copying for general distribution, advertising or promotional purposes, or for creating any work for resale. certain applications using semiconductor products may involve potential risks of death, personal injury, or severe prop - erty or environmental damage (critical applications). cirrus products are not designed, authorized or warranted to be suitable for use in products surgically implanted into the body, automotive safety or security devices, life support prod - ucts or other critical applications. inclusion of cirrus products in such applications is understood to be fully at the cus - tomers risk and cirrus disclaims and makes no warranty, express, statutory or implied, including the implied warranties of merchantability and fitness for particular purpose, with regard to any cirrus product that is used in such a manner. if the customer or customers customer uses or permits the use of cirrus products in critical applications, customer agrees, by such use, to fully indemnify cirrus, its officers, directors, employees, distributors and other agents from any and all liability, including attorneys fees and costs, that may result from or arise in connection with these uses. cirrus logic, cirrus, and the cirrus logic logo designs, apex precision power, apex and the apex precision power logo designs are trademarks of cirrus logic, inc. all other brand and product names in this document may be trademarks or service marks of their respective owners. p r o d u c t i n n o v a t i o n f r o m
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