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cystech electronics corp. spec. no. : c892h8 issued date : 2013.02.01 revised date : page no. : 1/10 MTB09N04H8 cystek product specification n-channel logic level enhancement mode power mosfet MTB09N04H8 bv dss 40v i d 60a v gs =10v, i d =10a 6m r dson(typ) v gs =4.5v, i d =8a 10m description the MTB09N04H8 is a n-channel enhancement-mode mosfet, providing the designer with the best combination of fast switching, ruggedized device de sign, low on-resistance and cost effectiveness. features ? single drive requirement ? low on-resistance ? fast switching characteristic ? dynamic dv/dt rating ? repetitive avalanche rated ? pb-free lead plating and halogen-free package symbol outline MTB09N04H8 edfn56 pin 1 g gate d drain s source
cystech electronics corp. spec. no. : c892h8 issued date : 2013.02.01 revised date : page no. : 2/10 MTB09N04H8 cystek product specification absolute maximum ratings (ta=25 c) parameter symbol limits unit drain-source voltage v ds 40 gate-source voltage v gs 20 v continuous drain current @ t c =25 c, v gs =10v 60 continuous drain current @ t c =100 c, v gs =10v 38 continuous drain current @ t a =25 c, v gs =10v 8.6 *3 continuous drain current @ t a =70 c, v gs =10v i d 6.9 *3 pulsed drain current i dm 140 *1 avalanche current i as 16 a avalanche energy @ l=1mh, i d =16a, r g =25 e as 128 repetitive avalanche energy @ l=0.05mh e ar 5 *2 mj t c =25 50 total power dissipation t c =100 p d 30 w operating junction and storage temp erature range tj, tstg -55~+150 c thermal data parameter symbol value unit thermal resistance, junction-to-case, max r th,j-c 2.5 c/w thermal resistance, junction-to-ambient, max r th,j-a 50 *3 c/w note : 1. pulse width limited by maximum junction temperature 2. duty cycle 1% 3. surface mounted on 1 in2 copper pad of fr-4 board, 125 c/w when mounted on minimum copper pad characteristics (t c =25 c, unless otherwise specified) symbol min. typ. max. unit test conditions static bv dss 40 - - v v gs =0, i d =250 a v gs(th) 1 2.1 3 v v ds = v gs , i d =250 a g fs *1 - 18 - s v ds =5v, i d =10a i gss - - 100 na v gs = 20 - - 1 v ds =40v, v gs =0 i dss - - 25 a v ds =40v, v gs =0, tj=125 c i d(on) *1 60 - - a v ds =10v, v gs =10v - 6 8 m v gs =10v, i d =10a r ds(on) *1 - 10 13 m v gs =4.5v, i d =8a dynamic ciss - 3252 - coss - 183 - crss - 155 - pf v gs =0v, v ds =25v, f=1mhz cystech electronics corp. spec. no. : c892h8 issued date : 2013.02.01 revised date : page no. : 3/10 MTB09N04H8 cystek product specification characteristics (t c =25 c, unless otherwise specified) symbol min. typ. max. unit test conditions qg (v gs =10v) *1, 2 - 36 - qg (v gs =4.5v) *1, 2 - 22.8 - qgs *1, 2 - 10.4 - qgd *1, 2 - 9.3 - nc v ds =20v, v gs =10v, i d =30a t d(on) *1, 2 - 10 - tr *1, 2 - 11 - t d(off) *1, 2 - 35 - t f *1, 2 - 13 - ns v ds =20v, i d =10a, v gs =10v, r gs =3 rg 2 3.5 5 v gs =15mv, v ds =0v, f=1mhz source-drain diode i s *1 - - 60 i sm *3 - - 140 a v sd *1 - 0.7 1 v i f =1a, v gs =0v trr - 34 - ns qrr - 25 - nc i f =10a, di f /dt=100a/ s note : *1.pulse test : pulse width 300 s, duty cycle 2% *2.independent of operating temperature *3.pulse width limited by maximum junction temperature. ordering information device package shipping MTB09N04H8-0-t1-g dfn5 6 (pb-free lead plating an d halogen-free package) 3000 pcs / tape & reel cystech electronics corp. spec. no. : c892h8 issued date : 2013.02.01 revised date : page no. : 4/10 MTB09N04H8 cystek product specification recommended soldering footprint unit : mm cystech electronics corp. spec. no. : c892h8 issued date : 2013.02.01 revised date : page no. : 5/10 MTB09N04H8 cystek product specification typical characteristics typical output characteristics 0 20 40 60 80 100 120 140 012345 v ds , drain-source voltage(v) i d , drain current (a) 10v,9v,8v,7v,6v v gs =4v v gs =5v brekdown voltage vs ambient temperature 0.4 0.6 0.8 1 1.2 1.4 -75 -50 -25 0 25 50 75 100 125 150 175 tj, junction temperature(c) bv dss , normalized drain-source breakdown voltage i d =250 a, v gs =0v static drain-source on-state resistance vs drain current 1 10 100 1000 0.01 0.1 1 10 100 i d , drain current(a) r ds(on) , static drain-source on-state resistance(m) v gs =3.5v v gs =10v v gs =4.5v reverse drain current vs source-drain voltage 0.2 0.4 0.6 0.8 1 1.2 024681 i dr , reverse drain current(a) v sd , source-drain voltage(v) static drain-source on-state resistance vs gate-source voltage 0 40 80 120 160 200 024681 0 0 tj=25c tj=150c v gs =0v drain-source on-state resistance vs junction tempearture 0 0.4 0.8 1.2 1.6 2 2.4 -60 -20 20 60 100 140 180 tj, junction temperature(c) r ds(on) , normalized static drain- source on-state resistance v gs =10v, i d =10a r ds( on) @tj=25c : 6m v gs , gate-source voltage(v) r ds(on) , static drain-source on- state resistance(m) i d =10a cystech electronics corp. spec. no. : c892h8 issued date : 2013.02.01 revised date : page no. : 6/10 MTB09N04H8 cystek product specification typical characteristics(cont.) capacitance vs drain-to-source voltage 10 100 1000 10000 0.1 1 10 100 v ds , drain-source voltage(v) capacitance---(pf) c oss ciss crss threshold voltage vs junction tempearture 0.4 0.6 0.8 1 1.2 1.4 -60 -20 20 60 100 140 tj, junction temperature(c) v gs(th) , normalized threshold voltage i d =250 a forward transfer admittance vs drain current 0.01 0.1 1 10 100 0.001 0.01 0.1 1 10 i d , drain current(a) g fs , forward transfer admittance(s) ta=25c pulsed v ds =5v gate charge characteristics 0 2 4 6 8 10 0 5 10 15 20 25 30 35 40 qg, total gate charge(nc) v gs , gate-source voltage(v) i d =30a v ds =20v maximum safe operating area 0.001 0.01 0.1 1 10 100 1000 0.01 0.1 1 10 100 v ds , drain-source voltage(v) i d , drain current(a) t a =25c, tj=150c v gs =10v, r ja =125c/w single pulse dc 100ms r dson limited 1s 100 s 1ms 10ms maximum drain current vs casetemperature 0 10 20 30 40 50 60 70 25 50 75 100 125 150 175 t c , casetemperature(c) i d , maximum drain current(a) v gs =10v, r jc =2.5c/w cystech electronics corp. spec. no. : c892h8 issued date : 2013.02.01 revised date : page no. : 7/10 MTB09N04H8 cystek product specification typical characteristics(cont.) typical transfer characteristics 0 20 40 60 80 100 0123456 v gs , gate-source voltage(v) i d , drain current(a) v ds =5v single pulse power rating, junction to ambient (note on page 2) 0 100 200 300 400 500 600 700 800 900 1000 0.0001 0.001 0.01 0.1 1 10 100 1000 pulse width(s) power (w) t j(max) =150c t a =25c ja =125c/w transient thermal response curves 0.0001 0.001 0.01 0.1 1 1.e-04 1.e-03 1.e-02 1.e-01 1.e+00 1.e+01 1.e+02 1.e+03 t 1 , square wave pulse duration(s) r(t), normalized effective transient thermal resistance single pulse 0.01 0.02 0.05 0.1 0.2 d=0.5 1.r ja (t)=r(t)*r ja 2.duty factor, d=t 1 /t 2 3.t jm -t a =p dm *r ja (t) 4.r ja =125c/w cystech electronics corp. spec. no. : c892h8 issued date : 2013.02.01 revised date : page no. : 8/10 MTB09N04H8 cystek product specification recommended wave soldering condition product peak temperature soldering time pb-free devices 260 +0/-5 c 5 +1/-1 seconds recommended temperature profile for ir reflow profile feature sn-pb eutectic assembly pb-free assembly average ramp-up rate (tsmax to tp) 3 c/second max. 3 c/second max. preheat ? temperature min(t s min) ? temperature max(t s max) ? time(ts min to ts max ) 100 c 150 c 60-120 seconds 150 c 200 c 60-180 seconds time maintained above: ? temperature (t l ) ? time (t l ) 183 c 60-150 seconds 217 c 60-150 seconds peak temperature(t p ) 240 +0/-5 c 260 +0/-5 c time within 5 c of actual peak 10-30 seconds 20-40 seconds temperature(tp) ramp down rate 6 c/second max. 6 c/second max. time 25 c to peak temperature 6 minutes max. 8 minutes max. note : all temperatures refer to topside of t he package, measured on the package body surface. cystech electronics corp. spec. no. : c892h8 issued date : 2013.02.01 revised date : page no. : 9/10 MTB09N04H8 cystek product specification dfn5 6 dimension (c forming) marking : 8-lead dfn5 6 plastic package cys package code : h8 device name b09 n04 date code millimeters inches millimeters inches dim min. max. min. max. dim min. max. min. max. a 0.900 1.000 0.035 0.039 k 1.190 1.390 0.047 0.055 a3 0.254 ref 0.010 ref b 0.350 0.450 0.014 0.018 d 4.944 5.096 0.195 0.201 e 1.270 typ. 0.050 typ. e 5.974 6.126 0.235 0.241 l 0.559 0.711 0.022 0.028 d1 3.910 4.110 0.154 0.162 l1 0.424 0.576 0.017 0.023 e1 3.375 3.575 0.133 0.141 h 0.574 0.726 0.023 0.029 d2 4.824 4.976 0.190 0.196 10 12 10 12 e2 5.674 5.826 0.223 0.229 notes: 1.controlling dimension: millimeters. 2.maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.if there is any question with packing specification or packing method, please c ontact your local cystek sales office. material: ? lead: pure tin plated. ? mold compound: epoxy resin family, flammability solid burning class: ul94v-0. cystech electronics corp. spec. no. : c892h8 issued date : 2013.02.01 revised date : page no. : 10/10 MTB09N04H8 cystek product specification dfn5 6 dimension (g forming) marking: 8- device name date code lead power pak plastic packag e c 8 ystek package code: h 8-lead dfn5 6 plastic package cys package code : h8 b09 n04 millimeters inches millimeters inches dim min. max. min. max. dim min. max. min. max. a 0.80 1.00 0.031 0.039 e 5.70 5.90 0.224 0.232 a1 0.00 0.05 0.000 0.002 e 1.27 bsc 0.050 bsc b 0.35 0.49 0.014 0.019 h 5.95 6.20 0.234 0.244 c 0.254 ref 0.010 ref l1 0.10 0.18 0.004 0.007 d 4.90 5.10 0.193 0.201 g 0.60 ref 0.024 ref f 1.40 ref 0.055 ref k 4.00 ref 0.157 ref notes: 1.controlling dimension: millimeters. 2.maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.if there is any question with packing specification or packing method, please c ontact your local cystek sales office. material: ? lead: pure tin plated. ? mold compound: epoxy resin family, flammability solid burning class: ul94v-0. important notice: ? all rights are reserved. reproduction in whole or in part is prohibited without the prior written approval of cystek. ? cystek reserves the right to make changes to its products without notice. ? cystek semiconductor products are not warranted to be suitable for use in life-support applications, or systems. ? cystek assumes no liability for any consequence of customer pr oduct design, infringement of pat ents, or application assistance . |
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