specifications of any and all sanyo semiconductor co.,l td. products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer ' s products or equipment. to verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer ' sproductsor equipment. any and all sanyo semiconductor co.,ltd. products described or contained herein are, with regard to "standard application", intended for the use as general el ectronics equipment (home appliances, av equipment, communication device, office equipment, industrial equ ipment etc.). the products mentioned herein shall not be intended for use for any "special application" (medica l equipment whose purpose is to sustain life, aerospace instrument, nuclear control device, burning appliances, t ransportation machine, traffic signal system, safety equipment etc.) that shall require extremely high level of re liability and can directly threaten human lives in case of failure or malfunction of the product or may cause har m to human bodies, nor shall they grant any guarantee thereof. if you should intend to use our products for app lications outside the standard applications of our customer who is considering such use and/or outside the scope of our intended standard applications, please consult with us prior to the intended use. if there is n o consultation or inquiry before the intended use, our customer shall be solely responsible for the use. o2710 sy 20101014-s00002 no.a1863-1/5 LV58082MX overview LV58082MX is a 1ch step-down switching regulator. 0.3 fet is incorporated on the upper side to achieve high-efficiency operation for large output current. low- heat resistance and compact-pack age mfp8 (200mil) employed. current mode control type, with superior load current response and easy phase compensation en pin, allowing the standby mode with the current drain of 100 a pulse-by-pulse over-current protection and overheat protection available for protection of load devices soft start pin to be provided with a capacitance for soft start. functions ? 0.4a 1ch step-down switching regulator ? wide input dynamic range ( to 28v) ? standby mode ? over-current protection ? thermal shutdown ? reference voltage: 0.8v ? fixed frequency: 370khz ? soft start ? compact package: mfp8 (200mil) with heat sink specifications maximum ratings at ta = 25 c parameter symbol conditions ratings unit maximum input v in voltage v in max 32 v boot pin maximum voltage v bt max 37 v sw pin maximum voltage v sw max v in max v boot pin-sw pin maximum voltage v bs-sw max 7v fb, en, comp, ss pin maximum vfs max 7v allowable power dissipation pd max mount on a specified board * 2.05 w junction temperature tj max 150 c operating temperature topr -20 to 80 c storage temperature tstg -40 to 150 c * specified board: 46.4mm 31.8mm ? 1.7mm, glass epoxy. note: plan the maximum voltage while including coil and surge voltages, so that the maximum voltage is not exceeded even for an instant. bi-cmos ic step-down switching regulator orderin g numbe r : ena1863
LV58082MX no.a1863-2/5 recommended operating conditions at ta = 25 c parameter symbol conditions ratings unit v in pin voltage v in 8 to 28 v boot pin voltage v bt -0.3 to 34 v sw pin voltage v sw -0.4 to v in v boot pin-sw pin maximum voltage v bs-sw 6.5 v fb, en, comp, ss pin voltage v fso 6v electrical characteristics at ta = 25 c, v in = 12v, unless otherwise specified. ratings parameter symbol conditions min typ max unit ic current drain at standby i cc 1 en=0v 70 a ic current drain in operation i cc 2 en=open 5 ma reference voltage vref v in =8v to 28v ( 2%) - 2% 0.8 + 2% v fb pin bias current iref fb=0.8v application 10 100 na high-side on resistance ronh boot=5v 0.3 low-side on resistance ronl 6 oscillation frequency f osc 296 370 444 khz oscillation frequency during short-circuit protection f oscs 22 32 42 khz en high-threshold voltage venh 1.9 v en low-threshold voltage venl 0.8 v en pull-up corrent i en en = 0v 16 a maximum on duty d max 80 % current limit peak value icl1 v in =24v, v out =16.5v, l=33 h 0.55 0.8 a thermal shutdown temperature ttsd *design guarantee *2 160 c thermal shutdown temperature hysteresis dtsd *design guarantee *2 40 c soft start current i ss ss=0v 6 10 14 a *1: reference value (not tested before shipment) *2: design guarantee (value guaranteed by design and not tested before shipment)
LV58082MX no.a1863-3/5 package dimensions unit : mm (typ) 3372 pin assignment 1 2 3 4 8 7 6 5 boot v in sw gnd ss en comp fb to p view block diagram and sample application circuit (16.5v output) fb comp osc 370khz error amp. pwm comparator ss en uvlo + current sense amp. pre-drive vref 0.8v tsd internal regulator v in internal regulator (5v) internal stable supply v in =24v 1:n sw gnd boot boot (sw + vreg.) v out =16.5v ++ -- c3= 2200pf c4=open d1=sbm30-03 l : off h or open : on pre-drive current limit logic ceramic capacitor l1 = cdrh105rnp-330nc (sumida) +- sanyo : mfp8(200mil) 5.0 4.4 6.0 12 8 0.15 0.35 1.27 (0.65) 1.7 max (1.5) (2.6) (3.4) 0.05 0.43 top view side view side view bottom view -20 0 20 40 60 80 100 0 2.5 2.0 1.5 1.0 0.5 2.05 pd max -- ta ambient temperature, ta -- c allowable power dissipation, pd max -- w 1.15 mounted on a specified board: 46.4 31.8 1.7mm 3 glass epoxy both side
LV58082MX no.a1863-4/5 pin function pin no. pin name function equivalent circuit 1 boot upper mos transistor boot st rap capacitance connection pin. connect the boot capaci tance of about 0.01 f between sw pins. to protect the sw pin?s absolute maximum rating, to ensure stable operation, and to eliminate noise, the boot capacitance serial resistance (about 100 ) rb proves effective. 2 v in input voltage pin. connect substantially large (20 f or more) capacitance between this pin and gnd. 3 sw power switch pin. connect the output lc filter. connect the above capacitance between this pin and boot pin. v in cboot sw hi side mos low side mos 4 gnd ground pin. 5 fb feedback pin. sets the output voltage by means of split resistor in the section of the output voltage v out - fb - gnd. v out setting is made as calculated below: v out = vref { 1 + (r1 + r10) r3 } vref = 0.8v example: 3.3v output voltage (see block diagram and sample application circuit) v out = 0.8 { 1 + (27k + 4.3k) 10k } =3.304v 8 ss soft start pin. sets the soft start time by means of the built-in 10 a source voltage and external soft start capacity. the soft start capacity c6 can be set as follows: c6 = 10 a tss vref where, tss is the soft start time and vref is the reference voltage. example: 1.2ms soft start time achieved c6 = 10 a 1.2ms 0.8 v = 0.015 f ss vref 0.8v v in fb 10 a internal regulation line 6 comp phase compensation pin. connects with the phase compensation external capacitance and resistance of dc/dc converter close loop. comp v in internal regulation line clump circuit 7 en enable pin. converter enabled when set to the high voltage and disabled when low voltage or open state. en v in 2pf q117
LV58082MX ps no.a1863-5/5 sanyo semiconductor co.,ltd. assumes no responsib ility for equipment failures that result from using products at values that exceed, even momentarily, rate d values (such as maximum ra tings, operating condition ranges, or other parameters) listed in products specif ications of any and all sanyo semiconductor co.,ltd. products described or contained herein. sanyo semiconductor co.,ltd. strives to supply high-qual ity high-reliability products, however, any and all semiconductor products fail or malfunction with some probabi lity. it is possible that these probabilistic failures or malfunction could give rise to acci dents or events that could endanger human lives, trouble that could give rise to smoke or fire, or accidents that could cause dam age to other property. when designing equipment, adopt safety measures so that these kinds of accidents or e vents cannot occur. such measures include but are not limited to protective circuits and error prevention c ircuits for safe design, redundant design, and structural design. upon using the technical information or products descri bed herein, neither warranty nor license shall be granted with regard to intellectual property rights or any other rights of sanyo semiconductor co.,ltd. or any third party. sanyo semiconductor co.,ltd. shall not be liable f or any claim or suits with regard to a third party's intellctual property rights which has resulted from the use of the technical information and products mentioned above. information (including circuit diagr ams and circuit parameters) herein is for example only; it is not guaranteed for volume production. any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. when designing equi pment, refer to the "delivery specification" for the sanyo semiconductor co.,ltd. product that you intend to use. in the event that any or all sanyo semiconductor c o.,ltd. products described or contained herein are controlled under any of applicable local export control laws and regulations, such products may require the export license from the authorities conc erned in accordance with the above law. no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any in formation storage or retrieval system, or otherwise, without the prior written consent of sanyo semiconductor co.,ltd. considerations for the design insertion of serial beads in the schottky diode for rem oval of noise may cause generation of the negative voltage deviating from the absolute maximum rating at the sw pin, resulting in failure of normal operation. in such an event, do not insert beads as above described and, instead, remove noise by means of the boot resistance rb. this catalog provides information as of october, 2010. specifications and information herein are subject to change without notice.
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