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  ? semiconductor components industries, llc, 2001 april, 2001 rev. 5 1 publication order number: cs8271/d cs8271 adjustable micropower low dropout linear regulator with enable the cs8271 is an adjustable micropower voltage regulator with very low quiescent current (60 m a typical at 100 m a load). the output supplies 100 ma of load current with a maximum dropout voltage of only 600 mv. control logic includes enable . the combination of low quiescent current, outstanding regulator performance and control logic makes the cs8271 ideal for any battery operated equipment. the logic level enable compatible pin allows the user to put the regulator into a shutdown mode where it draws only 50 m a of quiescent current. the regulator is protected against reverse battery, short circuit, over voltage, and over temperature conditions. the device can withstand 60 v load dump transients making it suitable for use in automotive environments. the cs8271 is pin compatible with the national semiconductor lm2931. features ? low quiescent current ? adjustable output: 5.0 v to 12 v ? enable for sleep mode control ? 100 ma output current capability ? fault protection +60 v load dump 15 v reverse voltage short circuit thermal shutdown ? low reverse current (output to input) http://onsemi.com so8 d suffix case 751 1 8 enable adj 1 8271 alyw 8 nc nc nc gnd v in v out pin connections and marking diagram a = assembly location wl, l = wafer lot yy, y = year ww, w = work week device package shipping ordering information* cs8271yd8 so8 95 units/rail cs8271ydr8 so8 2500 tape & reel 1 8 dip8 n suffix case 626 so8 1 8 cs8271 awl yyww v in nc nc enable v out gnd nc adj dip8 cs8271yn8 dip8 50 units/rail *consult your local sales representative for other package options.
cs8271 http://onsemi.com 2 enable bandgap reference + sense current limit adj v out error amplifier figure 1. block diagram v in current source (circuit bias) over voltage shutdown thermal shutdown input gnd maximum ratings* rating value unit power dissipation internally limited peak transient voltage (46 v load dump @ v in = 14 v) 50, 60 v reverse battery 15 v output current internally limited esd susceptibility (human body model) 2.0 kv junction temperature 40 to +150 c storage temperature 55 to +150 c lead temperature soldering: wave solder (through hole styles only) (note 1) reflow (smd styles only) (note 2) 260 peak 230 peak c c adj, enable 0.3, 10 v v out 0.3, 20 v 1. 10 second maximum. 2. 60 second maximum above 183 c. *the maximum package power dissipation must be observed.
cs8271 http://onsemi.com 3 electrical characteristics (v out + 1.0 v v in 30 v, 5.0 v v out 12 v, i out = 10 ma, 40 c t a 125 c, 40 c t j 150 c, v enable = 0 v; unless otherwise specified.) characteristic test conditions min typ max unit output voltage dropout voltage i out = 100 m a, v drop = (v in v out ) i out = 100 ma, v drop = (v in v out ) 100 400 150 600 mv mv load regulation measure v out when i out = 100 m a, 100 ma. ld reg = abs ( d v out ) 0.1 1.0 %v out line regulation i out = 1.0 ma. measure v out when v in = v out + 1.0 v, 30 v, ln reg = abs ( d v out ) 0.1 0.5 %v out quiescent current, (i q ) active mode v in = 6.0 v, i out = 100 m a, v out setup for 5.0 v, i q = iv in i out v in = 13 v, i out = 100 m a, v out setup for 12 v, i q = iv in 100 m a v in = 30 v, i out = 100 m a, v out setup for 5.0 v. i q = iv in 100 m a v in = 30 v, i out = 100 m a, v out setup for 12 v. i q = iv in 100 m a i out = 50 ma, i q = iv in 50 ma i out = 100 ma, i q = iv in 100 ma 55 130 150 20 4.0 12 120 200 450 500 7.0 21 m a m a m a m a ma ma quiescent current, (i q ) sleep mode v in = 6.0 v, enable = 2.5 v, i qsleep = iv in v in = 30 v, enable = 2.5 v, i qsleep = iv in 20 75 50 350 m a m a ripple rejection f = 120 hz, note 3 60 75 db current limit v out = v out 500 mv, i lim = iv out 105 200 300 ma short circuit output current v out = 0 v, i shrt = iv out 15 100 215 ma thermal limit note 3 150 180 210 c overvoltage shutdown adjust v in from 28 v to 40 v until v out 1.0 v 30 34 38 v reverse current v in = 0 v, i rev = iv out , v out = 13.2 v 100 200 m a enable enable threshold 1.15 2.0 2.6 v enable input current v enable = 2.6 v v enable = 5.0 v 10 35 20 50 m a m a adjustment pin r1: feedback resistor between v out and adjust, r2: adjust resistor to ground. reference voltage 100 m a i out 100 ma 1.246 1.272 1.297 v adjustment pin current i adj = (v ref /r2) ((v out v ref )/r1) 20 500 na 3. guaranteed by design, not 100% tested in production. package lead description package lead # so8 dip8 lead symbol function 1 1 v out 100 ma output; adjustable from 5.0 v to 12 v. 2 2 gnd ground. 3, 6, 7 3, 6, 7 nc no connection. 4 4 adj resistor divider from v out to adj, sets output voltage. 5 5 enable logic level switch, when high, regulator is in sleep mode. 8 8 v in input voltage.
cs8271 http://onsemi.com 4 circuit description output voltage adjustment the output voltage of the cs8271 is adjustable to any value between 5.0 v and the maximum input voltage minus the dropout voltage. to adjust the output voltage, a pair of external resistors r1 and r2 are connected as shown in figure 2. the equation for the output voltage is v out  v ref   r1  r2 r2   i adj  r1 where v ref is the typical reference voltage and i adj is the adjust pin bias current. this is usually 500 na maximum. figure 2. output voltage adjustment v out cs8271 adj v out r1 v ref r2 output stage protection the output stage is protected against overvoltage, short circuit and thermal runaway conditions (figure 3). if the input voltage rises above 30 v (e.g. load dump), the output shuts down. this response protects the internal circuitry and enables the ic to survive unexpected voltage transients up to 60 v in magnitude. short circuit protection limits the amount of current the output transistor can supply. in the case of a cs8271 under a short circuit condition, the output transistor current is limited to 100 ma. should the junction temperature of the power device exceed 180 c (typ) the power transistor is turned off. thermal shutdown is an effective means to prevent die overheating since the power transistor is the principle heat source in the ic. figure 3. typical circuit waveforms for output stage protection i out load dump v in v out short circuit thermal shutdown > 30 v enable the enable function switches the output transistor. when the voltage on the enable pin exceeds 2.0 v typ, the output pass transistor turns off, leaving a high impedance facing the load. the ic will remain in sleep mode, drawing only 20 m a (typ), until the voltage on this input drops below the enable threshold.
cs8271 http://onsemi.com 5 application notes selecting the right capacitor value the output compensation capacitor c out , determines three main characteristics of a linear regulator: startup delay, load transient response and loop stability. the selection of a capacitor value and type should be based on cost, availability, size and temperature constraints. a tantalum or aluminum electrolytic capacitor is best, since a film or ceramic capacitor with almost zero esr, can cause instability. the aluminum electrolytic capacitor is the least expensive solution, but, if the circuit operates at low temperatures (25 c to 40 c), both the value and esr of the capacitor will vary considerably. the capacitor manufacturers data sheet usually provide this information. the value for the output compensation capacitor cout shown in figure 4 should work for most applications, but it is not necessarily the least expensive or the optimal solution. v in figure 4. test and application circuit showing an output compensation capacitor c in 0.1 m f enable v out r rst c out 10 m f adj cs8271 r l c adj (optional) to determine an acceptable value for c out for a particular application, start with a tantalum capacitor of the recommended value and work towards a less expensive alternative part. step 1: place the completed circuit with a tantalum capacitor of the recommended value in an environmental chamber at the lowest specified operating temperature and monitor the outputs with an oscilloscope. a decade box connected in series with the capacitor will simulate the higher esr of an aluminum capacitor. (leave the decade box outside the chamber, the small resistance added by the longer leads is negligible). step 2: with the input voltage at its maximum value, increase the load current slowly from zero to full load while observing the output for any oscillations. if no oscillations are observed, the capacitor is large enough to ensure a stable design under steady state conditions. step 3: increase the esr of the capacitor from zero using the decade box and vary the load current until oscillations appear. record the values of load current and esr that cause the greatest oscillation. this represents the worst case load conditions for the regulator at low temperature. step 4: maintain the worst case load conditions set in step 3 and vary the input voltage until the oscillations increase. this point represents the worst case input voltage conditions. step 5: if the capacitor is adequate, repeat steps 3 and 4 with the next smaller valued capacitor. (a smaller capacitor will usually cost less and occupy less board space.) if the capacitor oscillates within the range of expected operating conditions, repeat steps 3 and 4 with the next lar ger standard capacitor value. step 6: test the load transient response by switching in various loads at several frequencies to simulate its real work environment. vary the esr to reduce ringing. step 7: raise the temperature to the highest specified operating temperature. v ary the load current as instructed in step 5 to test for any oscillations. once the minimum capacitor value with the maximum esr is found, a safety factor should be added to allow for the tolerance of the capacitor and any variations in regulator performance. most good quality aluminum electrolytic capacitors have a tolerance of 20% so the minimum value found should be increased by at least 50% to allow for this tolerance plus the variation which will occur at low temperatures. the esr of the capacitor should be less than 50% of the maximum allowable esr found in step 3 above. capacitance on the adjust pin combined with the feedback resistors r1 and r2 can affect loop stability and should also be considered. the cs8271 internal circuitry produces about 5.0 pf to ground on the adjust pin. this capacitance, plus any additional external capacitance on the adjust pin will create a pole when combined with the resistive feedback network. the effect can be significant when using large values for the feedback resistors to minimize quiescent current. a capacitor connected from the adjust pin to ground provides additional means to compensate the regulator by creating a pole. alternately, a capacitor can be connected from the adjust pin to v out to create a zero.
cs8271 http://onsemi.com 6 calculating power dissipation in a single output linear regulator the maximum power dissipation for a single output regulator (figure 5) is: p d(max)   v in(max)  v out(min)  i out(max)  v in(max) i q (1) where: v in(max) is the maximum input voltage, v out(min) is the minimum output voltage, i out(max) is the maximum output current for the application, and i q is the quiescent current the regulator consumes at i out(max) . once the value of p d(max) is known, the maximum permissible value of r q ja can be calculated: r  ja  150 c  t a p d (2) the value of r q ja can then be compared with those in the package section of the data sheet. those packages with r q ja 's less than the calculated value in equation 2 will keep the die temperature below 150 c. in some cases, none of the packages will be sufficient to dissipate the heat generated by the ic, and an external heatsink will be required. figure 5. single output regulator with key performance parameters labeled smart regulator ? control features i out i in i q v in v out v out adj enable v in figure 6. application diagram cs8271 gnd r1 v ref r2 c 2 ** 10 m f v out c 1 * 0.1 m f c 1 * required if regulator is away from power supply filter. c 2 ** required for output stability. v out  v ref   r1  r2 r2   i adj  r1
cs8271 http://onsemi.com 7 package dimensions so8 d suffix case 75107 issue w seating plane 1 4 5 8 n j x 45  k notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a and b do not include mold protrusion. 4. maximum mold protrusion 0.15 (0.006) per side. 5. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.127 (0.005) total in excess of the d dimension at maximum material condition. a b s d h c 0.10 (0.004) dim a min max min max inches 4.80 5.00 0.189 0.197 millimeters b 3.80 4.00 0.150 0.157 c 1.35 1.75 0.053 0.069 d 0.33 0.51 0.013 0.020 g 1.27 bsc 0.050 bsc h 0.10 0.25 0.004 0.010 j 0.19 0.25 0.007 0.010 k 0.40 1.27 0.016 0.050 m 0 8 0 8 n 0.25 0.50 0.010 0.020 s 5.80 6.20 0.228 0.244 x y g m y m 0.25 (0.010) z y m 0.25 (0.010) z s x s m 
cs8271 http://onsemi.com 8 package dimensions dip8 n suffix case 62605 issue l notes: 1. dimension l to center of lead when formed parallel. 2. package contour optional (round or square corners). 3. dimensioning and tolerancing per ansi y14.5m, 1982. style 1: pin 1. ac in 2. dc + in 3. dc - in 4. ac in 5. ground 6. output 7. auxiliary 8. v cc 14 5 8 f note 2 a b t seating plane h j g d k n c l m m a m 0.13 (0.005) b m t dim min max min max inches millimeters a 9.40 10.16 0.370 0.400 b 6.10 6.60 0.240 0.260 c 3.94 4.45 0.155 0.175 d 0.38 0.51 0.015 0.020 f 1.02 1.78 0.040 0.070 g 2.54 bsc 0.100 bsc h 0.76 1.27 0.030 0.050 j 0.20 0.30 0.008 0.012 k 2.92 3.43 0.115 0.135 l 7.62 bsc 0.300 bsc m --- 10 --- 10 n 0.76 1.01 0.030 0.040  package thermal data parameter so8 dip8 unit r q jc typical 45 52 c/w r q ja typical 165 100 c/w on semiconductor and are trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. atypicalo parameters which may be provided in scill c data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including atypicalso must be validated for each customer application by customer's technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body , or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthori zed use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. publication ordering information japan : on semiconductor, japan customer focus center 4321 nishigotanda, shinagawaku, tokyo, japan 1410031 phone : 81357402700 email : r14525@onsemi.com on semiconductor website : http://onsemi.com for additional information, please contact your local sales representative. cs8271/d smart regulator is a registered trademark of semiconductor components industries, llc (scillc). literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 3036752175 or 8003443860 toll free usa/canada fax : 3036752176 or 8003443867 toll free usa/canada email : onlit@hibbertco.com n. american technical support : 8002829855 toll free usa/canada


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