NJU9252P 2-digit single chip a/d converter general description package outline the NJU9252P is a low operating current, high performance 2-digit single chip a/d converter containing a sample/hold circuit, an oscillator, a 7-segment decoder, led display driver and a control circuit. the led display changes by the high-speed sampling rate of 4 times/s (typ). the NJU9252P realizes to apply with few external components, therefore it is most suited for digital meters, digital thermometers and the others. features pad location 8bit resolution, successive approximation method low input current ( 1a typ ) dynamic led direct drive sampling-rate ( 4 times/s typ ) sample/hold circuit on-die cr oscillation circuit on-die power-on initialization offset adjustment terminal low operating current applicable with few external components c-mos technology package dip18/dmp20 NJU9252Pm NJU9252Pd seg d seg c seg b seg a seg f seg g seg e com1 v ss v dd v ref inh inl inr offset 2 offset 1 test com2 1 2 3 4 5 6 7 8 9 18 17 16 15 14 13 12 11 10 dip18 seg d seg c seg b seg a seg f seg g seg e nc com1 v ss v dd v ref inh inl inr offset 2 offset 1 nc test com2 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 dmp20
NJU9252P block diagram terminal description symbol function seg d led segment driver d output ( pch open-drain ) seg c led segment driver c output ( pch open-drain ) seg b led segment driver b output ( pch open-drain ) seg a led segment driver a output ( pch open-drain ) seg f led segment driver f output ( pch open-drain ) seg g led segment driver g output ( pch open-drain ) seg e led segment driver e output ( pch open-drain ) com1 led common driver output 1 ( nch open-drain ) v ss gnd com2 led common driver output 2 ( nch open-drain ) t est test term inal offset 1 offset adjustment terminal 1 offset 2 offset adjustment terminal 2 inr input gain setup resistor connecting terminal inl analog differential input ( lo ) inh analog differential input ( hi ) v ref reference voltage v dd supply voltage nc non connection seg a (pch open drain) segment decoder latch multi plexer segment driver common driver osc dac cloc k shift register sample & hold comp dif amp bin bcd inh inl inr offset 1 test v dd v ss com 1 2 (nch open drain) v ref div lat power on reset offset 2 b c e f g d
NJU9252P absolute maximum ratings (ta=25 c) parameter symbol rating unit supply voltage v dd -0.3 to +7.0 v analog input voltage v in gnd to v ref v reference input voltage v ref gnd to v dd v power dissipation p d 500 mw operating temperature range topr -20 to +75 c storage temperature range tstg -40 to +125 c note1) the input current is limited to 100a when the input voltage is more than supply voltage. electrical characteristics (v dd =5v, ta=25 c) parameter symbol conditions min typ max unit operating voltage v dd 4.5 5.0 5.5 v ratiometric reading n99 v in =2.475v, v ref =3.2v 98 98/99 99 counts linearity d l full scale=2.475v note2) 0.5 2 lsb offset e off v ref =3.2v 1 2 lsb noise ( p-p value ) v ni v in =0.0v note3) full scale=2.475v 30 v leakage current i l v in =0.0v 1 5 a zero reading drift z d v in =0.0v, v ref =3.2v, -20 NJU9252P timing chart note4) seg a to seg g are an example to display ? 25 ?. the duty of com1 and com2 are 50% respectively. com1 and com2 are nch-fet open-drain type, seg a to seg g are pch-fet open-drain type. : the state of output terminal is high impedance. t conv internal clock com1 com2 seg a seg b seg c seg d seg e seg f seg g
NJU9252P display pattern application circuit ( ex. NJU9252Pm) thermometer 0 1 2 3 4 5 6 7 8 9 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 +5v 10uf 10k ? 10k ? 1uf full-scale adj. zero adj. led (cathode common) thermistor NJU9252Pm offset adj. [caution] the specifications on this data book are only given for information , without any guarantee as regards either mistakes or omissions. the application circuits in this data book are described only to show representative usages of the product and not intended for the guarantee or permission of any right including the industrial rights. nc nc
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