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| www..com MOTOROLA SEMICONDUCTOR TECHNICAL DATA MC14504B Hex Level Shifter for TTL to CMOS or CMOS to CMOS The MC14504B is a hex non-inverting level shifter using CMOS technology. The level shifter will shift a TTL signal to CMOS logic levels for any CMOS supply voltage between 5 and 15 volts. A control input also allows interface from CMOS to CMOS at one logic level to another logic level: Either up or down level translating is accomplished by selection of power supply levels VDD and VCC. The VCC level sets the input signal levels while VDD selects the output voltage levels. * UP Translates from a Low to a High Voltage or DOWN Translates from a High to a Low Voltage * Input Threshold Can Be Shifted for TTL Compatibility * No Sequencing Required on Power Supplies or Inputs for Power Up or Power Down * 3 to 18 Vdc Operation for VDD and VCC * Diode Protected Inputs to VSS * Capable of Driving Two Low-Power TTL Loads or One Low-Power Schottky TTL Load Over the Rated Temperature Range LOGIC DIAGRAM PIN ASSIGNMENT VCC VDD VCC Aout INPUT LEVEL SHIFTER OUTPUT Ain Bout Bin Cout MODE TTL/CMOS MODE SELECT Cin VSS Input Logic Levels TTL CMOS Output Logic Levels CMOS CMOS This device contains circuitry to protect the inputs against damage due to high static voltages or electric fields referenced to the VSS pin, only. Extra precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high-impedance circuit. For proper operation, the ranges VSS Vin 18 V and VSS Vout VDD are recommended. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either VSS or VDD). Unused outputs must be left open. 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 VDD Fout Fin MODE Eout Ein Dout Din L SUFFIX CERAMIC CASE 620 P SUFFIX PLASTIC CASE 648 D SUFFIX SOIC CASE 751B ORDERING INFORMATION MC14XXXBCP MC14XXXBCL MC14XXXBD Plastic Ceramic SOIC TA = - 55 to 125C for all packages. Mode Select 1 (VCC) 0 (VSS) 1/6 of package shown. v v v v REV 3 1/94 (c)MC14504B 1995 Motorola, Inc. 332 MOTOROLA CMOS LOGIC DATA IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIII I III I I I I I I I I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIII I III I I I I I I I I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIII I III I I I I I I I I I I IIIIIIIIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIII I III I I I I I I I I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIII I III I I I I I I I I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIII I III I I I I I I I I I I I IIIIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII III IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I III I III IIIIIIIIIIIIIIIIIIII III I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIII I III I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIII I IIIII IIIII III I I I I I II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I III I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I III I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIII I I I III I I I IIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIII I I I III I I I IIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIII I I IIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIII I I I III I I I IIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIII I I IIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIII I IIIIIIII I I I IIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIII IIIIIIIIIIIIII I IIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIII I I IIIIIIIIIIIIIIIIIIIII IIII IIIIIIIIIIIIIIIIIIIII I I IIIIIIIIIIIIIIIIIIIII #Data labelled "Typ" is not to be used for design purposes but is intended as an indication of the IC's potential performance. * Maximum Ratings are those values beyond which damage to the device may occur. Temperature Derating: Plastic "P and D/DW" Packages: - 7.0 mW/_ C From 65_ C To 125_ C Ceramic "L" Packages: - 12 mW/_ C From 100_ C To 125_ C www..com ELECTRICAL CHARACTERISTICS (Voltages Referenced to VSS) MAXIMUM RATINGS* (Voltages Referenced to VSS) Quiescent Current (Per Package) TTL-CMOS Mode Quiescent Current (Per Package) TTL-CMOS Mode Quiescent Current (Per Package) CMOS-CMOS Mode Input Capacitance (Vin = 0) Input Current Output Drive Current (VOH = 2.5 Vdc) (VOH = 4.6 Vdc) (VOH = 9.5 Vdc) (VOH = 13.5 Vdc) Input Voltage "1" Level (VOH = 9.0 Vdc) TTL-CMOS (VOH = 13.5 Vdc) TTL-CMOS (VOH = 9.0 Vdc) CMOS-CMOS (VOH = 13.5 Vdc) CMOS-CMOS (VOH = 13.5 Vdc) CMOS-CMOS Input Voltage "0" Level (VOL = 1.0 Vdc) TTL-CMOS (VOL = 1.5 Vdc) TTL-CMOS (VOL = 1.0 Vdc) CMOS-CMOS (VOL = 1.5 Vdc) CMOS-CMOS (VOL = 1.5 Vdc) CMOS-CMOS Output Voltage Vin = 0 V Symbol MOTOROLA CMOS LOGIC DATA Iin, Iout VDD VCC Vout Tstg Vin PD TL Vin = VCC (VOL = 0.4 Vdc) (VOL = 0.5 Vdc) (VOL = 1.5 Vdc) Storage Temperature DC Supply Voltage DC Supply Voltage Characteristic Parameter Lead Temperature (8-Second Soldering) Power Dissipation, per Package* Input or output Current (DC or Transient), per Pin Output Voltage (DC or Transient) Input Voltage (DC or Transient) "1" Level "0" Level Source Sink Symbol IDD or ICC VOH VOL IOH ICC IDD VIH IOL Cin VIL Iin VCC Vdc 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 10 5.0 5.0 5.0 5.0 10 - 0.5 to VDD + 0.5 -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- - 0.5 to + 18.0 - 0.5 to + 18.0 - 65 to + 150 - 0.5 to 18.0 Value 10 260 500 VDD Vdc 5.0 10 15 5.0 10 15 5.0 10 15 5.0 10 15 5.0 5.0 10 15 5.0 10 15 5.0 10 15 15 10 15 10 15 15 10 15 10 15 15 -- - 3.0 - 0.64 - 1.6 - 4.2 4.95 9.95 14.95 0.64 1.6 4.2 Min 2.0 2.0 3.6 3.6 7.1 -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- - 55_ C Unit mW mA _C _C V V V V 0.1 0.05 0.10 0.20 0.05 0.05 0.05 Max 5.0 5.0 5.0 0.5 1.0 2.0 0.8 0.8 1.5 1.5 3.0 -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- - 2.4 - 0.51 - 1.3 - 3.4 4.95 9.95 14.95 0.51 1.3 3.4 Min 2.0 2.0 3.5 3.5 7.0 -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 0.00001 0.0005 0.0010 0.0015 0.0005 0.0010 0.0015 - 4.2 - 0.88 - 2.25 - 8.8 Typ # 25_ C 1.5 1.5 2.75 2.75 5.5 1.3 1.3 2.25 2.25 4.5 0.88 2.25 8.8 2.5 2.5 2.5 5.0 5.0 10 15 0 0 0 0.1 0.05 0.10 0.20 0.05 0.05 0.05 Max 5.0 5.0 5.0 0.5 1.0 2.0 7.5 0.8 0.8 1.5 1.5 3.0 -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- - 1.7 - 0.36 - 0.9 - 2.4 4.95 9.95 14.95 0.36 0.9 2.4 Min 2.0 2.0 3.5 3.5 7.0 -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 125_ C 1.0 0.05 0.05 0.05 Max 6.0 6.0 6.0 3.8 7.5 15 1.5 3.0 6.0 0.8 0.8 1.4 1.5 2.9 MC14504B 333 -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- mAdc mAdc mAdc Adc Adc Adc Unit Vdc Vdc Vdc Vdc pF EE EE EE EE EE EE EE EE EE EE EE EEEEEEEEE EEEEEEEEE EEEEEEEEE EEEEEEEEE EEEEEEEEE EEEEEEEEE EEEEEEEEE EEEEEEEEE EEEEEEEEE EEEEEEEEE EEEEEEEEE EEEEEEEEE 5 10 15 VDD, SUPPLY VOLTAGE (Vdc) IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II I III I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II I III I I III I I I I I I I III I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II I III I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II I III I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II I III I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II I III I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II I III I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II I III I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II I III I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II I III I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II I III I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II I III I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II I III I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II I III I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II I III I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II I III I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II I III I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II I III I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II I III I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II I III I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II I III I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II I III I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II I III I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II I III I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II I III I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II I III I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II I III I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II I III III I I III I IIIIIIIIIIIII II I III I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II I III I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II I III I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II I III I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II I III I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II I III I I IIIIIIII I I I II I III III I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIII I III I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I III I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII #Data labelled "Typ" is not to be used for design purposes but is intended as an indication of the IC's potential performance. Output Rise and Fall Time Propagation Delay, Low to High Propagation Delay, High to Low www..com SWITCHING CHARACTERISTICS (CL = 50 pF, TA = 25_ C) MC14504B 334 Figure 3. Operating Boundary CMOS to CMOS Mode VDD, SUPPLY VOLTAGE (Vdc) VDD, SUPPLY VOLTAGE (Vdc) Figure 1. Input Switchpoint CMOS to CMOS Mode 10 15 20 0 VSp , INPUT SWITCHPOINT VOLTAGE (Vdc) VSp , INPUT SWITCHPOINT VOLTAGE (Vdc) 1 2 3 4 5 6 7 0 5 0 0 Characteristic 5 10 15 VCC, SUPPLY VOLTAGE (Vdc) tTLH, tTHL Symbol tPLH tPHL VCC = 10 V VCC = 5 V 20 20 CMOS - CMOS VCC > VDD TTL - CMOS VDD > VCC CMOS - CMOS VDD > VCC CMOS - CMOS VCC > VDD TTL - CMOS VDD > VCC CMOS - CMOS VDD > VCC Shifting Mode ALL Figure 4. Operating Boundary TTL to CMOS Mode Figure 2. Input Switchpoint TTL to CMOS Mode 10 15 20 0 1 2 3 4 5 6 7 0 5 VCC Vdc 5.0 5.0 10 5.0 5.0 5.0 5.0 10 5.0 5.0 10 15 15 10 15 15 -- -- -- 0 0 VDD Vdc 5.0 10 15 5.0 5.0 10 5.0 5.0 10 10 15 15 10 15 10 15 15 10 15 5 10 15 VDD, SUPPLY VOLTAGE (Vdc) 5 10 15 VCC, SUPPLY VOLTAGE (Vdc) Min -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- VCC = 5 V Limits Typ # 100 50 40 275 275 145 170 170 100 170 160 185 185 175 120 120 70 140 140 Max 200 100 80 550 550 290 340 340 200 340 320 370 370 350 240 240 140 280 280 20 20 Unit ns ns ns MOTOROLA CMOS LOGIC DATA www..com OUTLINE DIMENSIONS L SUFFIX CERAMIC DIP PACKAGE CASE 620-10 ISSUE V -A- 16 9 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEAD WHEN FORMED PARALLEL. 4. DIMENSION F MAY NARROW TO 0.76 (0.030) WHERE THE LEAD ENTERS THE CERAMIC BODY. DIM A B C D E F G H K L M N INCHES MIN MAX 0.750 0.785 0.240 0.295 --- 0.200 0.015 0.020 0.050 BSC 0.055 0.065 0.100 BSC 0.008 0.015 0.125 0.170 0.300 BSC 0_ 15_ 0.020 0.040 MILLIMETERS MIN MAX 19.05 19.93 6.10 7.49 --- 5.08 0.39 0.50 1.27 BSC 1.40 1.65 2.54 BSC 0.21 0.38 3.18 4.31 7.62 BSC 0_ 15 _ 0.51 1.01 -B- 1 8 C L -T- SEATING PLANE N E F D G 16 PL K M J 16 PL 0.25 (0.010) M M TB S 0.25 (0.010) TA S P SUFFIX PLASTIC DIP PACKAGE CASE 648-08 ISSUE R -A- 16 9 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. 5. ROUNDED CORNERS OPTIONAL. DIM A B C D F G H J K L M S INCHES MIN MAX 0.740 0.770 0.250 0.270 0.145 0.175 0.015 0.021 0.040 0.70 0.100 BSC 0.050 BSC 0.008 0.015 0.110 0.130 0.295 0.305 0_ 10 _ 0.020 0.040 MILLIMETERS MIN MAX 18.80 19.55 6.35 6.85 3.69 4.44 0.39 0.53 1.02 1.77 2.54 BSC 1.27 BSC 0.21 0.38 2.80 3.30 7.50 7.74 0_ 10 _ 0.51 1.01 B 1 8 F S C L -T- H G D 16 PL SEATING PLANE K J TA M M 0.25 (0.010) M MOTOROLA CMOS LOGIC DATA MC14504B 335 www..com OUTLINE DIMENSIONS D SUFFIX PLASTIC SOIC PACKAGE CASE 751B-05 ISSUE J -A- NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. MILLIMETERS MIN MAX 9.80 10.00 3.80 4.00 1.35 1.75 0.35 0.49 0.40 1.25 1.27 BSC 0.19 0.25 0.10 0.25 0_ 7_ 5.80 6.20 0.25 0.50 INCHES MIN MAX 0.386 0.393 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 BSC 0.008 0.009 0.004 0.009 0_ 7 _ 0.229 0.244 0.010 0.019 16 9 -B- 1 8 P 8 PL 0.25 (0.010) M B S G F K C -T- SEATING PLANE R X 45 _ M D 16 PL M J 0.25 (0.010) TB S A S DIM A B C D F G J K M P R Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. "Typical" parameters which may be provided in Motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. Motorola does not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer. How to reach us: USA/EUROPE/Locations Not Listed: Motorola Literature Distribution; P.O. Box 20912; Phoenix, Arizona 85036. 1-800-441-2447 or 602-303-5454 MFAX: RMFAX0@email.sps.mot.com - TOUCHTONE 602-244-6609 INTERNET: http://Design-NET.com JAPAN: Nippon Motorola Ltd.; Tatsumi-SPD-JLDC, 6F Seibu-Butsuryu-Center, 3-14-2 Tatsumi Koto-Ku, Tokyo 135, Japan. 03-81-3521-8315 ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park, 51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852-26629298 MC14504B 336 *MC14504B/D* MOTOROLA CMOS LOGIC DATA MC14504B/D |
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