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| CMLDM7484 SURFACE MOUNT N-CHANNEL AND P-CHANNEL ENHANCEMENT-MODE COMPLEMENTARY MOSFETS w w w. c e n t r a l s e m i . c o m DESCRIPTION: The CENTRAL SEMICONDUCTOR CMLDM7484 consists of complementary N-Channel and P-Channel Enhancement-mode silicon MOSFETs designed for high speed pulsed amplifier and driver applications. These MOSFETs offer Very Low rDS(ON) and Low Threshold Voltage. MARKING CODE: 8C7 SOT-563 CASE APPLICATIONS: * Load/Power Switches * Power Supply Converter Circuits * Battery Powered Portable Devices MAXIMUM RATINGS: (TA=25C) Drain-Source Voltage Gate-Source Voltage Continuous Drain Current Power Dissipation (Note 1) Power Dissipation (Note 2) Power Dissipation (Note 3) Operating and Storage Junction Temperature Thermal Resistance (Note 1) ELECTRICAL CHARACTERISTICS: (TA=25C) SYMBOL TEST CONDITIONS IGSSF, IGSSR VGS=8.0V, VDS=0 IDSS BVDSS BVDSS VGS(th) VSD VSD rDS(ON) rDS(ON) rDS(ON) rDS(ON) rDS(ON) rDS(ON) Notes: FEATURES: * ESD Protection up to 2kV * 350mW Power Dissipation * Very Low rDS(ON) * Low Threshold Voltage * Logic Level Compatible * Small, SOT-563 Surface Mount Package SYMBOL VDS VGS ID PD PD PD TJ, Tstg JA N-CH (Q1) MIN MAX 3.0 30 0.5 0.5 1.0 1.0 1.1 0.46 0.56 0.73 30 8.0 450 350 300 150 -65 to +150 357 P-CH (Q2) MIN MAX 3.0 30 0.5 0.5 1.0 1.0 1.1 1.1 2.0 3.3 UNITS V V mA mW mW mW C C/W UNITS A A V V V V V VDS=30V, VGS=0 VGS=0, ID=10A VGS=0, ID=100A VDS=VGS, ID=250A VGS=0, IS=400mA VGS=0, IS=100mA VGS=4.5V, VGS=4.5V, ID=200mA ID=430mA VGS=2.5V, ID=100mA VGS=2.5V, ID=200mA VGS=1.8V, ID=75mA VGS=1.8V, ID=100mA (1) Ceramic or aluminum core PC Board with copper mounting pad area of 4.0mm2 (2) FR-4 Epoxy PC Board with copper mounting pad area of 4.0mm2 (3) FR-4 Epoxy PC Board with copper mounting pad area of 1.4mm2 R2 (27-January 2011) CMLDM7484 SURFACE MOUNT N-CHANNEL AND P-CHANNEL ENHANCEMENT-MODE COMPLEMENTARY MOSFETS ELECTRICAL CHARACTERISTICS - Continued: (TA=25C) SYMBOL TEST CONDITIONS gFS VDS=10V, ID=100mA Crss VDS=25V, VGS=0, f=1.0MHz Ciss Coss VDS=25V, VGS=0, f=1.0MHz VDS=25V, VGS=0, f=1.0MHz N-CH (Q1) MIN MAX 200 10 45 15 P-CH (Q2) MIN MAX 200 10 55 15 UNITS mS pF pF pF SOT-563 - MECHANICAL OUTLINE PIN CONFIGURATION LEAD CODE: 1) Source Q1 2) Gate Q1 3) Drain Q2 4) Source Q2 5) Gate Q2 6) Drain Q1 MARKING CODE: 8C7 R2 (27-January 2011) w w w. c e n t r a l s e m i . c o m |
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