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| Type IPD079N06L3 G OptiMOS(TM)3 Power-Transistor Features * Ideal for high frequency switching and sync. rec. * Optimized technology for DC/DC converters * Excellent gate charge x R DS(on) product (FOM) * N-channel, logic level * 100% avalanche tested * Pb-free plating; RoHS compliant * Qualified according to JEDEC1) for target applications IPD079N06L3 G Product Summary V DS R DS(on),max ID 60 7.9 50 V m A Type Package Marking PG-TO-252-3 079N06L Maximum ratings, at T j=25 C, unless otherwise specified Parameter Continuous drain current Symbol Conditions ID T C=25 C2) T C=100 C Pulsed drain current3) Avalanche energy, single pulse4) Gate source voltage Power dissipation Operating and storage temperature IEC climatic category; DIN IEC 68-1 1) 2) 3) 4) Value 50 50 200 43 20 Unit A I D,pulse E AS V GS P tot T j, T stg T C=25 C I D=50 A, R GS=25 mJ V W C T C=25 C 79 -55 ... 175 55/175/56 J-STD20 and JESD22 Current is limited by bondwire; with an R thJC=1.9 K/W the chip is able to carry 74 A. See figure 3 for more detailed information See figure 13 for more detailed information Rev. 2.0 page 1 2008-12-09 IPD079N06L3 G Parameter Symbol Conditions min. Values typ. max. Unit Thermal characteristics Thermal resistance, junction - case Thermal resistance, junction - ambient R thJC R thJA minimal footprint 6 cm cooling area 5) 1.9 62 40 K/W Electrical characteristics, at T j=25 C, unless otherwise specified Static characteristics Drain-source breakdown voltage Gate threshold voltage Zero gate voltage drain current V (BR)DSS V GS=0 V, I D=1 mA V GS(th) I DSS V DS=V GS, I D=34 A V DS=60 V, V GS=0 V, T j=25 C V DS=60 V, V GS=0 V, T j=125 C Gate-source leakage current Drain-source on-state resistance I GSS R DS(on) V GS=20 V, V DS=0 V V GS=10 V, I D=50 A V GS=4.5 V, I D=25 A Gate resistance Transconductance RG g fs |V DS|>2|I D|R DS(on)max, I D=50 A 60 1.2 1.7 0.1 2.2 1 A V 36 10 1 6.3 9.0 0.9 71 100 100 7.9 13.5 S nA m 2 Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm (one layer, 70 m thick) copper area for drain connection. PCB is vertical in still air. 5) Rev. 2.0 page 2 2008-12-09 IPD079N06L3 G Parameter Symbol Conditions min. Values typ. max. Unit Dynamic characteristics Input capacitance Output capacitance Reverse transfer capacitance Turn-on delay time Rise time Turn-off delay time Fall time Gate Charge Characteristics 6) Gate to source charge Gate to drain charge Switching charge Gate charge total Gate plateau voltage Output charge Reverse Diode Diode continous forward current Diode pulse current Diode forward voltage Reverse recovery time Reverse recovery charge 6) C iss C oss C rss t d(on) tr t d(off) tf V DD=30 V, V GS=10 V, I D=20 A, R G=1.6 V GS=0 V, V DS=30 V, f =1 MHz - 3700 690 31 15 26 37 7 4900 920 - pF ns Q gs Q gd Q sw Qg V plateau Q oss V DD=30 V, V GS=0 V V DD=30 V, I D=50 A, V GS=0 to 4.5 V - 13 4 12 22 3.6 34 29 45 nC V nC IS I S,pulse V SD t rr Q rr T C=25 C V GS=0 V, I F=50 A, T j=25 C V R=30 V, I F=20A, di F/dt =100 A/s - 0.9 40 39 50 200 1.2 - A V ns nC See figure 16 for gate charge parameter definition Rev. 2.0 page 3 2008-12-09 IPD079N06L3 G 1 Power dissipation P tot=f(T C) 2 Drain current I D=f(T C); V GS10 V 100 60 80 40 60 P tot [W] 40 20 20 0 0 50 100 150 200 I D [A] 0 0 50 100 T C [C] 150 200 T C [C] 3 Safe operating area I D=f(V DS); T C=25 C; D =0 parameter: t p 103 4 Max. transient thermal impedance Z thJC=f(t p) parameter: D =t p/T 101 limited by on-state resistance 1 s 10 s 10 2 100 100 s 0.5 Z thJC [K/W] I D [A] 101 1 ms 10 ms DC 0.2 0.1 0.05 0.02 10-1 0.01 single pulse 100 10-1 10-1 100 101 102 10-2 10-5 10-4 10-3 10-2 10-1 100 V DS [V] t p [s] Rev. 2.0 page 4 2008-12-09 IPD079N06L3 G 5 Typ. output characteristics I D=f(V DS); T j=25 C parameter: V GS 200 10 V 6 V 5V 6 Typ. drain-source on resistance R DS(on)=f(I D); T j=25 C parameter: V GS 18 3.5 V 4V 4.5 V 5V 160 15 12 R DS(on) [m] 120 4.5 V I D [A] 9 6V 80 4V 6 10 V 40 3.5 V 3 3V 0 0 1 2 3 4 5 0 0 40 80 120 160 200 V DS [V] I D [A] 7 Typ. transfer characteristics I D=f(V GS); |V DS|>2|I D|R DS(on)max parameter: T j 200 8 Typ. forward transconductance g fs=f(I D); T j=25 C 120 160 100 80 120 g fs [S] 80 40 175 C 25 C I D [A] 60 40 20 0 0 1 2 3 4 5 6 0 0 50 100 150 V GS [V] I D [A] Rev. 2.0 page 5 2008-12-09 IPD079N06L3 G 9 Drain-source on-state resistance R DS(on)=f(T j); I D=50 A; V GS=10 V 10 Typ. gate threshold voltage V GS(th)=f(T j); V GS=V DS parameter: I D 18 2.5 15 2 340 A 12 R DS(on) [m] 9 max V GS(th) [V] 1.5 34 A typ 1 6 3 0.5 0 -60 -20 20 60 100 140 180 0 -60 -20 20 60 100 140 180 T j [C] T j [C] 11 Typ. capacitances C =f(V DS); V GS=0 V; f =1 MHz 12 Forward characteristics of reverse diode I F=f(V SD) parameter: T j 105 103 104 Ciss 102 175 C, 98% 175 C 25 C C [pF] 103 Coss I F [A] 25 C, 98% 10 102 Crss 1 101 0 20 40 60 100 0 0.5 1 1.5 2 V DS [V] V SD [V] Rev. 2.0 page 6 2008-12-09 IPD079N06L3 G 13 Avalanche characteristics I AS=f(t AV); R GS=25 parameter: T j(start) 100 14 Typ. gate charge V GS=f(Q gate); I D=50 A pulsed parameter: V DD 10 30 V 12 V 48 V 8 6 10 150 C 100 C 25 C V GS [V] 4 2 0 1000 I AS [A] 1 1 10 100 0 10 20 30 40 50 t AV [s] Q gate [nC] 15 Drain-source breakdown voltage V BR(DSS)=f(T j); I D=1 mA 16 Gate charge waveforms 65 V GS Qg 60 V BR(DSS) [V] V g s(th) 55 Q g(th) Q gs -60 -20 20 60 100 140 180 Q sw Q gd Q g ate 50 T j [C] Rev. 2.0 page 7 2008-12-09 IPD079N06L3 G PG-TO-252-3 Packaging: Rev. 2.0 page 8 2008-12-09 IPD079N06L3 G Published by Infineon Technologies AG 81726 Munich, Germany (c) 2008 Infineon Technologies AG All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. Rev. 2.0 page 9 2008-12-09 |
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