View AI2152_4783117.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

Ver0.12
1 A1 PROs A1 PROs
GENERAL DESCRIPTION
AI2152
Digital Signal Processor for Color CCD Cameras
The AI2152 is a digital signal-processing chip for color video camera. It includes timing generator and digital/analog output. Supports 250K/380K NTSC system CCD sensors and 290K/440K PAL system CCD sensors with complementary color filter. It also provided line lock function.
FEATURES
Support Ye, Cyan, Magenta, Green complementary color filter CCD sensors for NTSC : Ai325CA(250K), Ai338CA(380K) PAL : Ai329CA(290K), Ai344CA(440K)
Support external EEPROM to store parameter. Built-in auto white balance control. Built-in auto exposure control. Built-in 9bit digital to analog converter. Built-in mirror function. Built-in blemish compensation circuit storing the data in EEPROM, up to 200 blemish pixels. Support analog video output and UYVY (proprietary format) digital output. Built-in timing generator for vertical driver and CDS/AGC/ADC peripheral chips. Support line lock function. Single 3.3V power supply. (Horizontal drive pins can be 3.3V/5V) LQFP-80. (0.4mm pin pitch) Support user Definable GPIO. Programmable CCD Timing Driving Current. Programmable pull-up GPIO pin
1
AI2152
BLOCK DIAGRAM
2
AI2152
PIN DESCRIPTION
Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Symbol Reset OSCI OSCO VCC GND ADCLK AFE_SCL AFE_SDA DATAIN9 DATAIN8 DATAIN7 DATAIN6 DATAIN5 DATAIN4 VCC GND DATAIN3 DATAIN2 DATAIN1 DATAIN0 CLPOB ADCLP PBLK SDA GND VCC SCL GPIO_8 INLL GPIO_0 GPIO_1 I/O, P/G B I B P P O O O I I I I I I P P I I I I O O O B P P B B B B B System Reset OSC input OSC output VDD for Oscillator GND for Oscillator Clock Output for AFE ADC AFE 3-Wire SCL AFE 3-Wire SDA CCD Image Data (MSB) CCD Image Data CCD Image Data CCD Image Data CCD Image Data CCD Image Data Power (+3.3V) GND CCD Image Data CCD Image Data CCD Image Data CCD Image Data (LSB) Clamp Pulse Output for Optical Black Clamp Pulse Output for ADC Blanking Pulse Output EEPROM SDA for I2C Interface GND Power (+3.3V) EEPROM SCL for I2C interface General Purpose I/O (I2C RDY) Internal Sync/External Sync Selection General Purpose I/O (WB1) General Purpose I/O (WB2) Description
3
AI2152
Pin 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 Symbol GPIO_1 GPIO_2 GPIO_3 GNDDA VCC VDAC_REG VREF NC GNDDA Video GPIO_4 GPIO_5 GPIO_6 GPIO_7 GND VCC DV_DCLK TEST VRI DVIO_0 DVIO_1 DVIO_2 DVIO_3 GND VCC DVIO_4 DVIO_5 DVIO_6 DVIO_7 HD P O B B B B P P O I I B B B B P P B B B B O I/O, P/G B B B P P O O Description General Purpose I/O (WB2) General Purpose I/O (MIR) General Purpose I/O (BLC) AGND for Video DAC AVDD for Video DAC Regulator Output for Video DAC (VB) REF for Video DAC (IREF) No Connection Analog GND Analog Video Output General Purpose I/O (EEMDS) General Purpose I/O (EEMD1) General Purpose I/O (EEMD2) General Purpose I/O (EEMD3) GND Power (+3.3V) Clock for Digital Output TEST mode Line Lock Signal Input (50/60Hz) DV I/O for Digital Output (Left Key) DV I/O for Digital Output (Right Key) DV I/O for Digital Output (Push Lock) DV I/O for Digital Output (LED) GND Power (+3.3V) DV I/O for Digital Output (ECLIPSE) DV I/O for Digital Output DV I/O for Digital Output DV I/O for Digital Output HSYNC for Digital Output
4
AI2152
Pin 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 Symbol VD XV1 XV2 XV3 XV4 VCC GND XSG1 XSG2 XSUB HVCC HGND RG H1 H2 VCC GND AFE_CSN SHD SHP I/O, P/G O O O O O P P O O O P P O O O P P O O O Description VSYNC for Digital output Vertical Shift Register Clock1 Vertical Shift Register Clock2 Vertical Shift Register Clock3 Vertical Shift Register Clock4 Power (+3.3V) GND CCD Sensor Charge Readout Pulse Output TG1 CCD Sensor Charge Readout Pulse Output TG2 CCD Discharge Pulse Output Power (+3.3V or +5V for H1, H2, RG) GND Reset Gate Pulse Output H1 Clock Output for CCD Horizontal Register Drive H2 Clock Output for CCD Horizontal Register Drive Power (+3.3V) GND AFE 3-Wire CSN Data Sample and Hold Pulse Pre Charge Level Sample and Hold Pulse
I O P B
: Input : Output : Power : Bi-direction
5
AI2152
DSP REGISTER TABLE
ADDRESS 00 01 NAME STOP_EEPROM Reserved Reserved BIT 7:0 7:0 1:0 CCD_H1, CCD_H2 drive current When VCC=3.3V 0:24mA,1:16mA, 2:7mA, 3:4mA When VCC=5V 0:32mA, 1:21mA, 2:10mA, 3:6mA CCD_RG drive current When VCC=3.3V 0: 24mA, 1:16mA, 2:7mA, 3:4mA When VCC=5V 0:32mA, 1:21mA, 2:10mA, 3:6mA CONTENTS Stop reading from EEPROM, only when EEPROM data is FF.
CCD_H_DRV[1:0] 02 (1001h) CCD_RG_DRV[1:0]
3:2
5:4
Reserved
7:6 Digital video image out mode: 000: TG HSYNC/VSYNC output and DV_IO is at debug mode. if DVIO_O[0]=0 DV_IO={VRI_IN,VRI_REF,TV_VSYNC,TV_HSYNC, CLR_DSTB,AE_ACT,DEF_DSTB,OB_ACT} if DVIO_O[0]=1 DV_IO={VRI_IN,VRI_REF,TV_VSYNC,TV_HSYNC, CLR_DSTB,TV_ACT,CLR_HSYNC,CLR_VSYNC} 001: Sensor data output. (After defect/offset/gain For capture image) 010: Color data output. (After color For capture image) 011: TV data output. (Before D/A For connect to D/A) 100: TG HSYNC/VSYNC output and DV_IO is at GPIO mode. if DVIO_O[0]=0 ~ output TG_VSYNC with 180 Tsys_clk width if DVIO_O[0]=1 ~ output TG_VSYNC with 9 H line width 101: Sensor HSYNC/VSYNC output and DV_IO is at GPIO mode. 110: Color HSYNC/VSYNC output and DV_IO is at GPIO mode. 111: TV HSYNC/VSYNC output and DV_IO is at GPIO mode. if DVIO_O[0]=0 ~ TV HSYNC/VSYNC output if DVIO_O[0]=1 ~ CSYNC output from DV_VSYNC (DV_HSYNC is fixed to L) 1: Enable digital image output.
DV_MODE[2:0] 03 (1004h)
2:0
DV_EN Reserved
3 7:4
6
AI2152
ADDRESS NAME BIT CONTENTS Output Y when TV user defined color output mode. Note: (75% Amplitude YCbCr) White TV_TEST_Y=BFh, TV_TEST_CB=80h, TV_TEST_CR=80h Yellow TV_TEST_Y=AAh, TV_TEST_CB=20h, TV_TEST_CR=8Fh Cyan TV_TEST_Y=86h, TV_TEST_CB=A0h, TV_TEST_CR=20h Green TV_TEST_Y=70h, TV_TEST_CB=40h, TV_TEST_CR=2Fh Magenta TV_TEST_Y=4Fh, TV_TEST_CB=BFh, TV_TEST_CR=D0h Red TV_TEST_Y=39h, TV_TEST_CB=60h, TV_TEST_CR=E0h Blue TV_TEST_Y=16h, TV_TEST_CB=E0h, TV_TEST_CR=9Bh Black TV_TEST_Y=00h, TV_TEST_CB=80h, TV_TEST_CR=80h Output CB when TV user defined color output mode. Output CR when TV user defined color output mode. Color burst level U for NTSC/PAL. (Format: Signed_bit+ data, Unit: 1 level for 9 bits D/A) Note: NTSC bdh level. PAL abh level. Color burst level V for NTSC/PAL. (Format: Signed_bit+ data, Unit: 1 level for 9 bits D/A) Note: NTSC 0h level. PAL 2bh level. Output for PIN DVIO[7:0] Output enable for PIN DVIO[7:0] Pull up GPIO[7:0] input (high active)
04 (1070h)
TV_TEST_Y[7:0]
7:0
05 (1071h) 06 (1072h) 07 (1066h)
TV_TEST_CB[7:0] TV_TEST_CR[7:0]
7:0 7:0
TV_U_BURST[7:0]
7:0
08 (1067h)
TV_V_BURST[7:0]
7:0
09 (100Ch) 0A (100Dh) 0B (100Eh) 0C
DVIO_O[7:0] DVIO_OE[7:0] GPIO_PUL_UP [7:0] Reserved Reserved
7:0 7:0 7:0 7:0 0 1 6:2 7 5:0 7:6
0D (1040h)
VRI_RIS Reserved VRI_DIV2
0: Detect VRI at falling edge 1: Detect VRI at rising edge
1: Select VRI divide 2 White Clip Level
0E (1073h)
TV_W_CLIP[5:0] Reserved
7
AI2152
ADDRESS NAME BIT CONTENTS TV color/mono display mode selection. 00:color display mode with color burst. 01:mono display mode with color burst. 10:color display mode without color burst 11:mono display mode without color burst
0F (1074h)
TV_MONO[1:0]
1:0
Reserved 10 (1048h) LL_OFFSET [7:0]
7:2 7:0 Line lock offset reference to the VRI. (Unit: 512 Tsys_clk) Note: The maximum line lock offset for NTSC is 1/60s LL_OFFSET = 932. The maximum line lock offset for PAL is 1/50s LL_OFFSET = 1108.
11 (1049h)
LL_OFFSET [11:8]
3:0
Reserved
7:4 Line lock low pass filter. 00: line lock compensation per 1 frames 01: line lock compensation per 2 frames 1x: line lock compensation per 4 frames
12 (104Ah)
LL_LPF [1:0]
1:0
Reserved 13 (00DCh) 14 (00DDh) 15 (1050h) 16 (1051h) 17 (1052h) TG_H_DLY TG_H_DLY_MIR TV_PERIOD[7:0] TV_PERIOD[15:8] TV_PERIOD[20:16] Reserved TG_V_DELAY[5:0] Reserved 19 Reserved Reserved 1A (1060h) V_DAC_EN TV_SINC_EN Reserved 1B (1061h) Reserved TV_INV
7:2 7:0 7:0 7:0 7:0 4:0 7:5 5:0 7:6 7:0 4:0 5 6 7 0 1 1: Inverse video output 1: Enable video DAC. 1: Enable sinc filter TG VSYNC delay reference from TV VSYNC. (Unit: horizontal line) TG HSYNC delay reference from TV HSYNC TG HSYNC delay reference from TV HSYNC (Mirror)
TV frame period when line lock function is disable. (Unit: Tsys_clk) Recommend: NTSC 28.636MHz/29.97Hz = 955500 Tsys_clk. PAL 28.375MHz/25Hz = 1135000 Tsys_clk.
18 (1053h)
8
AI2152
ADDRESS NAME BIT CONTENTS 000: Normal image output. 001: Color bar output. 010: Triangle pattern 100: User defined color output. 110: User defined AC pattern output. 111: User defined grid pattern output. Others: Reserved
1B (1061h)
TV_PATTERN[2:0]
4:2
Reserved
7:5 TV setup level for NTSC/PAL. (Unit: 2 level when 9 bits D/A) Note: NTSC 48h level. PAL 3ch level.
1C (1062h)
TV_SETUP[6:0]
6:0
Reserved
7 TV SYNC level for NTSC/PAL. (Unit: 2 level when 9 bits D/A) Note: NTSC 3dh level. PAL 3ch level.
1D (1063h)
TV_SYNC[6:0]
6:0
Reserved TV_Y_GAIN[6:0]
7 6:0 TV Y gain. (Gain = 0.5 + TV_Y_GAIN/128) Note: TV_Y_GAIN 4ch
1E (1064h)
Reserved 1F (1065h) 20 (1068h) 21 (1069h) TV_UV_GAIN[6:0] Reserved TV_H_START[7:0] TV_H_START[10:8] Reserved
7 6:0 7 7:0 2:0 7:3 Vertical active start line of each field. (Unit: 1 Line) Note: NTSC 012h. PAL 017h. Horizontal active start pixel of each line. (Unit: 1 Tsys_clk) Note: NTSC 0f7h. PAL 0ffh. TV UV gain. (Gain = 1 + TV_UV_GAIN/128)
22 (106Ah)
TV_V_START[7:0]
7:0
23 (106Bh) 24 (106Ch) 25 (106Dh)
TV_V_START[8] Reserved TV_H_STOP[7:0] TV_H_STOP[10:8] Reserved
0 7:1 7:0 2:0 7:3 Horizontal active stop pixel of each line. (Unit: 1 Tsys_clk) Note: NTSC 6d4h. PAL 6ebh.
9
AI2152
ADDRESS NAME BIT CONTENTS Vertical active stop line of each field. (Unit: 1 Line) Note: NTSC 103h. PAL 135h.
26 (106Eh)
TV_V_STOP[7:0]
7:0
27 (106Fh)
V_V_STOP[8] Reserved
0 7:1 CCD Select: 00: NTSC 510X492 01: PAL 500X582 10: NTSC 768X494 11: PAL 752X582
CCD_SEL[1:0]
1:0
28 (1080h)
Reserved
5:2 Test Image mode 00: Disable Test Image (normal mode) 01: Replace AFE image data to internal test Gray pattern. 10: White Image 11: Black Image H inverse. (1:inverted) RG inverse. (1:inverted) Data Latch with ADCLK edge. (0:falling edge 1:rising edge)
TEST_IMG[1:0]
7:6
H_INV RG_INV 29 (1081h) AD_LH_RIS Reserved CCD_SEL H1_DELAY[2:0] 2A (1082h) Reserved H2_DELAY[2:0] Reserved RG_DELAY[3:0] 2B (1083h) RG_WIDTH[2:0] Reserved SHP_DELAY[3:0] 2C (1084h) SHP_WIDTH[2:0] Reserved 2D (1085h) 2E (1086h) 2F (1087h) SHD_DELAY[3:0] ADCLK_DELAY[3:0] OBCLP_H_START[7:0] OBCLP_H_START[9:8]
0 1 2 6:4 7 2:0 3 6:4 7 3:0 6:4 7 3:0 6:4 7 3:0 7:4 7:0
1: for A1PROs CCD H1 delay adjustment. (0-14ns delay)
H2 delay adjustment. (0-14ns delay)
RG delay adjustment. (0-22ns delay) RG pulse width adjustment. (Decreasing 0-14ns)
SHP delay adjustment. (0-22ns delay) SHP pulse width adjustment. (Decreasing 0-14ns)
SHD delay adjustment. (0-22ns delay) ADCLK delay. (0-22ns delay)
Horizontal start for OBCLP. (Unit: 1 pixel) 1:0
10
AI2152
ADDRESS 2F (1087h) 30 (1088h) 31 (1089h) 32 (108Ah) 33 (108Bh) 34 (108Ch) 35 (108Dh) 36 (00DEh) 37 (00DFh) 38 (00E0h) 39 (00E1h) 3A (00E2h) 3B (00E3h) 3C (00E4h) 3D (00E5h) 3E (00E6h) 3F (1098h) 40 (1099h) NAME Reserved OBCLP_H_STOP[7:0] OBCLP_H_STOP[9:8] Reserved H_START[5:0] Reserved V_START[3:0] Reserved H_SIZE[7:0] V_SIZE[7:0] C_M11_MT[7:0] C_M12_MT[7:0] C_M13_MT[7:0] C_M21_MT[7:0] C_M22_MT[7:0] C_M23_MT[7:0] C_M31_MT[7:0] C_M32_MT[7:0] C_M33_MT[7:0] BIT 7:2 7:0 1:0 7:2 5:0 7:6 3:0 7:4 7:0 7:0 7:0 7:0 7:0 7:0 7:0 7:0 7:0 7:0 7:0 Horizontal size of each line. (Unit: 4 pixel) Vertical size of each field. (Unit: 2 Line) C_M11 of Color matrix at middle color temperature. C_M12 of Color matrix at middle color temperature. C_M13 of Color matrix at middle color temperature. C_M21 of Color matrix at middle color temperature. C_M22 of Color matrix at middle color temperature. C_M23 of Color matrix at middle color temperature. C_M31 of Color matrix at middle color temperature. C_M32 of Color matrix at middle color temperature. C_M33 of Color matrix at middle color temperature. OFFSET compensation for ODD field. (Unit: 1 level at 8 bits) Note: It is sync with VSYNC. OFFSET compensation for EVEN field. (Unit: 1 level at 8 bits) Note: It is sync with VSYNC. Global GAIN control Gain = (1+GLB_GAIN/32) Note: It is sync with VSYNC. Vertical start line of each field. (Unit: 1 Line) Horizontal start pixel of each line. (Unit: 1 pixel) Horizontal stop for OBCLP. (Unit: 1 pixel) (Note: active region is not include stop pixel) CONTENTS
ODD_OFFSET[7:0]
7:0
EVEN_OFFSET[7:0]
7:0
41 (109Ah)
GLB_GAIN[4:0] Reserved
4:0 7:5
11
AI2152
ADDRESS 42 43 (10A4h) NAME Reserved AE_HB[5:0] Reserved 44 (00ECh) 45 (00EDh) 46 (00EEh) LOCK_R_GAIN LOCK_G_GAIN LOCK_B_GAIN BIT 7:0 5:0 7:6 7:0 7:0 7:0 R Gain when Push Lock G Gain when Push Lock B Gain when Push Lock High Luminance Suppress Threshold is a 2 level value. Threshold = 256 + HLS_THD[6:0] * 2. If Y Threshold, Y will be suppressed to Eclipse level. High band threshold for AE R, G, B histogram. (Unit: 4 level for 8 bits Y image data) CONTENTS
47 ( 1125h)
HLS_THD[6:0]
6:0
Reserved 48 (1126h) ECLP_LVL[7:0] Reserved AP_CTRL_EN APKNEE_EN 49 (1100h) AP_CORING_EN YHLPF_EN YGAMMA_EN Y_LCRAWL_EN AP_LPF_EN 4A (1101h) 4B (1102h) 4C (1103h) 4D 4E (1105h) 4F (1106h) 50 (1107h) LCR_LDIF_THD LCR_HIGH_THD [7:0] Reserved HBPF_SEL Reserved APKNEE_Y128 APKNEE_Y256 APKNEE_Y384
7 7:0 0 1 2 3 4 5 6 7 7:0 7:0 6:0 7 7:0 7:0 7:0 7:0 Y for APKNEE curve when X=128. Y= APKNEE_Y128 *2, Note: Y0=0. Y for APKNEE curve when X=256. Y= APKNEE_Y256 *2 Y for APKNEE curve when X=384. Y= APKNEE_Y384 *2 0: HBPF = (-1/4, 0, 1/2, 0, -1/4) 1: HBPF = (0, -1/4, 1/4, 1/4, -1/4) 1: Enable Horizontal and Vertical aperture control. 1: Enable Aperture KNEE. 1: Enable Aperture CORING. 1: Enable Y Horizontal Low-Pass filter. 1: Enable Y Gamma. 1: Enable Line Crawl. 1: Enable Aperture Low Pass Filter. Line different threshold for Line Crawl Reduction. High threshold for Line Crawl Reduction Eclipse level = ECLP_LVL * 2
12
AI2152
ADDRESS 51 (1108h) 52 (1109h) 53 (110Ah) 54 (110Bh) 55 (110Ch) 56 (110Dh) 57 (110Eh) 58 (110Fh) 59 (0082h) 5A (0083h) 5B (0084h) 5C (0085h) 5D (0086h) 5E (0087h) 5F (0088h) 60 (0089h) 61 (008Ah) 62 (008Bh) 63 (008Ch) 64 (008Dh) NAME APKNEE_Y512 APKNEE_Y640 APKNEE_Y768 APKNEE_Y896 APKNEE_Y1024 AP_CORN[5:0] Reserved AP_GAIN_P[3:0] AP_GAIN_N[3:0] Y_GAIN[4:0] Reserved GAM_Y0 GAM_Y32 GAM_Y64 GAM_Y96 GAM_Y128 GAM_Y160 GAM_Y192 GAM_Y224 GAM_Y256 GAM_Y320 GAM_Y384 GAM_Y448 BIT 7:0 7:0 7:0 7:0 7:0 5:0 7:6 3:0 7:4 4:0 7:5 7:0 7:0 7:0 7:0 7:0 7:0 7:0 7:0 7:0 7:0 7:0 7:0 Y when X=0. (BLC OFF) Y when X=32. (BLC OFF) Y when X=64. (BLC OFF) Y when X=96. (BLC OFF) Y when X=128. (BLC OFF) Y when X=160. (BLC OFF) Y when X=192. (BLC OFF) Y when X=224. (BLC OFF) Y when X=256. (BLC OFF) Y when X=320. (BLC OFF) Y when X=384. (BLC OFF) Y when X=448. (BLC OFF) Global Aperture gain for positive AP Global Aperture gain for negative AP Y GAIN control Gain= (AP_GAIN_P/4) Gain= (AP_GAIN_N/4) CONTENTS Y for APKNEE curve when X=512. Y= APKNEE_Y512 *2 Y for APKNEE curve when X=640. Y= APKNEE_Y640 *2 Y for APKNEE curve when X=768. Y= APKNEE_Y768 *2 Y for APKNEE curve when X=896. Y= APKNEE_Y896 *2 Y for APKNEE curve when X=1024. Y= APKNEE_Y1024 *2 Aperture corn control Corn = AP_CORN * 2
Gain = (1+Y_GAIN/32)
13
AI2152
ADDRESS 65 (008Eh) 66 (008Fh) 67 (0090h) 68 (0091h) 69 (0092h) 6A (0093h) 6B (0094h) 6C (0095h) 6D (0096h) NAME GAM_Y512 GAM_Y576 GAM_Y640 GAM_Y704 GAM_Y768 GAM_Y832 GAM_Y896 GAM_Y960 GAM_Y1024 CLPF_EN ITP_EN CLR_MTX_EN 6E (1128h) RGB_GAMMA_EN LINER_MTX_EN YH_SPRS_EN AP_SPRS_EN Reserved 6F 70 (00E7h) 71 (00E8h) 72 (00E9h) 73 (00EAh) 74 75 76 Reserved MT_LB_RGAIN[7:0] MT_LB_BGAIN[7:0] LT_HB_RGAIN[7:0] LT_HB_BGAIN[7:0] Reserved Reserved Reserved BIT 7:0 7:0 7:0 7:0 7:0 7:0 7:0 7:0 7:0 0 1 2 3 4 5 6 7 7:0 7:0 7:0 7:0 7:0 7:0 7:0 7:0 Middle color temp low bound R Gain Middle color temp low bound B Gain Low color temp high bound R Gain Low color temp high bound B Gain CONTENTS Y when X=512. (BLC OFF) Y when X=576. (BLC OFF) Y when X=640. (BLC OFF) Y when X=704. (BLC OFF) Y when X=768. (BLC OFF) Y when X=832. (BLC OFF) Y when X=896. (BLC OFF) Y when X=960. (BLC OFF) Y when X=1024. (BLC OFF) Color low-pass filter enable Interpolation enable Color matrix enable RGB gamma enable Liner matrix enable YH color suppress enable Aperture color suppress enable
14
AI2152
ADDRESS 77 78 (1132h) 79 (1133h) 7A 7B 7C 7D (1138h) 7E (1139h) 7F (113Ah) 80 (113Bh) 81 (113Ch) 82 (113Dh) 83 (113Eh) 84 (113Fh) 85 (1140h) 86 (1141h) 87 (1142h) 88 (1143h) 89 (1144h) 8A (1145h) 8B (1146h) 8C (1147h) NAME Reserved OFFSET_R OFFSET_B Reserved Reserved Reserved RGB_GAMMA_Y0 RGB_GAMMA_Y32 RGB_GAMMA_Y64 RGB_GAMMA_Y96 RGB_GAMMA_Y12 RGB_GAMMA_Y160 RGB_GAMMA_Y192 RGB_GAMMA_Y224 RGB_GAMMA_Y256 RGB_GAMMA_Y320 RGB_GAMMA_Y384 RGB_GAMMA_Y448 RGB_GAMMA_Y512 RGB_GAMMA_Y576 RGB_GAMMA_Y640 RGB_GAMMA_Y704 BIT 7:0 7:0 7:0 7:0 7:0 7:0 7:0 7:0 7:0 7:0 7:0 7:0 7:0 7:0 7:0 7:0 7:0 7:0 7:0 7:0 7:0 7:0 Y for RGB gamma when X=0. Y = RGB_GAMMA_Y0 *2 Y for RGB gamma when X=32. Y = RGB_GAMMA_ Y32 *2 Y for RGB gamma when X=64. Y = RGB_GAMMA_Y64 *2 Y for RGB gamma when X=96. Y = RGB_GAMMA_Y96 *2 Y for RGB gamma when X=128. Y = RGB_GAMMA_Y128 *2 Y for RGB gamma when X=160. Y = RGB_GAMMA_Y160 *2 Y for RGB gamma when X=192. Y = RGB_GAMMA_Y192 *2 Y for RGB gamma when X=224. Y = RGB_GAMMA_Y224 *2 Y for RGB gamma when X=256. Y = RGB_GAMMA_Y256 *2 Y for RGB gamma when X=320. Y = RGB_GAMMA_Y320 *2 Y for RGB gamma when X=384. Y = RGB_GAMMA_Y384 *2 Y for RGB gamma when X=448. Y = RGB_GAMMA_Y448 *2 Y for RGB gamma when X=512. Y = RGB_GAMMA_Y512 *2 Y for RGB gamma when X=576. Y = RGB_GAMMA_Y576 *2 Y for RGB gamma when X=640. Y = RGB_GAMMA_Y640 *2 Y for RGB gamma when X=704. Y = RGB_GAMMA_Y704*2 R offset for Color matrix. OFFSET_R is a signed value. B offset for Color matrix. OFFSET_B is a signed value. CONTENTS
15
AI2152
ADDRESS 8D (1148h) 8E (1149h) 8F (114Ah) 90 (114Bh) NAME RGB_GAMMA_Y768 RGB_GAMMA_Y832 RGB_GAMMA_Y896 BIT 7:0 7:0 7:0 CONTENTS Y for RGB gamma when X=768. Y = RGB_GAMMA_Y768 *2 Y for RGB gamma when X=832. Y = RGB_GAMMA_Y832 *2 Y for RGB gamma when X=896. Y = RGB_GAMMA_Y896 *2 Y for RGB gamma when X=960. Y = RGB_GAMMA_Y960 *2 Y for RGB gamma when X=1024. Y = RGB_GAMMA_Y1024 *2 +1 Note: Y1024 Y960 Y896 Y832 Y768 Y704 Y640 Y576 Y512 Y448 Y384 Y320 Y256 Y224 Y192 Y160 Y128 Y96 Y64 Y32 Y0.
RGB_GAMMA_Y960
7:0
91 (114Ch)
RGB_GAMMA_Y1024
7:0
92 (0076h) 93 (0077h) 94 (0078h) 95 (0079h) 96 (007Ah) 97 (007Bh) 98 (007Ch) 99 (007Dh) 9A (007Eh) 9B (007Fh) 9C (0080h) 9D (0081h)
L_M21_HT[7:0] L_M21_HT[9:8] Reserved L_M22_HT[7:0] L_M22_HT[9:8] Reserved L_M23_HT[7:0] L_M23_HT[9:8] Reserved L_M31_HT[7:0] L_M31_HT[9:8] Reserved L_M32_HT[7:0] L_M32_HT[9:8] Reserved L_M33_HT[7:0] L_M33_HT[9:8] Reserved
7:0 L_M21 of Liner matrix at High temperature. A signed value. 1:0 7:2 7:0 L_M22 of Liner matrix at High temperature. A signed value. 1:0 7:2 7:0 L_M23 of Liner matrix at High temperature. A signed value. 1:0 7:2 7:0 L_M31 of Liner matrix at High temperature. A signed value. 1:0 7:2 7:0 L_M32 of Liner matrix at High temperature. A signed value. 1:0 7:2 7:0 L_M33 of Liner matrix at High temperature. A signed value. 1:0 7:2
16
AI2152
ADDRESS 9E (1159h) 9F (115Ah) A0 (115Bh) A1 (115Ch) NAME LY_SPRS_STAR T LY_SPRS_SLOP E Reserved HY_SPRS_STAR T HY_SPRS_SLOP E Reserved A2 (115Dh) AP_SPRS_STAR T Reserved A3 (115Eh) AP_SPRS_ SLOPE Reserved A4 (115Fh) U_SLICE V_SLICE Y_MAX[5:0] Reserved Y_MIN[5:0] Reserved A7 (1163h) A8 (1164h) A9 (1165h) C_MAX[7:0] C_MAX[9:8] Reserved C_MIN[7:0] BIT 7:0 4:0 7:5 7:0 4:0 7:5 5:0 7:6 3:0 7:4 3:0 7:4 5:0 7:6 5:0 7:6 7:0 1:0 7:2 7:0 Minimum C for AWB report. (Unit: 4 level for 7 bits image data) UV_plane region enable select for AWB report. UV_plane[0] : 0: region 1 disable. 1: region 1 enable. UV_plane[1] : 0: region 2 disable. 1: region 2 enable. UV_plane[2] : 0: region 3 disable. 1: region 3 enable. UV_plane[3] : 0: region 4 disable. 1: region 4 enable. Maximum C for AWB report. (Unit: 16 level for 7 bits image data) Note : C_MIN ( U2 + V2 ) < C_MAX Minimum Y for AWB report. (Unit: 4 level for 8 bits image data) Slice = U_SLICE * 2 Slice = V_SLICE * 2 Maximum Y for AWB report. (Unit: 4 level for 8 bits image data) Color suppress slope for aperture. Color suppress start level for aperture. Color suppress start level for high luminance. Color suppress slope for high luminance. CONTENTS Color suppress start level for low luminance. Color suppress slope for low luminance.
A5 (1161h)
A6 (1162h)
AA (1166h)
UV_plane[3:0]
3:0
Reserved
7:4
17
AI2152
ADDRESS NAME BIT CONTENTS SIN value for IQ transform. (Format: Unsigned, Value=UV_SIN/64) Note: I = -U*SIN + V*COS, Q = U*COS + V*SIN
AB (1167h)
UV_SIN[5:0]
5:0
Reserved UV_COS[5:0] Reserved AD (1169h) AE (116Ah) AF (116Bh) B0 (116Ch) I0_MAX
7:6 5:0 7:6 7:0 {(I0_MAX, I0_MIN),(Q0_MAX,Q0_MIN)} for AWB IQ windows 0 report. (Format: signed, 1 level for 8 bits limited signed image data.) COS value for IQ transform. (Format: Unsigned, Value=UV_COS/64)
AC (1168h)
I0_MIN
7:0
Q0_MAX
7:0
Q0_MIN
7:0 Upper limit of Ysum of AWB Upper limit = H_Y_AWB_STOP * 1024 Lower limit of Ysum of AWB Lower limit = L_Y_AWB_STOP * 256 AWB is active when (Upper limit > Lower limit), otherwise stop AWB
H_Y_AWB_STOP B1 (003Bh) L_Y_AWB_STOP
3:0
7:4
B2 B3 B4 B5 B6 B7 B8 B9
Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved RS_MODE
7:0 7:0 7:0 7:0 7:0 7:0 7:0 7:0 0 1 7:2 0:GPIO, 1:RS232 mode RS232 stop bit number selection. (0 1 bits, 1 2 bits)
BA (1180h)
RS_STOP_BIT Reserved
18
AI2152
ADDRESS NAME BIT White balance mode 00: Auto 01: WB1 (3100oK) 10: WB2 (5100oK) 11: WB3 (6500oK) Mirror 0: Disable 1: Enable Back light compensation 0: Disable 1: Enable Shutter speed select 0000: 1/60s (1/50s) 0001: 1/120s (1/100s) 0010: 1/250s 0011: 1/500s 0100: 1/1000s 0101: 1/2000s 0110: 1/5000s 0111: 1/10000s 1000: 1/20000s 1001: 1/50000s 1010: 1/100000s 1011: Auto 1100: Auto 1101: Auto 1110: Auto 1111: Auto CONTENTS
WB_MODE[1:0]
1:0
MIR
2
BLC
3
BB (0000h)
SHUTTER_MODE[4:0]
7:4
MCRDIP FLKLESS AGC_OFF INIT_SHUTTER_FLAG BC (0001h)
0 1 2 3
1: Enable microcontroller DIP switch scan 1: Enable flickless AGC control, 0:ON, 1:OFF Initial shutter speed at power on, 0: Min shutter speed, 1: Max shutter speed Speed of AE control operation 000: Per 1 frames 001: Per 2 frames 010: Per 4 frames 011: Per 8 frames 100: Per 12 frames Stop AE_Control
AE_SPEED[2:0]
6:4
AE_STOP BD (0002h) BE (0003h) YSUM_TGT[15:8]
7 7:0
Target Y value when auto exposure (BLC OFF) YSUM_TGT[7:0] 7:0
19
AI2152
ADDRESS BF (0004h) C0 (0005h) NAME BLC_YSUM_TGT[15: 8] BLC_YSUM_TGT[7:0] AE_STEP_SIZE[4:0] BIT 7:0 Target Y value when auto exposure (BLC ON) 7:0 4:0 AE step size (12~31) Ai4100 0: Normal ADCK Operation 1: ADCK clock inversion AD9943 0: ADCK active low 1: ADCK active high Monitor selection (Only for Ai4100) 00: Monitor OFF 01: CDS signal to monitor 10: PGA output monitor 11: Output REFIN and CCDIN (for calibration) Maximum shutter speed (When SHUTTER_MODE = Auto) Select minimum shutter speed, 0: 1/60(1/50) 1: 1/120(1/100) AFE CDS gain select, 00:0dB, 01:6dB, 10:12dB, 11:-2dB (Only for Ai4100) 0 : Ai4100 , 1 : AD9943 Stable range at auto exposure Oscillation range at auto exposure Max AFE analog gain when AGC Gain value when AGC off AFE offset value when fixed Ai4100 : 0 ~127 AD9943 : 0 ~ 255 R gain for AWB1(3100 K) adjustment. GAIN=(R_GAIN/64) G gain for AWB1(3100 K) adjustment. GAIN=(G_GAIN/64) B gain for AWB1(3100 K) adjustment. GAIN=(B_GAIN/64) CONTENTS
ADCK_INV C1 (0006h)
5
MON_SEL[1:0]
7:6
MAX_SH[3:0]
3:0
C2 (0007h)
MIN_SH_SEL
4
AFE_CDS_GAIN[1:0] AFE_SEL C3 (0008h) C4 (0009h) C5 (000Ah) C7 (000Ch) C8 (000Dh) C9 (000Eh) CA (000Fh) CB (0010h) AE_STA_RANGE[7:0] AE_OSC_RANGE[7:0 ] MAX_AFE_GAIN[7:0] FIX_GAIN[7:0]
6:5 7 7:0 7:0 7:0 7:0
AFE_OFFSET[7:0]
7:0
AWB1_R_GAIN [7:0]
7:0
AWB1_G_GAIN [7:0]
7:0
AWB1_B_GAIN [7:0]
7:0
20
AI2152
ADDRESS CC (0011h) CD (0012h) CE (0013h) CF (0014h) D0 (0015h) D1 (0016h) D2 (0017h) D3 (0018h) D4 (0019h) NAME AWB2_R_GAIN [7:0] BIT 7:0 CONTENTS R gain for AWB2(5100 K) adjustment. GAIN=(R_GAIN/64) G gain for AWB2(5100 K) adjustment. GAIN=(G_GAIN/64) B gain for AWB2(5100 K) adjustment. GAIN=(B_GAIN/64) R gain for AWB3(6500 K) adjustment. GAIN=(R_GAIN/64) G gain for AWB3(6500 K) adjustment. GAIN=(G_GAIN/64) B gain for AWB3(6500 K) adjustment. GAIN=(B_GAIN/64) Start point of low luminance color suppression (AGC gain). End point of low luminance color suppression (AGC gain) Start point of edge signal suppression curve (AGC gain) Slope of edge signal suppression curve (AGC gain)
AWB2_G_GAIN [7:0]
7:0
AWB2_B_GAIN [7:0]
7:0
AWB3_R_GAIN [7:0]
7:0
AWB3_G_GAIN [7:0]
7:0
AWB3_B_GAIN [7:0]
7:0
COL_S [7:0]
7:0
COL_E [7:0] APT_S [7:0] APT_H [5:0]
7:0 7:0 5:0 6 7 4:0
D5 (001Ah)
Reserved PBLKLVL AP_HGA [4:0]
0: Blank out to zero 1: Blank to ob-clamp level (Only for AD9943) Initial value of APT_HGA (gain of horizontal edge signal) Speed of AWB Control 00: per 1 frame 01: per 2 frame 10: per 4 frame 11: per 8 frame 0: Unlock 1: Locked
D6 (001Bh)
AWB_SPEED[1:0]
6:5
AWB_LOCK D7 (001Ch) D8 (001Dh) D9 (001Eh) DA (001Fh) AP_VGA [4:0] AWB_STEPSIZE[2:0] W0 [3:0] BLC_W0 [3:0] W1 [3:0] BLC_W1 [3:0] W2 [3:0] BLC_W2 [3:0]
7 4:0 7:5 3:0 7:4 3:0 7:4 3:0 7:4
Initial value of APT_VGA (gain of vertical edge signal) AWB Step Size Y Sum weight at window 0 when BLC Off Y Sum weight at window 0 when BLC On Y Sum weight at window 1 when BLC Off Y Sum weight at window 1 when BLC On Y Sum weight at window 2 when BLC Off Y Sum weight at window 2 when BLC On
21
AI2152
ADDRESS DA (001Fh) NAME W2 [3:0] BLC_W2 [3:0] W3 [3:0] BLC_W3 [3:0] W4 [3:0] BLC_W4 [3:0] W5 [3:0] BLC_W5 [3:0] W6 [3:0] BLC_W6 [3:0] W7 [3:0] BLC_W7 [3:0] W8 [3:0] BLC_W8 [3:0] W9 [3:0] BLC_W9 [3:0] W10 [3:0] BLC_W10 [3:0] YSUM_W22 [3:0] YSUM_W23 [3:0] YSUM_W24 [3:0] BLC_YSUM_W0 [3:0] BLC_YSUM_W1 [3:0] BLC_YSUM_W2 [3:0] W14 [3:0] BLC_W14 [3:0] W15 [3:0] BLC_W15 [3:0] W16 [3:0] BLC_W16 [3:0] BIT 3:0 7:4 3:0 7:4 3:0 7:4 3:0 7:4 3:0 7:4 3:0 7:4 3:0 7:4 3:0 7:4 3:0 7:4 3:0 7:4 3:0 7:4 3:0 7:4 3:0 7:4 3:0 7:4 3:0 7:4 CONTENTS Y Sum weight at window 2 when BLC Off Y Sum weight at window 2 when BLC On Y Sum weight at window 3 when BLC Off Y Sum weight at window 3 when BLC On Y Sum weight at window 4 when BLC Off Y Sum weight at window 4 when BLC On Y Sum weight at window 5 when BLC Off Y Sum weight at window 5 when BLC On Y Sum weight at window 6 when BLC Off Y Sum weight at window 6 when BLC On Y Sum weight at window 7 when BLC Off Y Sum weight at window 7 when BLC On Y Sum weight at window 8 when BLC Off Y Sum weight at window 8 when BLC On Y Sum weight at window 9 when BLC Off Y Sum weight at window 9 when BLC On Y Sum weight at window 10 when BLC Off Y Sum weight at window 10 when BLC On Y Sum weight at window 11 when BLC Off Y Sum weight at window 11 when BLC On Y Sum weight at window 12 when BLC Off Y Sum weight at window 12 when BLC On Y Sum weight at window 13 when BLC Off Y Sum weight at window 13 when BLC On Y Sum weight at window 14 when BLC Off Y Sum weight at window 14 when BLC On Y Sum weight at window 15 when BLC Off Y Sum weight at window 15 when BLC On Y Sum weight at window 16 when BLC Off Y Sum weight at window 16 when BLC On
DB (0020h) DC (0021h)
DD (0022h) DE (0023h)
DF (0024h) E0 (0025h)
E1 (0026h) E2 (0027h)
E3 (0028h) E4 (0029h) E5 (002Ah) E6 (002Bh) E7 (002Ch) E8 (002Dh)
22
AI2152
ADDRESS E9 (002Eh) NAME W17 [3:0] BLC_W17 [3:0] W18 [3:0] BLC_W18 [3:0] W19 [3:0] BLC_W19 [3:0] W20 [3:0] BLC_W20 [3:0] W21 [3:0] BLC_W21 [3:0] W22 [3:0] BLC_W22 [3:0] W23 [3:0] BLC_W23 [3:0] W24 [3:0] BLC_YSUM_W24 [3:0] BY_ORITNT [7:0] RY_ORITNT [7:0] BIT 3:0 7:4 3:0 7:4 3:0 7:4 3:0 7:4 3:0 7:4 3:0 7:4 3:0 7:4 3:0 7:4 7:0 7:0 CONTENTS Y Sum weight at window 17 when BLC Off Y Sum weight at window 17 when BLC On Y Sum weight at window 18 when BLC Off Y Sum weight at window 18 when BLC On Y Sum weight at window 19 when BLC Off Y Sum weight at window 19 when BLC On Y Sum weight at window 20 when BLC Off Y Sum weight at window 20 when BLC On Y Sum weight at window 21 when BLC Off Y Sum weight at window 21 when BLC On Y Sum weight at window 22 when BLC Off Y Sum weight at window 22 when BLC On Y Sum weight at window 23 when BLC Off Y Sum weight at window 23 when BLC On Y Sum weight at window 24 when BLC Off Y Sum weight at window 24 when BLC On U direct shift value of orientation on UV plane V direct shift value of orientation on UV plane Min suppress gain of low luminance color suppression (AGC gain)
EA (002Fh)
EB (0030h)
EC (0031h)
ED (0032h)
EE (0033h)
EF (0034h)
F0 (0035h) F1 (0036h) F2 (0037h)
COL_M [4:0] F3 (0038h) Reserved
4:0 5
LOCK_STATE
7:6
AWB Lock state 01: High color temp 10: Middle color temp 11: Low color temp Pre-R gain for AWB Pre-B gain for AWB RS232 transition rate. (Speed=115200/RS_RATE bps)
F4 (0039h) F5 (003Ah) F6 (1181h)
PRE_R_GAIN [7:0] PRE_B_GAIN [7:0] RS_RATE [4:0] Reserved
7:0 7:0 4:0 7:5
23
AI2152
ADDRESS F7 (0101h) F8 (0102h) F9 (003Dh) NAME Y_MIN_CNT[15;8] PRINT_FLAG [7:0] LL_STEP_SIZE [7:0] BIT 7:0 Minimum Y count 7:0 7:0 Step size of line-lock comp Maximum Line-Lock frequency 1/60 (1/50) - (LL_FREQ_MAX * 2048 Tsys_clk) Minimum Line-Lock frequency 1/60 (1/50) + (LL_FREQ_MIN * 2048 Tsys_clk) High Light suppression mode. (switch data at AE,Y) 0: Disable 1: AE switch on. 2: Y switch on. 3: AE, Y switch on. (Active while MCRDIP = 1 or HLI_EN = `H' ) 000: 2500oK~9500oK 001: 3100oK~5100oK 010: 3100oK~6500oK 011: 2800oK~4700oK 100: 2500oK~15000oK CONTENTS
LL_FREQ_MAX [3:0] FA (003Eh) LL_FREQ_MIN [3:0]
3:0
7:4
HLS_MODE [1:0]
1:0
FB (003Fh) AWB_RANGE 4:2
Reserved FC~FF 100 (0040h) 101 (0041h) 102 (0042h) 103 (0043h) 104 (0044h) 105 (0045h) 106 (0046h) 107 (0047h) 108 (0048h) Reserved C_M11_LT[7:0] C_M12_LT[7:0] C_M13_LT[7:0] C_M21_LT[7:0] C_M22_LT[7:0] C_M23_LT[7:0] C_M31_LT[7:0] C_M32_LT[7:0] C_M33_LT[7:0]
7:5 7:0 7:0 7:0 7:0 7:0 7:0 7:0 7:0 7:0 7:0 C_M11 of color matrix at low color temperature. C_M12 of color matrix at low color temperature. C_M13 of color matrix at low color temperature. C_M21 of color matrix at low color temperature. C_M22 of color matrix at low color temperature. C_M23 of color matrix at low color temperature. C_M31 of color matrix at low color temperature. C_M32 of color matrix at low color temperature. C_M33 of color matrix at low color temperature.
24
AI2152
ADDRESS 109 (0049h) 10A (004Ah) 10B (004Bh) 10C (004Ch) 10D (004Dh) 10E (004Eh) 10F (004Fh) 110 (0050h) 111 (0051h) 112 (0052h) 113 (0053h) 114 (0054h) 115 (0055h) 116 (0056h) 117 (0057h) 118 (0058h) 119 (0059h) 11A (005Ah) 11B (005Bh) NAME C_M11_LT[7:0] C_M12_LT[7:0] C_M13_LT[7:0] C_M21_HT[7:0] C_M22_HT[7:0] C_M23_HT[7:0] C_M31_HT[7:0] C_M32_HT[7:0] C_M33_HT[7:0] L_M21_LT[7:0] L_M21_LT[9:8] Reserved L_M22_LT[7:0] L_M22_LT[7:0] Reserved L_M23_LT[7:0] L_M23_LT[9:8] Reserved L_M31_LT[7:0] L_M31_LT[9:8] Reserved L_M32_LT[7:0] L_M32_LT[9:8] Reserved 7:0 L_M23 of Liner matrix at Low temperature. A signed value. 1:0 7:2 7:0 L_M31 of Liner matrix at Low temperature. A signed value. 1:0 7:2 7:0 L_M32 of Liner matrix at Low temperature. A signed value. 1:0 7:2 BIT 7:0 7:0 7:0 7:0 7:0 7:0 7:0 7:0 7:0 7:0 L_M21 of Liner matrix at Low temperature. A signed value. 1:0 7:2 7:0 L_M22 of Liner matrix at Low temperature. A signed value. 7:0 CONTENTS C_M11 of color matrix at high color temperature. C_M12 of color matrix at high color temperature. C_M13 of color matrix at high color temperature. C_M21 of Color Matrix at high color temperature. C_M22 of Color Matrix at high color temperature. C_M23 of Color Matrix at high color temperature. C_M31 of Color Matrix at high color temperature. C_M32 of Color Matrix at high color temperature. C_M33 of Color Matrix at high color temperature.
25
AI2152
ADDRESS 11C (005Ch) 11D (005Dh) 11E (005Eh) 11F (005Fh) 120 (0060h) 121 (0061h) 122 (0062h) 123 (0063h) 124 (0064h) 125 (0065h) 126 (0066h) 127 (0067h) 128 (0068h) 129 (0069h) 12A (006Ah) 12B (006Bh) 12C (006Ch) 12D (006Dh) 12E (006Eh) 12F (006Fh) NAME L_M33_LT[7:0] L_M33_LT[9:8] Reserved AWBRAG1_RMA[7:0] AWBRAG1_RMI[7:0] AWBRAG1_BMA[7:0] AWBRAG1_BMI[7:0] AWBRAG2_RMA[7:0] AWBRAG2_RMI[7:0] AWBRAG2_BMA[7:0] AWBRAG2_BMI[7:0] AWBRAG3_RMA[7:0] AWBRAG3_RMI[7:0] AWBRAG3_BMA[7:0] AWBRAG3_BMI[7:0] AWBRAG4_RMA[7:0] AWBRAG4_RMI[7:0] AWBRAG4_BMA[7:0] AWBRAG4_BMI[7:0] AWBRAG5_RMA[7:0] AWBRAG5_RMI[7:0] BIT 7:0 L_M33 of Liner matrix at Low temperature. A signed value. 1:0 7:2 7:0 7:0 7:0 7:0 7:0 7:0 7:0 7:0 7:0 7:0 7:0 7:0 7:0 7:0 7:0 7:0 7:0 7:0 Max R Gain for AWB Range 1 Max R Gain for AWB Range 1 Max B Gain for AWB Range 1 Max B Gain for AWB Range 1 Max R Gain for AWB Range 2 Max R Gain for AWB Range 2 Max B Gain for AWB Range 2 Max B Gain for AWB Range 2 Max R Gain for AWB Range 3 Min R Gain for AWB Range 3 Max B Gain for AWB Range 3 Min B Gain for AWB Range 3 Max R Gain for AWB Range 4 Max R Gain for AWB Range 4 Max B Gain for AWB Range 4 Max B Gain for AWB Range 4 Max R Gain for AWB Range 5 Max R Gain for AWB Range 5 CONTENTS
26
AI2152
ADDRESS 130 (0070h) 131 (0071h) 132 (0072h) 133 (0073h) 134 (0074h) 135 (0075h) 136 (0097h) 137 (0098h) 138 (0099h) 139 (009Ah) 13A (009Bh) 13B (009Ch) 13C (009Dh) 13D (009Eh) 13E(009Fh) 13F (00A0) 140 (00A1h) 141 (00A2h) 142 (00A3h) 143 (00A4h) 144 (00A5h) NAME AWBRAG5_BMA[7:0] AWBRAG5_BMI[7:0] HT_LB_RGAIN[7:0] HT_LB_BGAIN[7:0] MT_LB_RGAIN[7:0] MT_LB_BGAIN[7:0] BLC_GAM_Y0 BLC_GAM_Y32 BLC_GAM_Y64 BLC_GAM_Y96 BLC_GAM_Y128 BLC_GAM_Y160 BLC_GAM_Y192 BLC_GAM_Y224 BLC_GAM_Y256 BLC_GAM_Y320 BLC_GAM_Y384 BLC_GAM_Y448 BLC_GAM_Y512 BLC_GAM_Y576 BLC_GAM_Y640 BIT 7:0 7:0 7:0 7:0 7:0 7:0 7:0 7:0 7:0 7:0 7:0 7:0 7:0 7:0 7:0 7:0 7:0 7:0 7:0 7:0 7:0 CONTENTS Max B Gain for AWB Range 5 Max B Gain for AWB Range 5 High color temp low bound R Gain High color temp low bound B Gain Middle color temp high bound R Gain Middle color temp high bound B Gain Y when X=0. (BLC ON) Y when X=32. (BLC ON) Y when X=64. (BLC ON) Y when X=96. (BLC ON) Y when X=128. (BLC ON) Y when X=160. (BLC ON) Y when X=192. (BLC ON) Y when X=224. (BLC ON) Y when X=256. (BLC ON) Y when X=320. (BLC ON) Y when X=384. (BLC ON) Y when X=448. (BLC ON) Y when X=512. (BLC ON) Y when X=576. (BLC ON) Y when X=640. (BLC ON)
27
AI2152
ADDRESS 145 (00A6h) 146 (00A7h) 147 (00A8h) 148 (00A9h) 149 (00AAh) 14A (00ABh) 14B (00ACh) NAME BLC_GAM_Y704 BIT 7:0 CONTENTS Y when X=704. (BLC ON)
BLC_GAM_Y768
7:0
Y when X=768. (BLC ON).
BLC_GAM_Y832
7:0
Y when X=832. (BLC ON)
BLC_GAM_Y896
7:0
Y when X=896. (BLC ON)
BLC_GAM_Y960
7:0
Y when X=960. (BLC ON)
BLC_GAM_Y1024
7:0
Y when X=1024. (BLC ON)
G0_ADR_1[7:0] G0_ADR_1[8]
7:0 GPIO0 Mapping Address 1, If Address = 0x00 -> Disable 0 3:1 4 7:5 7:0 GPIO0 Mapping Address 2, If Address = 0x00 -> Disable 0 3:1 7:4 7:0 GPIO1 Mapping Address 1, If Address = 0x00 -> Disable 0 3:1 7:4 7:0 GPIO1 Mapping Address 2, If Address = 0x00 -> Disable 0 3:1 7:4 GPIO1 Mapping Start Bit 2 (0~7) GPIO1 Mapping Bit Num 2 (1~8) GPIO1 Mapping Start Bit 1 (0~7) GPIO0 Mapping Start Bit 2 (0~7) GPIO0 Mapping Bit Num 2 (1~8) Gap between each color temp GPIO0 Mapping Start Bit 1 (0~7)
14C (00ADh)
G0_STABIT_1[2:0] Reserved AWB_GAP
14D (00AEh)
G0_ADR_2[7:0] G0_ADR_2[8]
14E (00AFh)
G0_STABIT_2[2:0] G0_BITNUM_2[3:0]
14F (00B0h)
G0_ADR_1[7:0] G0_ADR_1[8]
150 (00B1h)
G0_STABIT_1[2:0] Reserved
151 (00B2h)
G1_ADR_2[7:0] G1_ADR_2[8]
152 (00B3h)
G1_STABIT_2[2:0] G1_BITNUM_2[3:0]
28
AI2152
ADDRESS 153 (00B4h) NAME G2_ADR_1[7:0] G2_ADR_1[8] 154 (00B5h) G2_STABIT_1[2:0] Reserved 155 (00B6h) G2_ADR_2[7:0] G2_ADR_2[8] 156 (00B7h) G2_STABIT_2[2:0] G2_BITNUM_2[3:0] 157 (00B8h) G3_ADR_1[7:0] G3_ADR_1[8] 158 (00B9h) G3_STABIT_1[2:0] Reserved 159 (00BAh) G3_ADR_2[7:0] G3_ADR_2[8] 15A (00BBh) G3_STABIT_2[2:0] G3_BITNUM_2[3:0] 15B (00BCh) G4_ADR_1[7:0] G4_ADR_1[8] 15C (00BDh) G4_STABIT_1[2:0] Reserved 15D (00BEh) G4_ADR_2[7:0] G4_ADR_2[8] 15E (00BFh) G4_STABIT_2[2:0] G4_BITNUM_2[3:0] 15F (00C0h) G5_ADR_1[7:0] G5_ADR_1[8] 160 (00C1h) G5_STABIT_1[2:0] Reserved BIT 7:0 GPIO2 Mapping Address 1, If Address = 0x00 -> Disable 0 3:1 7:4 7:0 GPIO2 Mapping Address 2, If Address = 0x00 -> Disable 0 3:1 7:4 7:0 GPIO3 Mapping Address 1, If Address = 0x00 -> Disable 0 3:1 7:4 7:0 GPIO3 Mapping Address 2, If Address = 0x00 -> Disable 0 3:1 7:4 7:0 GPIO4 Mapping Address 1, If Address = 0x00 -> Disable 0 3:1 7:4 7:0 GPIO4 Mapping Address 2, If Address = 0x00 -> Disable 0 3:1 7:4 7:0 GPIO5 Mapping Address 1, If Address = 0x00 -> Disable 0 3:1 7:4 GPIO5 Mapping Start Bit 1 (0~7) GPIO4 Mapping Start Bit 1 (0~7) GPIO4 Mapping Bit Num 2 (1~8) GPIO4 Mapping Start Bit 2 (0~7) GPIO3 Mapping Start Bit 2 (0~7) GPIO3 Mapping Bit Num 2 (1~8) GPIO3 Mapping Start Bit 1 (0~7) GPIO2 Mapping Start Bit 2 (0~7) GPIO2 Mapping Bit Num 2 (1~8) GPIO2 Mapping Start Bit 1 (0~7) CONTENTS
29
AI2152
ADDRESS 161 (00C2h) NAME G5_ADR_2[7:0] G5_ADR_2[8] 162 (00C3h) G5_STABIT_2[2:0] G5_BITNUM_2[3:0] 163 (00C4h) G6_ADR_1[7:0] G6_ADR_1[8] 164 (00C5h) G6_STABIT_1[2:0] Reserved 165 (00C6h) G6_ADR_2[7:0] G6_ADR_2[8] 166 (00C7h) G6_STABIT_2[2:0] G6_BITNUM_2[3:0] 167 (00C8h) G7_ADR_1[7:0] G7_ADR_1[8] 168 (00C9h) G7_STABIT_1[2:0] Reserved 169 (00CAh) G7_ADR_2[7:0] G7_ADR_2[8] 16A (00CBh) G7_STABIT_2[2:0] G7_BITNUM_2[3:0] 16B (00CCh) 16C (00CDh) 16D (00CEh) 16E (00CFh) 16F (00D0h) 170 (00D1h) G0_L_DATA G0_H_DATA G1_L_DATA G1_H_DATA G2_L_DATA G2_H_DATA BIT 7:0 GPIO5 Mapping Address 2, If Address = 0x00 -> Disable 0 3:1 7:4 7:0 GPIO6 Mapping Address 1, If Address = 0x00 -> Disable 0 3:1 7:4 7:0 GPIO6 Mapping Address 2, If Address = 0x00 -> Disable 0 3:1 7:4 7:0 GPIO7 Mapping Address 1, If Address = 0x00 -> Disable 0 3:1 7:4 7:0 GPIO7 Mapping Address 2, If Address = 0x00 -> Disable 0 3:1 7:4 7:0 7:0 7:0 7:0 7:0 7:0 GPIO7 Mapping Start Bit 2 (0~7) GPIO7 Mapping Bit Num 2 (1~8) DATA Setting when GPIO 0 = L DATA Setting when GPIO 0 = H DATA Setting when GPIO 1 = L DATA Setting when GPIO 1 = H DATA Setting when GPIO 2 = L DATA Setting when GPIO 2 = H GPIO7 Mapping Start Bit 1 (0~7) GPIO6 Mapping Start Bit 2 (0~7) GPIO6 Mapping Bit Num 2 (1~8) GPIO6 Mapping Start Bit 1 (0~7) GPIO5 Mapping Start Bit 2 (0~7) GPIO5 Mapping Bit Num 2 (1~8) CONTENTS
30
AI2152
ADDRESS 170 (00D1h) 171 (00D2h) 172 (00D3h) 173 (00D4h) 174 (00D5h) 175 (00D6h) 176 (00D7h) 177 (00D8h) 178 (00D9h) 179 (00DAh) 17A (00DBh) 17B~1A1 1A2~3FF NAME G2_H_DATA G3_L_DATA G3_H_DATA G4_L_DATA G4_H_DATA G5_L_DATA G5_H_DATA G6_L_DATA G6_H_DATA G7_L_DATA G7_H_DATA Reserved Defect compensation For defect compensation use BIT 7:0 7:0 7:0 7:0 7:0 7:0 7:0 7:0 7:0 7:0 7:0 CONTENTS DATA Setting when GPIO 2 = H DATA Setting when GPIO 3 = L DATA Setting when GPIO 3 = H DATA Setting when GPIO 4 = L DATA Setting when GPIO 4 = H DATA Setting when GPIO 5 = L DATA Setting when GPIO 5 = H DATA Setting when GPIO 6 = L DATA Setting when GPIO 6 = H DATA Setting when GPIO 7 = L DATA Setting when GPIO 7 = H
31
AI2152
ABSOLUTE MAXIMUM RATINGS
Characteristics Power Supply Input Voltage Output Voltage Storage Temperature Symbol VCC VCC55 VIN VOUT TSTG Value -0.3 to +4.3 -0.3 to +5.5 -0.3 to VCC + 0.3 -0.3 to VCC + 0.3 -55 ~ +150 C V Unit
RECOMMEND OPERATING CONDITIONS
Characteristics Power Supply Input Voltage Operation Temperature Symbol VCC VCC55 VIN TOP MIN. 3 3 0 -20 +25 TYP. 3.3 MAX 3.6 5.25 VCC +70 C V Unit
DC ELECTRICAL CHARACTERISTICS
(Under Recommended Operating condition and VCC = 3.0 ~ 3.6V)
Characteristics Input low voltage Input high voltage Output low voltage Output high voltage Input pull-up/down resistance Power supply current of AVDD Power supply current of DVDD Power supply current of H1, H2, RG output Output current Output current Symbol VIL VIH VOL VOH RI ICCA ICCD ICC-CCD IOUT1 IOUT2 PSB04RTC PDO08 65 4 4 8 CONDITIONS LV-TTL LV-TTL IOL= 4, 8 mA IOH= 4, 8 mA VIL = 0 V or VIH = VCC 2.4 70 37 72 32 mA K 2 V 0.4 MIN. TYP. MAX. 0.8 Unit
32
AI2152
PACKAGE DIMENSION
UQFP80 (10mm X 10mm) (Units : mm) 12.0 10.0 7.6 #60 0.2 0.1 0.1 #41
#61
#40
0.2 12.0
10.0
0.1
0.15 #80 #21 1.2 #1 1.2 #20 4 0.4 0.08
+0.05 0.17 - 0.04 +6 -4
+0.05 0.145 - 0.03
1.6 MAX
0.05
1.4
0.1
0.05
S
0.08
M
33
0.5
1.0
0.2

▲Up To Search▲

Price & Availability of AI2152

	To Download AI2152 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .