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HAF1010RJ
Silicon P Channel MOS FET Series Power Switching
REJ03G0573-0100 Rev.1.00 Mar.03.2005
Description
This FET has the over temperature shut-down capability sensing to the junction temperature. This FET has the built-in over temperature shut-down circuit in the gate area. And this circuit operation to shut-down the gate voltage in case of high junction temperature like applying over power consumption, over current etc..
Features
* * * * * Logic level operation to (-4 to -6 V Gate drive) Built-in the over temperature shut-down circuit High endurance capability against to the shut-down circuit Latch type shut down operation (need 0 voltage recovery) High density mounting
Outline
PRSP0008DD-A (Package name: SOP-8)
5 D
6 D
7 D
8 D
4 G
Gate resistor Latch Circuit Gate Shut-down Circuit
8
5 76
Temperature Sensing Circuit
3 12
4
1, 2, 3 Source 4 Gate 5, 6, 7, 8 Drain
S 1
S 2
S 3
Absolute Maximum Ratings
(Ta = 25C)
Item Symbol Ratings Drain to source voltage VDSS -60 Gate to source voltage VGSS -16 Gate to source voltage VGSS 2.5 Drain current ID -5 Drain peak current ID (pulse) Note1 -10 Body-drain diode reverse drain current IDR -5 Note2 Cannel dissipation Pch 2.5 Cannel temperature Tch 150 Storage temperature Tstg -55 to +150 Notes: 1. PW 10 s, duty cycle 1% 2. When using the glass epoxy board (FR4 40 x 40 x 1.6 mm), PW 10s Unit V V V A A A W C C
Rev.1.00,
Mar.03.2005,
page 1 of 6
HAF1010RJ
Typical Operation Characteristics
(Ta = 25C)
Item Input voltage Input current (Gate non shut down) Input current (Gate shut down) Shut down temperature Gate operation voltage Symbol VIH VIL IIH1 IIH2 IIL IIH(sd)1 IIH(sd)2 Tsd Vop Min -3.5 -- -- -- -- -- -- -- -3.5 Typ -- -- -- -- -- -0.8 -0.35 175 -- Max -- -1.2 -100 -50 -1 -- -- -- -12 Unit V V A A A mA mA C V Test Conditions
Vi = -8V, VDS =0 Vi = -3.5V, VDS =0 Vi = -1.2V, VDS =0 Vi = -8V, VDS =0 Vi = -3.5V, VDS =0 Cannel temperature
Electrical Characteristics
(Ta = 25C)
Item Drain current Drain current Drain to source breakdown voltage Gate to source breakdown voltage Gate to source breakdown voltage Gate to source leak current Symbol ID1 ID2 V(BR)DSS V(BR)GSS V(BR)GSS IGSS1 IGSS2 IGSS3 IGSS4 IGS(OP)1 IGS(OP)2 IDSS VGS(off) |yfs| RDS(on) RDS(on) Coss td(on) tr td(off) tf VDF trr tos1 tos2 Min -1.5 -- -60 -16 2.5 -- -- -- -- -- -- -- -1.1 2 -- -- -- -- -- -- -- -- -- -- -- Typ -- -- -- -- -- -- -- -- -- -0.8 -0.35 -- -- 4 200 140 326 2 7.6 3.2 3.2 -0.9 77 4.4 2 Max -- -10 -- -- -- -100 -50 -1 100 -- -- -10 -2.25 -- 340 200 -- -- -- -- -- -- Unit A mA V V V A A A A mA mA A V S m m pF s s s s V ns ms ms Test Conditions VGS = -3.5 V, VDS = -2 V VGS = -1.2 V, VDS = -2 V ID = -10 mA, VGS = 0 IG = -800 A, VDS = 0 IG = 100 A, VDS = 0 VGS = -8 V, VDS = 0 VGS = -3.5 V, VDS = 0 VGS = -1.2 V, VDS = 0 VGS = 2.4 V, VDS = 0 VGS = -8 V, VDS = 0 VGS = -3.5 V, VDS = 0 VDS = -60 V, VGS = 0 VDS = -10 V, ID = -1 mA ID =-2.5 A, VDS =-10 Vnote3 ID = -2.5 A, VGS = -4 Vnote3 ID = -2.5 A, VGS = -10 Vnote3 VDS = -10 V, VGS = 0, f = 1 MHz VGS = -5 V, ID= -2.5 A, RL = 12
Input current (shut down) Zero gate voltage drain current Gate to source cut off voltage Forward transfer admittance Static drain to source on state resistance Output capacitance Turn-on delay time Rise time Turn off delay time Fall time Body-drain diode forward voltage Body-drain diode reverse recovery time Over lord shut down note4 operation time
IF = -5 A, VGS = 0 IF = -5 A, VGS = 0 diF/dt = 50 A/s VGS = -5 V, VDD = -16 V VGS = -5 V, VDD = -24 V
Notes: 3. Pulse test 4. Including the junction temperature rise of the lorded condition
Rev.1.00,
Mar.03.2005,
page 2 of 6
HAF1010RJ
Main Characteristics
Power vs. Temperature Derating 4
Channel Dissipation Pch (W)
Maximum Safe Operation Area -100 -30
(A)
Test condition. When using the glass epoxy board. 3 (FR4 40 x 40 x 1.6 mm), (PW 10s)
Ta = 25C
Thermal shut down 10 operation area 0
s
-10 -3 -1 -0.3
DC
Drain Current ID
2
PW
1m
s
=1
0m
s
Op
1
er
ati
Operation -0.01 in this area is limited by RDS(on)
on
(P W No 1 te 0s 5 )
0
50
100
150
200
-0.03
-0.3 -0.5 -1 -2 -5 -10 -20 -50 -100
Case Temperature Tc (C)
Drain Source Voltage VDS (V) Note 5: When using the glass epoxy board. ( FR4 40 x 40 x 1.6 mm)
-10
Typical Output Characteristics -10 V -8 V -6 V -5
Typical Transfer Characteristics V DS = -10 V -25C Pulse Test 25C Tc = 75C
Drain Current ID (A)
-4 V -6 VGS = -3.5 V -4
Drain Current ID (A)
-8
-4
-3
-2 Tc = 75C -1 25C -25C 0 -1 -2 -3 -4 -5 Gate to Source Voltage VGS (V) Static Drain to Source State Resistance vs. Drain Current
-2 Pulse Test 0 -2 -4 -6 -8 -10 Drain to Source Voltage VDS (V) Drain to Saturation Voltage vs. Gate to Source Voltage
Drain to Source Saturation Voltage VDS(on) (V)
RDS(on) (m)
-2.0 -1.6
1000 Pulse Test 500 V GS = -4 V 200 100 50 20 10
-0.1 -0.2 -0.5 -1 -2 -5 -10
Pulse Test
Drain Source On Sate Resistance
-1.2 I D = -5 A -2.5 A -1 A 0 -2 -4 -6 -8 -10 Gate to Source Voltage VGS (V)
-10 V
-0.8
-0.4
Drain Current ID (A)
Rev.1.00,
Mar.03.2005,
page 3 of 6
HAF1010RJ
Drain to Source On State Resistance vs. Temperature
RDS(on) (m)
Forward Transfer Admittance |yfs| (S)
500 Pulse Test 400 300 VGS = -4 V 200 -5 A -2.5 A 100 0 -25 -1 A VGS = -10 V 0 25 50 75 100 125 ID = -5 A -2.5 A -1 A
10
Forward Transfer Admittance vs. Drain Current Tc = -25C
Drain Source On State Resistance
VDS = -10 V 5 Pulse Test 2 1 0.5 75C 0.2 0.1 0.05 0.02 0.01 -0.01 -0.1
25C
-1
-10
Case Temperature Tc (C)
Drain Current ID (A)
Body to Drain Diode Reverse Recovery Time 1000
Reverse Recovery Time trr (ns)
Switching Characteristics 100 50
Switching Time t (s)
500 200 100 50 di / dt = 50 A / s VGS = 0, Ta = 25C
-0.5 -1 -2 -5 -10
20 t 10 d(off) 5 2 1 0.5 0.2 0.1
-0.1 -0.2
tr tf td(on)
20 10
-0.1 -0.2
VGS = -10 V, VDD = -30 V PW = 300 s, duty < 1 %
-0.5 -1 -2 -5 -10
Reverse Drain Current
IDR (A)
Drain Current
ID (A)
Reverse Drain Current vs. Source to Drain Voltage -5 Pulse Test
Reverse Drain Current IDR (A)
Typical capacitance vs. Drain to Source Voltage 10000 VGS = 0 f = 1 MHz
Capacitance C (pF)
-4
-10 V
-3
1000
-2
-5 V
VGS = 0 V
-1
Coss 100 -0.4 -0.8 -1.2 -1.6 -2.0 0 Source to Drain Voltage VSD (V) -10 -20 -30 -40 -50 Drain to Source VDS (V) -60
0
Rev.1.00,
Mar.03.2005,
page 4 of 6
HAF1010RJ
Gate to Source Voltage vs. Shutdown Time of Load-Short Test Shutdown Case Temperature vs. Gate to Source Voltage
Shutdown Case Temperature Tc (C)
-15
200
(V)
VGS
180
Gate to Source Voltage
-10 VDD = -16 V -5 -24 V
160
140
120 100 0
ID = -0.5 A
0 0.0001
0.001
0.01
0.1
-2
-4
-6
-8
-10
Shutdown Time of Lord-Short Test Pw (S)
Gate to Source Voltage VGS (V)
10
Normalized Transient Thermal Impedance vs. Pulse Width
Normalized Transient Thermal Impedance s (t)
1
D=1 0.5
0.2 0.1 0.1 0.05
0.02
0.01
0.01
ch - f(t) = s (t) * ch - f ch - f = 83.3C/W, Ta = 25C When using the glass epoxy board (FR4 40 x 40 x 1.6 mm)
ls pu e
PDM PW T
0.001
1sh ot
D=
PW T
0.0001 10
100
1m
10 m
100 m
1
10
100
1000
10000
Pulse Width PW (S)
Rev.1.00,
Mar.03.2005,
page 5 of 6
HAF1010RJ
Package Dimensions
JEITA Package Code P-SOP8-3.95 x 4.9-1.27 RENESAS Code PRSP0008DD-A Package Name FP-8DA MASS[Typ.] 0.085g
*1 D
8 5
F
bp b1
*2 E
HE
Index mark 1 Z 4
Terminal cross section
c1 c
*3
bp
xM
NOTE) 1. DIMENSIONS "*1(Nom)" AND "*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION "*3" DOES NOT INCLUDE TRIM OFFSET.
e
L1
Reference Symbol
Dimension in Millimeters Min Nom 4.90 3.95 Max 5.3
D E A2 A1 A 0.10
0.14
0.25 1.75
A1
A
bp
0.34
0.42 0.40
0.50
L
Detail F
b1 c c1 0 HE e x y Z L L1 0.40 5.80 0.19
0.22 0.20
0.25
8 6.10 1.27 0.25 0.1 0.75 0.60 1.08 1.27 6.20
y
Ordering Information
Part Name HAF1010RJ Quantity 2500 pcs/ Reel Shipping Container Embossed tape (Reel)
Note: For some grades, production may be terminated. Please contact the Renesas sales office to check the state of production before ordering the product.
Rev.1.00,
Mar.03.2005,
page 6 of 6
Sales Strategic Planning Div.
Keep safety first in your circuit designs!
Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan
1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. These materials are intended as a reference to assist our customers in the selection of the Renesas Technology Corp. product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to Renesas Technology Corp. or a third party. 2. Renesas Technology Corp. assumes no responsibility for any damage, or infringement of any third-party's rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. 3. All information contained in these materials, including product data, diagrams, charts, programs and algorithms represents information on products at the time of publication of these materials, and are subject to change by Renesas Technology Corp. without notice due to product improvements or other reasons. It is therefore recommended that customers contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor for the latest product information before purchasing a product listed herein. The information described here may contain technical inaccuracies or typographical errors. Renesas Technology Corp. assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies or errors. Please also pay attention to information published by Renesas Technology Corp. by various means, including the Renesas Technology Corp. Semiconductor home page (http://www.renesas.com). 4. When using any or all of the information contained in these materials, including product data, diagrams, charts, programs, and algorithms, please be sure to evaluate all information as a total system before making a final decision on the applicability of the information and products. Renesas Technology Corp. assumes no responsibility for any damage, liability or other loss resulting from the information contained herein. 5. Renesas Technology Corp. semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life is potentially at stake. Please contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater use. 6. The prior written approval of Renesas Technology Corp. is necessary to reprint or reproduce in whole or in part these materials. 7. If these products or technologies are subject to the Japanese export control restrictions, they must be exported under a license from the Japanese government and cannot be imported into a country other than the approved destination. Any diversion or reexport contrary to the export control laws and regulations of Japan and/or the country of destination is prohibited. 8. Please contact Renesas Technology Corp. for further details on these materials or the products contained therein.
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(c) 2005. Renesas Technology Corp., All rights reserved. Printed in Japan.
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