 |
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
| Datasheet File OCR Text: |
| 05100 PLC497 ULTRA LOW CAPACITANCE TVS ARRAY APPLICATIONS Low Voltage Wireless Equipment Sensor & Control Circuits Ethernet - 10/100 Base T FireWire IEC COMPATIBILITY (EN61000-4) 61000-4-2 (ESD): Air - 15kV, Contact - 8kV 61000-4-4 (EFT): 40A - 5/50ns 61000-4-5 (Surge): 24A, 8/20s - Level 2(Line-Ground) & Level 3(Line-Line) F E AT U R E S 250 Watts Peak Pulse Power per Line (tp = 8/20s) Unidirectional Configuration ESD Protection > 25 kilovolts Low Clamping Voltage < 5 Volts Ultra Low Capacitance: 2.5pF RoHS Compliant CHARACTERISTICS SOT-23 MECHANICAL Molded JEDEC SOT-23 Package Weight 8 milligrams (Approximate) Available in Lead-Free Pure-Tin Plating(Annealed) Solder Reflow Temperature: Pure-Tin - Sn, 100: 260-270C Consult Factory for Leaded Device Availability Flammability Rating UL 94V-0 8mm Tape and Reel Per EIA Standard 481 Marking: Marking Code PIN CONFIGURATION 1 3 2 05100.R6 2/07 1 www.protekdevices.com PLC497 DEVICE CHARACTERISTICS MAXIMUM RATINGS @ 25C Unless Otherwise Specified PARAMETER Peak Pulse Power (tp = 8/20s) - See Figure 1 Operating Temperature Storage Temperature SYMBOL PPP TL TSTG VALUE 250 -55 to 150 -55 to 150 UNITS Watts C C ELECTRICAL CHARACTERISTICS PER LINE PART NUMBER DEVICE MARKING RATED STAND-OFF VOLTAGE MINIMUM BREAKDOWN VOLTAGE (See Note 1) @ 1mA V(BR) VOLTS 1.3 MAXIMUM REVERSE LEAKAGE CURRENT (See Note 1) @VWM ID A 20 @ 25C Unless Otherwise Specified MAXIMUM WORKING INVERSE BLOCKING VOLTAGE (See Note 2) V WIB VOLTS 75 INVERSE BLOCKING LEAKAGE CURRENT (See Note 2) @VWIB IR A 1.0 MAXIMUM CAPACITANCE (See Note 3) MAXIMUM CLAMPING VOLTAGE (See Note 1) (See Fig. 2) @8/20s VC@IPP 5.0V @ 50A V WM VOLTS PLC497 LC 1.0 @0V, 1MHz C pF 2.5 Note 1: Apply positive voltage from pin2 to 1. Note 2: Apply positive voltage from pin 1 to 2. Note 3: Capcitance from pin 1 to 2 < 2.5pF. FIGURE 1 PEAK PULSE POWER VS PULSE TIME 10,000 IPP - Peak Pulse Current - % of IPP PPP - Peak Pulse Current - Watts 120 100 80 60 40 20 0 tf FIGURE 2 PULSE WAVE FORM Peak Value IPP TEST WAVEFORM PARAMETERS tf = 8s td = 20s 1,000 250W, 8/20s Waveform e-t 100 td = t I /2 PP 10 0.01 1 10 100 td - Pulse Duration - s 1,000 10,000 0 5 10 15 t - Time - s 20 25 30 05100.R6 2/07 2 www.protekdevices.com PLC497 GRAPHS FIGURE 3 POWER DERATING CURVE Peak Pulse Power 8/20s 100 80 % Of Rated Power 60 40 20 Average Power 0 0 25 50 75 100 125 TL - Lead Temperature - C 150 FIGURE 4 OVERSHOOT & CLAMPING VOLTAGE FOR PLC497 35 5 Volts per Division 25 15 5 -5 ESD Test Pulse: 25 kilovolt, 1/30ns (waveshape) FIGURE 5 TYPICAL CLAMPING VOLTAGE VS PEAK PULSE CURRENT FOR PLC497 16 VC - Clamping Voltage - Volts 12 8 4 0 0 2 4 6 8 10 12 14 16 18 IPP - Peak Pulse Current - Amps 05100.R6 2/07 3 www.protekdevices.com PLC497 APPLICATION NOTE The PLC497 is an ultra low capacitance, bidirectional array that is designed to protect I/O or high speed data lines from the damaging effects of ESD or EFT. This product has a surge capability of 250 Watts PPP per line for an 8/20s wave form and offers ESD protection > 40kV. DIFFERENTIAL-MODE CONFIGURATION (Figure 1) The PLC497 is designed to protect one unidirectional line. Figure 1 shows a typical differential-mode (line to line) I/O port protection circuit application. To achieve bidirectional protection, two PLC497 units are placed in parallel with opposing polarities within the circuit layout. Circuit connectivity is as follows: Pins 1 and 2 of each device connected to datalines Pin 3 is not connected COMMON-MODE CONFIGURATION (Figure 2) The PLC497 can provide protection for sensor circuit applications. Figure 2 is a typical common-mode (line to ground) sensor circuit application. To achieve bidirectional protection in this application, a second pair of TVS devices is added in parallel with opposing polarities where pins 2 are connected to the line, pins 1 connected to ground and pins 3 unconnected. Circuit connectivity is as follows: Pins 1 each device connected to datalines Pins 2 each device connected to ground Pin 3 is not connected Figure 1. Typical Differential-Mode i/o Port Protection Circuit LINE 1 IN LINE 1 OUT CIRCUIT BOARD LAYOUT RECOMMENDATIONS 1 2 Circuit board layout is critical for Electromagnetic Compatibility (EMC) protection. The following guidelines are recommended: The protection device should be placed near the input terminals or connectors, the device will divert the transient current immediately before it can be coupled into the nearby traces. The path length between the TVS device and the protected line should be minimized. All conductive loops including power and ground loops should be minimized. 2 3 3 1 LINE 2 IN LINE 2 OUT Figure 2. Typical Common-Mode Sensor Protection Circuit The transient current return path to ground should be kept as short as possible to reduce parasitic inductance. Ground planes should be used whenever possible. For multilayer PCBs, use ground vias. SENSOR 2 1 3 3 1 2 CIRCUITRY 1 3 2 3 2 1 05100.R6 2/07 4 www.protekdevices.com PLC497 SOT-23 PACKAGE OUTLINE & DIMENSIONS PACKAGE OUTLINE SOT-23 A L 0 - 10 3 B 1 2 S K J PACKAGE DIMENSIONS DIM MILLIMETERS MIN MAX 2.80 1.20 0.89 0.37 1.78 0.013 0.085 0.45 0.89 2.10 0.45 3.04 1.40 1.11 0.50 2.04 0.100 0.177 0.60 1.02 2.50 0.60 INCHES MIN MAX 0.1102 0.0472 0.0350 0.0150 0.0701 0.0005 0.0034 0.0180 0.0350 0.0830 0.0177 0.1197 0.0551 0.0440 0.0200 0.0807 0.0040 0.0070 0.0236 0.0401 0.0984 0.0236 V G C D H A B C D G H J K L S V NOTES 1. 2. 3. 4. MOUNTING PAD 0.037" (0.95mm) Dimensioning and tolerances per ANSI Y14.5M, 1985. Controlling Dimension: Inches Pin 3 is the cathode (Unidirectional Only). Dimensions are exclusive of mold flash and metal burrs. TAPE & REEL ORDERING NOMENCLATURE 1. Surface mount product is taped and reeled in accordance with EIA-481. 2. Suffix-T7 = 7 Inch Reel - 3,000 pieces per 8mm tape, i.e., PLC497-T7. 3. Suffix-T13 = 13 Inch Reel - 10,000 pieces per 8mm tape, i.e., PLC497-T13. 4. Suffix - LF = Lead-Free, Pure-Tin Plating, i.e., PLC497-LF-T7. Outline & Dimensions: Rev 1 - 11/01, 06012 0.079" (2.00mm) 0.033" (0.85mm) 0.033" (0.85mm) COPYRIGHT (c) ProTek Devices 2007 SPECIFICATIONS: ProTek reserves the right to change the electrical and or mechanical characteristics described herein without notice (except JEDEC). DESIGN CHANGES: ProTek reserves the right to discontinue product lines without notice, and that the final judgement concerning selection and specifications is the buyer's and that in furnishing engineering and technical assistance, ProTek assumes no responsibility with respect to the selection or specifications of such products. ProTek Devices 2929 South Fair Lane, Tempe, AZ 85282 Tel: 602-431-8101 Fax: 602-431-2288 E-Mail: sales@protekdevices.com Web Site: www.protekdevices.com www.protekdevices.com 05100.R6 2/07 5 |
Price & Availability of PLC49707
 |
|
|
|
|
All Rights Reserved © IC-ON-LINE 2003 - 2022 |
| [Add Bookmark] [Contact Us] [Link exchange] [Privacy policy] |
|
Mirror Sites : [www.datasheet.hk]
[www.maxim4u.com] [www.ic-on-line.cn]
[www.ic-on-line.com] [www.ic-on-line.net]
[www.alldatasheet.com.cn]
[www.gdcy.com]
[www.gdcy.net] |