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FEATURES Superior Upgrade for ADM698/ADM699, MAX698/MAX699 Guaranteed RESET Assertion with VCC = 1 V Low 70 A Supply Current Precision 4.65 V Voltage Monitor Power OK/Reset Time Delay Watchdog Timer Minimum Component Count Performance Specified over Temperature APPLICATIONS Microprocessor Systems Computers Controllers Intelligent Instruments Automotive Systems Critical P Power Monitoring
VCC
Microprocessor Supervisory Circuits ADM8698/ADM8699
FUNCTIONAL BLOCK DIAGRAM
ADM8698/ ADM8699
RESET* RESET GENERATOR 4.65V
RESET
WATCHDOG INPUT WDI*
WATCHDOG TRANSITION DETECTOR (1 sec)
WATCHDOG OUTPUT WDO*
*WDI (ADM8699 ONLY)
RESET (SOIC ONLY) WDO (ADM8699 SOIC ONLY)
TYPICAL APPLICATION CIRCUIT
+5V
GENERAL DESCRIPTION
The ADM8698/ADM8699 supervisory circuits provide power supply monitoring and watchdog timing for microprocessor systems. The ADM8698 monitors the 5 V VCC power supply and generates a RESET pulse during power up, power down and during low voltage "Brown Out" conditions. The RESET output is guaranteed to be functional (logic low) with VCC as low as 1 V. The ADM8699 features an identical monitoring circuit as in the ADM8698, plus an additional watchdog timer input to monitor microprocessor activity. The RESET output is forced low if the watchdog input is not toggled within the 1 second watchdog timeout period. Both parts are available in 8-pin plastic DIP/SOIC and 16-lead SOIC packages. The 16-lead SOIC contains additional outputs RESET (without inversion) and Watchdog Output WDO (ADM8699 only).
VCC RESET
P POWER P RESET
ADM8698/ ADM8699
WDI* GND
P SYSTEM
I/O LINE
*ADM8699 ONLY
REV. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 617/329-4700 World Wide Web Site: http://www.analog.com Fax: 617/326-8703 (c) Analog Devices, Inc., 1997
ADM8698/ADM8699-SPECIFICATIONS (V
Parameter Min Typ
CC
= +5 V
10%, TA = TMIN to TMAX unless otherwise noted)
Units Test Conditions/Comments
Max
VCC Operating Voltage Range Supply Current Power-Down Reset Assertion Power-Up Reset Deassertion Reset Threshold Hysteresis Reset Active Time Watchdog Timeout Period (ADM8699) Minimum WDI Input Pulse Width RESET Output Voltage RESET Output Voltage (VCC = 1 V)
3.0 70 4.5 4.65 40 200 1.6
5.5 100 4.75
V A V mV ms s ns V mV V V V mA V V A A VIL = 0.4, VIH = 0.8 (VCC) ISINK = 3.2 mA, VCC = 4.4 V ISINK = 100 A, VCC = 1.0 V ISOURCE = 500 A, VCC = 5 V ISINK = 3.2 mA, VCC = 5 V ISOURCE = 1 A, VCC = 4.4 V Output Sink Current
140 1.0 50
280 2.25 0.4 200 0.4
12 3.5
RESET and WDO Output Voltage 3.5 RESET Output Short Circuit Current WDI Input Threshold (ADM8699) Logic Low Logic High WDI Input Current
Specifications subject to change without notice.
45 0.8 3.5 -10 +1 -1 +10
WDI = VCC WDI = 0 V
ABSOLUTE MAXIMUM RATINGS*
(TA = +25C unless otherwise noted)
ORDERING GUIDE Temperature Range Package Options*
VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 V to +6 V All Other Inputs . . . . . . . . . . . . . . . . . . . -0.3 V to VCC + 0.3 V Power Dissipation 8-Pin DIP . . . . . . . . . . . . . . . . . . . . 500 mW JA, Thermal Impedance . . . . . . . . . . . . . . . . . . . . +120C/W Power Dissipation 16-Pin SOIC . . . . . . . . . . . . . . . . . 375 mW JA, Thermal Impedance . . . . . . . . . . . . . . . . . . . . +110C/W Power Dissipation 8-Pin SOIC . . . . . . . . . . . . . . . . . . 500 mW JA, Thermal Impedance . . . . . . . . . . . . . . . . . . . . +125C/W Operating Temperature Range Industrial (A Version) . . . . . . . . . . . . . . . . . -40C to +85C Storage Temperature Range . . . . . . . . . . . . . -65C to +150C Lead Temperature (Soldering, 10 secs) . . . . . . . . . . . . +300C Vapor Phase (60 secs) . . . . . . . . . . . . . . . . . . . . . . . +215C Infrared (15 secs) . . . . . . . . . . . . . . . . . . . . . . . . . . . +220C ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . >4 kV
*Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum ratings for extended periods of time may affect device reliability.
Model
ADM8698AN ADM8698ARW ADM8698ARN ADM8699AN ADM8699ARW ADM8699ARN
-40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C
N-8 R-16 R-8 N-8 R-16 R-8
*N = Plastic DIP; R = Small Outline.
-2-
REV. 0
ADM8698/ADM8699
PIN FUNCTION DESCRIPTIONS Mnemonic Function
TYPICAL PERFORMANCE CURVES
A4
100 90
VCC GND RESET
WDI
RESET WDO
+5 V Power Supply Input. 0 V. Ground reference for all signals. Logic Output. RESET goes low whenever VCC falls below the reset voltage threshold (4.65 V typ). RESET remains low for a minimum of 140 ms after VCC returns to 5 V. RESET also goes low for a minimum of 140 ms if the watchdog timer is enabled but not serviced within its timeout period. Watchdog Input. WDI is a three level input. If WDI remains either high or low for longer than the watchdog timeout period, RESET pulses low and WDO goes low. The timer resets with each transition on the WDI line. The watchdog timer may be disabled if WDI is left floating or is driven to midsupply. (SOIC packages only) Logic Output. RESET is an active high output. It is the inverse of RESET. (SOIC ADM8699 only) Logic Output. The Watchdog Output, WDO, goes low if WDI remains either high or low for longer than the watchdog timeout period. WDO is set high by the next transition at WDI. If WDI is unconnected or at midsupply, the watchdog timer is disabled and WDO remains high.
3.36 V
10 0%
1V
1V
500ms
Figure 1. RESET Output Voltage vs. VCC
230
220
RESET DELAY - ms
210
200
190
180
170 -50
-30
-10
10 30 50 TEMPERATURE - C
70
90
PIN CONFIGURATIONS 8-Lead DIP & SOIC
Figure 2. RESET Timeout Delay vs. Temperature
4.69 4.67
VCC VCC GND GND
1 2 3 4
8
GND RESET NC (WDI)* NC
RESET VOLTAGE THRESHOLD - V
ADM8698/ ADM8699 O
TOP VIEW (Not to Scale)
4.65 4.63
7 6 5
4.61 4.59 4.57 4.55 -60
*( ) ADM8699 ONLY
NC = NO CONNECT
16-Lead SOIC
GND 1 VCC 2 VCC 3 GND 4 16 RESET
-30
0 30 60 TEMPERATURE - C
90
120
O ADM8698/ TOP VIEW ADM8699 (Not to Scale)
15 RESET 14 NC (WDO)* 13 NC
Figure 3. RESET Voltage Threshold vs. Temperature
TOP VIEW NC 5 (Not to Scale) 12 NC NC 6 NC 7 NC 8 11 NC (WDI)* 10 NC 9 GND
*( ) ADM8699 ONLY NC = NO CONNECT
REV. 0
-3-
ADM8698/ADM8699
CIRCUIT INFORMATION Power Fail RESET Watchdog Timer (ADM8699 Only)
On power-up, an internal monostable holds RESET low for 140 ms after VCC rises above the reset threshold. This allows the power supply to stabilize on power-up and also prevents repeated toggling of RESET even if the 5 V power drops out and recovers with each power line cycle. In order to prevent mistriggering due to transient voltage spikes, it is recommended that a 0.1 F capacitor be connected at the VCC pin. The RESET output is guaranteed to remain low with VCC, as low as 1 V. This holds the microprocessor in a stable shutdown condition as the power supply comes up. On the 16-lead SOIC package, an active high RESET output is also provided. This is the complement of RESET and is intended for microprocessors requiring an active high signal.
The WDI input is a three level input and will recognize a lowto-high or high-to-low transition on its input. The watchdog timer is reset by each WDI transition and then begins its timeout period. If the WDI pin remains either high or low, reset pulses will be issued every 1.6 seconds typically. If the watchdog timer is not needed, the WDI input should be left floating. The Watchdog Output (WDO) (SOIC package Only) provides watchdog status information. It is driven low if WDI is not toggled within the watchdog timeout period. It goes high at the next WDI transition. It is also set high when VCC falls below the reset threshold.
WDI
VCC
V2
V1
V2
V1
WDO
RESET
t1
t1
RESET
t2
t2
V1 = RESET VOLTAGE THRESHOLD V2 = RESET VOLTAGE THRESHOLD + THRESHOLD HYSTERESIS
t1
t1
t1
t1 = RESET TIME
Figure 4. Watchdog Timeout Period vs. Temperature
t1 = RESET TIME t2 = WATCHDOG TIME OUT PERIOD
Figure 5. Watchdog Timeout Period and Reset Active Time
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
8-Pin Plastic DIP (N-8)
8-Pin SOIC (R-8)
0.1968 (5.00) 0.1890 (4.80)
16-Lead SOIC (R-16)
8 PIN 1 1
5 0.25 0.31 (6.35) (7.87) 4
8
5
16
9
0.2440 (6.20) 0.2284 (5.80)
1
4
0.1574 (4.00) 0.1497 (3.80)
0.299 (7.60)
0.419 (10.65)
0.430 (10.92) MAX
0.035 (0.89)
PIN 1
0.102 (2.59) 0.094 (2.39)
1
8
0.18 (4.57) 0.018 (0.46) 0.1 (2.54) BSC
0.125 (3.18) MIN SEATING PLANE 0.033 (0.84) 0.18 (4.57) MAX 0.011 (0.28) 0.3 (7.62)
0.0098 (0.25) 0.0040 (0.10) 0.0500 0.0192 (0.49) SEATING (1.27) 0.0138 (0.35) PLANE BSC 0.0196 (0.50) x 45 0.0099 (0.25)
0.413 (10.50) 0.012 (0.3) 0.104 (2.65) 0.05 (1.27) REF 0.030 (0.75) 0.019 (0.49)
0.0098 (0.25) 0.0075 (0.19)
8 0
0.0500 (1.27) 0.0160 (0.41)
0.013 (0.32) 0.042 (1.07)
-4-
REV. 0
PRINTED IN U.S.A.
C2926-10-2/97
A precision voltage detector monitors VCC and generates a RESET output to hold the microprocessor's Reset line low when VCC falls below the reset threshold 4.65 V (see Figure 4). The reset voltage threshold is set to accommodate a 5% variation on VCC. The voltage detector has 40 mV hysteresis to ensure that glitches on VCC do not activate the RESET output.
The watchdog timer input (WDI) monitors an I/O line from the P system. The P must toggle this input once every 1.6 seconds to verify correct software execution. Failure to toggle the line indicates that the P system is not correctly executing its program and may be tied up in an endless loop. If this happens, a reset pulse is generated to initialize the processor.

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