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PRELIMINARY REFERENCE DESIGN PMC-990330 ISSUE 2 ATM SWITCHING ATM SWITCH USING S/UNI-ATLAS, QRT, AND QSE ATM SWITCH USING S/UNI-ATLAS, QRT, AND QSE REFERENCE DESIGN PRELIMINARY ISSUE 2: JUNE 1999 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS' INTERNAL USE PRELIMINARY REFERENCE DESIGN PMC-990330 ISSUE 2 ATM SWITCHING ATM SWITCH USING S/UNI-ATLAS, QRT, AND QSE PUBLIC REVISION HISTORY Issue No. 1 2 Issue Date Apr 1999 July 1999 Details of Change Document created. Added implementation description PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS' INTERNAL USE PRELIMINARY REFERENCE DESIGN PMC-990330 ISSUE 2 ATM SWITCHING ATM SWITCH USING S/UNI-ATLAS, QRT, AND QSE CONTENTS 1 2 3 4 5 DEFINITIONS ........................................................................................... 1 FEATURES ............................................................................................... 2 REFERENCES ......................................................................................... 3 DESCRIPTION ......................................................................................... 4 FUNCTIONAL DESCRIPTION ................................................................. 5 5.1 5.2 5.3 5.4 5.5 5.6 5.7 6 SUBRACK MECHANICAL SPECIFICATION ................................. 5 CUSTOM HIGH SPEED BACKPLANE .......................................... 6 QSE SWITCH CARDS, PMC-981288............................................ 7 SPORT CARD REFERENCE DESIGNS, PMC-980585 ................ 7 TIMING CARD ............................................................................... 8 CPCI BACKPLANE ........................................................................ 8 CPCI PROCESSOR CARD ........................................................... 8 IMPLEMENTATION DESCRIPTION ....................................................... 10 6.1 6.2 SUBRACK.................................................................................... 11 CUSTOM HIGH SPEED BACKPLANE ........................................ 11 6.2.1 SHEET 1, ROOT DRAWING ............................................. 11 6.2.2 SHEETS 2 - 6, SPORT CARD ......................................... 12 6.2.3 SHEET 7, POWER SUPPLY ............................................. 12 6.2.4 SHEETS 8 & 9, QSE CARD.............................................. 12 6.2.5 SHEET 10, TIMING CARD INTERFACE ........................... 12 6.2.6 BACKPLANE BILL OF MATERIALS.................................. 13 6.3 TIMING CARD ............................................................................. 13 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS' INTERNAL USE i PRELIMINARY REFERENCE DESIGN PMC-990330 ISSUE 2 ATM SWITCHING ATM SWITCH USING S/UNI-ATLAS, QRT, AND QSE 6.3.1 SHEET 1, TIMING ROOT DRAWING................................ 13 6.3.2 SHEET 2, CPLD................................................................ 13 6.3.3 SHEET 3, ROBOCLOCKS ................................................ 14 6.3.4 SHEET 4, BACKPLANE INTERFACE ............................... 17 6.3.5 TIMING CARD BILL OF MATERIALS ............................... 19 7 NOTES ON BUILDING LARGE FABRICS.............................................. 21 7.1 7.2 7.3 7.4 7.5 7.6 INCREASE THE NUMBER OF CARDS PER SHELF.................. 21 RAISING THE BANDWIDTH OF THE PORT CARDS ................. 21 BEYOND A SINGLE SHELF ........................................................ 22 40G THREE STAGE SWITCH...................................................... 22 80G THREE STAGE SWITCH...................................................... 25 160G THREE STAGE SWITCH.................................................... 29 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS' INTERNAL USE ii PRELIMINARY REFERENCE DESIGN PMC-990330 ISSUE 2 ATM SWITCHING ATM SWITCH USING S/UNI-ATLAS, QRT, AND QSE LIST OF FIGURES FIGURE 1 - SUBRACK LINE DRAWING ........................................................... 6 FIGURE 2 - SWITCH FABRIC BACKPLANE ..................................................... 7 FIGURE 3 - TIMING CARD ................................................................................ 8 FIGURE 4 - 5G SWITCH WITH 16 OC-3 PORTS............................................ 10 FIGURE 5 - 5G SINGLE STAGE SWITCH....................................................... 21 FIGURE 6 - 40G THREE STAGE SWITCH ...................................................... 22 FIGURE 7 - 80G THREE STAGE SWITCH ...................................................... 25 FIGURE 8 - 160G THREE STAGE SWITCH .................................................... 29 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS' INTERNAL USE iii PRELIMINARY REFERENCE DESIGN PMC-990330 ISSUE 2 ATM SWITCHING ATM SWITCH USING S/UNI-ATLAS, QRT, AND QSE LIST OF TABLES TABLE 1 TABLE 2 TABLE 3 TABLE 4 TABLE 5 TABLE 6 TABLE 7 TABLE 8 TABLE 9 - SUBRACK BILL OF MATERIALS ................................................. 11 - BACKPLANE BILL OF MATERIALS............................................. 13 - ROBOCLOCK SELECT................................................................ 15 - PAIR SELECT............................................................................... 15 - PROGRAMMABLE SKEW CONFIGURATIONS .......................... 16 - BACKPLANE INTERFACE CONNECTOR ................................... 17 - TIMING CARD BILL OF MATERIALS........................................... 19 - SWITCH CARDS.......................................................................... 23 - PORT CARDS .............................................................................. 24 TABLE 10 - SWITCH CARDS.......................................................................... 26 TABLE 11 - PORT CARDS .............................................................................. 27 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS' INTERNAL USE iv PRELIMINARY REFERENCE DESIGN PMC-990330 ISSUE 2 ATM SWITCHING ATM SWITCH USING S/UNI-ATLAS, QRT, AND QSE 1 DEFINITIONS CPCI Compact PCI. The PCI Industrial Computer Manufacturers Group (PICMG) defines a set of standards for the use of PCI in industrial applications. The standards can be found at http://www.picmg.org. IEEE 1101.1 specifies the mechanical requirements for rack mounted cards. The standard is referred to commonly as the eurocard standard. Horizontal Pitch. Refers to horizontal increments in card width. One HP is 0.2 inches. A 4HP card occupies 0.8 inches of rack width. The SPort Card reference design is a switch port card based on the S/UNI-TETRA, S/UNI-ATLAS, and QRT devices from PMC-Sierra. This design is detailed in document PMC980583, available from PMC-Sierra's website. Unit. Refers to height increments in card sizes in the euorocard standard. One U is 1.75 inches. A 6U card, then, is 10.5 inches in height. Eurocard HP SPort Card U PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS' INTERNAL USE 1 PRELIMINARY REFERENCE DESIGN PMC-990330 ISSUE 2 ATM SWITCHING ATM SWITCH USING S/UNI-ATLAS, QRT, AND QSE 2 FEATURES * * * Demonstrates interoperability between QSE and SPort Card reference designs Modified CPCI form factor improves portability Centralized switch fabric timing PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS' INTERNAL USE 2 PRELIMINARY REFERENCE DESIGN PMC-990330 ISSUE 2 ATM SWITCHING ATM SWITCH USING S/UNI-ATLAS, QRT, AND QSE 3 REFERENCES * * * * PMC-Sierra, Inc. "Switch Port Card Reference Design" PMC-980583 PMC-Sierra, Inc. "QSE Reference Design", PMC-981288 PCI Industrial Computer Manufacturer's Group, "CompactPCI Specification",September 1997 IEEE Computer Society, "IEEE Standard for Mechanical Core Specifications for Microcomputers using IEC 60603-2 Connectors", IEEE 1101.1-1998 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS' INTERNAL USE 3 PRELIMINARY REFERENCE DESIGN PMC-990330 ISSUE 2 ATM SWITCHING ATM SWITCH USING S/UNI-ATLAS, QRT, AND QSE 4 DESCRIPTION This reference design describes a 5G ATM switch using the SPort Card and QSE reference designs. The SPort Card reference design is a 4xOC-3 switch port card using the PM5351 S/UNI-TETRA, PM7324 S/UNI-ATLAS, and PM73487 QRT devices. The QSE reference design is a 10Gbps switch core building block using two PM73488 QSE devices. These two boards are designed to be housed in a 9U subrack, using a 3U 8-slot Compact PCI backplane for microprocessor access and a 6U custom backplane for card interconnect. For simplicity, this design uses an eight slot compact PCI backplane. Since the processor card takes up two slots, the chassis will support 6 cards. The chassis will then be able to support multiple switch fabric configurations. The components of the system described in this document are: * * * * * * * * Subrack mechanical specification Custom high speed backplane QSE Switch Cards, PMC-981288 SPort Card reference designs, PMC-980585 Timing card cPCI backplane cPCI Processor card Custom backplane The design guidelines used in this design may be scaled to very large fabrics, as the serialiser and deserialiser components greatly reduce the required interconnection through the backplane. Section 7 attempts to describe how a large system might be designed by extending the design practices. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS' INTERNAL USE 4 PRELIMINARY REFERENCE DESIGN PMC-990330 ISSUE 2 ATM SWITCHING ATM SWITCH USING S/UNI-ATLAS, QRT, AND QSE 5 FUNCTIONAL DESCRIPTION The components that make up the ATM Switch are detailed in the subsections that follow. 5.1 Subrack Mechanical specification A 19 inch, 9U rack conforming to the eurocard standard is used to house SPort cards, QSE switch core cards, timing card, processor card, and backplane interconnect. The following is a non-exhaustive list of features: * * * * * * * 19 inch width with brackets for rackmounting Support for 6 IEEE 1101.1 `Eurocard' format 9U, 160mm deep, 4HP cards each with access to the cPCI bus. Mounting area for 3U cPCI Backplane Mounting area for 6U Custom backplane Support for 6U, 160mm deep, 8HP cPCI processor card Support for a single 3U, 160mm deep, 4HP card. No micrprocessor access is given to this card. Mounting area for Power supply, which connects to the cPCI backplane as well as the custom backplane. A line drawing of the subrack is shown below in Figure 1. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS' INTERNAL USE 5 PRELIMINARY REFERENCE DESIGN PMC-990330 ISSUE 2 ATM SWITCHING ATM SWITCH USING S/UNI-ATLAS, QRT, AND QSE Figure 1 Top View - Subrack Line Drawing Timing Card Power supply mounting area Card Guides Front View Side View QSE or SPort Card reference designs 6U Processor Card Custom Backplane cPCI Backplane 5.2 Custom high speed backplane The backplane is a 6U height passive backplane using AMP HS3 controlled impedance connectors. The backplane routes high-speed signals beteen the QSE switch cards and ATLAS/QRT port cards. The backplane also carries timing information from the timing card to the switch cards and port cards. Power for the timing card is also sourced from the backplane. Depending on the power required by each of the cards, the analog power supply for each of the port cards and switch cards may also be sourced from the backplane. A block diagram of the backplane is illustrated below in Figure 2. The leftmost slot, slot 6, is intended to loopback a port card in order to test the analog portion of the board. Slot 5 is a QSE card slot. Slots 4 through 1 are port card slots. Slot 0 is for the timing card, above the processor card. Each port card connects to one of the 16 available ports on the QSE card. Unused ports on the QSE card are looped back in order to test the analog portion of the board. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS' INTERNAL USE 6 PRELIMINARY REFERENCE DESIGN PMC-990330 ISSUE 2 ATM SWITCHING ATM SWITCH USING S/UNI-ATLAS, QRT, AND QSE Figure 2 - Switch Fabric Backplane SE_CLK, CELL_START, CELL_24_START SPort Card Loopback 5.3 QSE Switch Cards, PMC-981288 The QSE switch card reference design (PMC-981288) is used as a building block for the scalable switch fabric. The QSE switch card reference design has 16 bidirectional ports, each of which can interface to a single SPort Card reference design. The QSE switch card is 9U in height. For more information, refer to document PMC-981288. 5.4 SPort Card reference designs, PMC-980585 The SPort Card reference design (PMC-980585) is used as a 4xOC-3 rate port card. 4 port cards are used, providing a total of 16 OC-3 ports. The SPort Card is 9U in height. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS' INTERNAL USE SPort Card SPort Card SPort Card SPort Card QSE Card Timing Card 7 PRELIMINARY REFERENCE DESIGN PMC-990330 ISSUE 2 ATM SWITCHING ATM SWITCH USING S/UNI-ATLAS, QRT, AND QSE 5.5 Timing card The timing card provides switch fabric timing information to each of the port cards and switch cards. This is a 3U card using an AMP HS3 connector. The reference clock may be sourced from an on-board oscilator or alternately from an external source. Since the card does not require microprocessor access, it does not use a compact PCI slot. Rather, it will be connected only to the custom high speed backplane. A block diagram is shown below in Figure 3. Figure 3 - Timing Card 66.66 MHz SMA Backplane Interface 8 CPLD 5.6 cPCI backplane The cPCI backplane is an off-the-shelf 3U design to provide microprocessor access to each of the SPort Cards and QSE cards. For this design, the backplane must be eight slots, with a right-hand system slot. 5.7 cPCI Processor Card A 6U cPCI Intel-based processor card is an off-the-shelf component used to provide software control to each of the SPort Cards and Switch Cards. Because it is 6U, and the subrack is 9U, there is 3U of space above to mount the timing card. The processor card supports multiple operating systems, including VxWorks and Windows 95/NT. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS' INTERNAL USE PRELIMINARY REFERENCE DESIGN PMC-990330 ISSUE 2 ATM SWITCHING ATM SWITCH USING S/UNI-ATLAS, QRT, AND QSE 6 IMPLEMENTATION DESCRIPTION A 5G single stage switch is constructed using 1 QSE reference design and up to 5 SPort Card reference designs, thus using all the available slots. One of the QSEs on the card will not be used in this case. A block diagram of the switch is shown below in Figure 4. Figure 4 - 5G switch with 16 OC-3 Ports Backplane SPort Card SPort Card QSE 1 SPort Card QSE 2 (Not used) SPort Card SPort Card Timing Card To all cards Processor Card To all cards PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS' INTERNAL USE 9 PRELIMINARY REFERENCE DESIGN PMC-990330 ISSUE 2 ATM SWITCHING ATM SWITCH USING S/UNI-ATLAS, QRT, AND QSE 6.1 Subrack The subrack was constructed using the bill of materials in Table 1. Table 1 No. - Subrack Bill of Materials Description Schroff Part No. 30825-592 30847-816 30846-465 30819-241 30825-356 30825-082 30897-203 21100-575 21100-148 21100-457 21100-739 60817-103 30819-594 60817-061 Qty. 2 2 2 2 2 2 1 1 pkg 1 pkg 1 pkg 1 pkg 16 8 4 1 9Ux280mm deep lab side plate 2 9U 19" Mounting angles 3 84HP Front Rails with extended lip 4 84HP Rear Rails for top and bottom 5 84HP Centre rear rail. 6 20HP Centre rail for guide rail mounting 7 Vertical splitter for 9U 8 Screw kit for securing rails to splitters 9 Screw kit for securing splitters 10 Screw kit for securing rails to sideplates 11 Screw kit for securing 19" mounting angles 12 Guides for 160mm boards 13 Threaded Inserts 84HP 14 Insulating strips for backplane mounting 6.2 Custom High speed backplane The schematics for the high speed backplane are included in Appendix A for reference. 6.2.1 Sheet 1, Root Drawing This sheet shows the top-level inconnection between each of the SPort Card reference designs with the QSE reference design and the timing card. This backplane forms a single stage fabric using only one of the QSEs on the QSE PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS' INTERNAL USE 10 PRELIMINARY REFERENCE DESIGN PMC-990330 ISSUE 2 ATM SWITCHING ATM SWITCH USING S/UNI-ATLAS, QRT, AND QSE reference design. Unused ports on the QSE reference design are looped back on themselves. Slot 6 provides external loopback for the SPort Card. 6.2.2 Sheets 2 - 6, SPort Card Each of these sheets is identical, and reflects the interface to the SPort Card reference design. Refer to PMC-980583 for more information on this interface. 6.2.3 Sheet 7, Power supply J17 provides power to the backplane. The SPort Cards and QSE Cards both have the ability to source analog power through the backplane. Additionally, the timing card (slot 0) must be powered through this connector. Terminal 1 is for analog power (if required) and should be connected to 3.3V. Terminal 2 is for power to the timing card and should be connected to 3.3V. Terminal 4 should be connected to ground. 6.2.4 Sheets 8 & 9, QSE Card These sheets make up the interface to the QSE reference design. Refer to PMC981288 for more information on this interface. 6.2.5 Sheet 10, Timing Card Interface This sheet shows the interface to the timing card. Refer to section 6.3 for more information on this interface. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS' INTERNAL USE 11 PRELIMINARY REFERENCE DESIGN PMC-990330 ISSUE 2 ATM SWITCHING ATM SWITCH USING S/UNI-ATLAS, QRT, AND QSE 6.2.6 Backplane Bill of Materials Table 2 No. - Backplane Bill of Materials Description Manufacturer/Part No. AMP 97-8522-25 Ref Des J1-J16 Qty 16 2 1 2 2 1 6 row HS3 connector Male vertical 2 10F tantalum Capacitor, 6.3V 3 Surface mount fuse, 3A 4 Green surface mount LED 5 300 resistor, 5%, 805 6.3 Timing Card DIGI-KEY C1, C2 PCS1106CT-ND DIGIKEY F1228CT-ND F1 NEWARK -- 95F9373 U1, U2 R1, R2 The schematics for the timing card are included in Appendix B for reference. 6.3.1 Sheet 1, Timing Root Drawing This sheet provides an overview of the design. The general layout of the main blocks and interfacing signals are shown on this sheet. The design is divided into three sections: CPLD, RoboClocks, and Backplane Interface. They are described in the sections that follow. 6.3.2 Sheet 2, CPLD A low voltage, 100-pin, CPLD is used to generate nine CELL_START (RX_CELL_START) signals, six CELL_24_START signals, and 24 RoboClock control signals. All CELL_START and CELL_24_START signals are connected to two input/output pins of the CPLD. This increases the output drive current for each signal and utilization of the CPLD. The VCCIO power pins are connected to 3.3V giving the output drivers 3.3V operation. The CPLD serves two functions. The first function is to supply CELL_START and CELL_24_START signals. One 66.66 MHz clock signal is taken from RoboClock U3 and is connected to the global clock pin of the CPLD. This clock is then connected to an 8-bit counter with an enable. The enable is connected to Vcc, thus making the counter increment on every clock pulse. Three AND gates are PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS' INTERNAL USE 12 PRELIMINARY REFERENCE DESIGN PMC-990330 ISSUE 2 ATM SWITCHING ATM SWITCH USING S/UNI-ATLAS, QRT, AND QSE used to determine when the counter reaches 117. Once 117 has been reached, a logic one is sent to a D flip-flop which uses the same timing as the counter. This allows a logic one to remain for one clock pulse. The 8-bit counter is reset to zero when its output reaches 117. The result of this is a CELL_START signal that becomes high on the rising edge of every 118th cycle of SE_CLK. A 4-bit counter with enable is used to count each CELL_START signal. When the 8-bit counter reaches 117, it enables the 4-bit counter to increment once. A 4-bit AND gate is used to determine when the 4-bit counter reaches 4. At this point, a logic one is outputted and the counter is reset on the next clock pulse. The result is a CELL_24_START signal that goes high every four CELL_START pulses and remains high for one clock cycle. The second purpose of the CPLD is for control of the RoboClocks. Nine switches are connected to the CPLD as input for configuring the RoboClocks. The first four switches can be used to select one output pair. The value of both pins in this pair is denoted by the configuration of the next four switches. The last switch is used as an enable switch to change the values of the selected output pins. This is done by first loading the switches into three registers. These registers are clocked on the global clock signal. The first four switches are connected to the load lines of each register and the next four switches are connected to the data lines of each register. The last switch is connected to the set line of each register. All three registers contain four 5-input AND gates that determine what output pair (if any) is to be changed. If a proper pair is selected and set is high, then the data lines are loaded into four D flip-flops. The output of the D flip-flops are connected to tri-state output buffers, which allows the output to be either low, high, or high impedance. JTAG pins are connected to a right angle header located on the faceplate. 6.3.3 Sheet 3, RoboClocks Three Cypress CY7B991V low voltage programmable skew clock buffers are used to buffer and drive nine SE_CLK signals. The reference clock to the first RoboClock can be supplied from either a local 66.66 MHz crystal oscillator or an external clock source. An external source may be connected to the right angle SMA located on the faceplate. The output of the SMA is balanced with a BALUN transformer. A dual differential LVPECL to TTL translator is then used to convert the signal to TTL logic. A jumper must be used to connect pins two and three of header J3 if using an external clock, otherwise pins one and two must be connected. Nine switches located on the faceplate can be used to vary the skew of each SE_CLK signal. The switches are coded to allow one input pair of a RoboClock PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS' INTERNAL USE 13 PRELIMINARY REFERENCE DESIGN PMC-990330 ISSUE 2 ATM SWITCHING ATM SWITCH USING S/UNI-ATLAS, QRT, AND QSE to be changed at a time. Decoding the switches is done by the CPLD. The first four switches are used to select which RoboClock and pair to modify. See Table 3for the configuration of the first two switches (switch 0 and switch 1). Table 3 Switch 01 00 01 10 11 - RoboClock Select Description Last RoboClock (U4) Middle RoboClock (U2) First RoboClock (U3) Not Used Once the RoboClock has been selected, the pair that requires modification must be selected. Each RoboClock contains four input pairs. See Table 4 for the configuration of the next two switches (switch 2 and switch 3). Table 4 Switch 23 00 01 10 11 - Pair Select Selected Pair 1F0, 1F1 2F0, 2F1 3F0, 3F1 4F0, 4F1 After the RoboClock and pair have been selected, the value of the pair can be set. Each function input is tri-state. In each pair, there is a XF0 pin and a XF1 pin where X stands for either 1, 2, 3, or 4 depending on the pair that was selected. Switch 4 and switch 5 control the value of the XF1 pin in the pair. If switch 4 = switch 5 = 0, then XF1 is LOW. If switch 4 = 0 (or 1) and switch 5 = 1 then the XF1 pin is MID (high impedance). And finally, if switch 4 = 1 and switch 5 = 0 then the XF1 pin is HIGH. A similar configuration follows for switch 6 and switch 7, which control pin XF0. Switch eight must be asserted for at least one clock pulse to load the value into the selected pair. The input configuration of each pair determines the amount of skew the corresponding output pair will have with respect to the reference clock. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS' INTERNAL USE 14 PRELIMINARY REFERENCE DESIGN PMC-990330 ISSUE 2 ATM SWITCHING ATM SWITCH USING S/UNI-ATLAS, QRT, AND QSE Table 5 1F1, 2F1, 3F1, 4F1 - Programmable Skew Configurations 1F0, 2F0, 3F0, 4F0 1Q0, 1Q1, 2Q0, 2Q1 (ns) 3Q0, 3Q1 (ns) 4Q0, 4Q1 (ns) LOW LOW LOW MID MID MID HIGH HIGH HIGH LOW MID HIGH LOW MID HIGH LOW MID HIGH -4tU -3tU -2tU -1tU 0tU +1tU +2tU +3tU +4tU Divide by 2 -6tU -4tU -2tU 0tU +2tU +4tU +6tU Divide by 4 Divide by 2 -6tU -4tU -2tU 0tU +2tU +4tU +6tU Inverted Notes on Programmable Skew Configurations: 1. tU can be calculated by the following formula tU = 1/(16fNOM) 2. fNOM is the operating frequency between 40MHz and 66.67MHz. Using a 66.66MHz clock, is approximately 0.94 ns. When using the local 66.66 MHz crystal oscillator as the reference clock to RoboClock U3, both input pins 3F0 and 3F1 must equal MID. This allows all other output pins to run at the required frequency of 66.66 MHz. 2Q0 and 2Q1 provides the reference clock for the middle RoboClock and the last RoboClock respectively. Adjusting input pins 2F0 and 2F1 on the first RoboClock will skew all output signals from the middle and the last RoboClocks equally. Adjusting input pins 1F0 and 1F1 on the first RoboClock will affect all CELL_START and CELL_24_START signals equally. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS' INTERNAL USE 15 PRELIMINARY REFERENCE DESIGN PMC-990330 ISSUE 2 ATM SWITCHING ATM SWITCH USING S/UNI-ATLAS, QRT, AND QSE 6.3.4 Sheet 4, Backplane Interface The backplane interface is a HS3 6 x 10 right angle connector. Nine SE_CLK, nine CELL_START and six CELL_24_START signals are delivered through the connector. Six 3.3V power pins are supplied from the backplane to the board. Table 6 Pin Name SE_CLK_1 SE_CLK_2 SE_CLK_3 SE_CLK_4 SE_CLK_5 SE_CLK_6 SE_CLK_7 SE_CLK_8 SE_CLK_9 CELL_START_1 CELL_START_2 CELL_START_3 CELL_START_4 CELL_START_5 CELL_START_6 CELL_START_7 CELL_START_8 CELL_START_9 Output - Backplane Interface Connector Type Output Pin No. A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 C1 C2 C3 C4 C5 C6 C7 C8 Function Switch Element Clock is the 66.66 MHz switch fabric clock for the QSE and QRT. Cell Start indicates the SOC for the QSE and QRT. It is driven high every cell time (118 SE_CLKs) and remains high for 1 clock cycle. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS' INTERNAL USE 16 PRELIMINARY REFERENCE DESIGN PMC-990330 ISSUE 2 ATM SWITCHING ATM SWITCH USING S/UNI-ATLAS, QRT, AND QSE Pin Name C24S_1 C24S_2 C24S_3 C24S_4 C24S_5 C24S_6 NC Type Output Pin No. C9 C10 E1 E2 E3 E4 Function Cell 24 Start indicates the 4th cell time. It is driven high every 4 CELL_START assertions and follows CELL_START when driven high. NC B1 B10, D1 D10, F1 F10 Not Connected + 3.3V GND Input Input E5 E10 AB1 AB10, CD1 CD10, EF1 EF10 + 3.3 Volt supply Ground PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS' INTERNAL USE 17 PRELIMINARY REFERENCE DESIGN PMC-990330 ISSUE 2 ATM SWITCHING ATM SWITCH USING S/UNI-ATLAS, QRT, AND QSE 6.3.5 Timing Card Bill of Materials Table 7 No. 1 2 3 4 5 6 7 8 9 10 - Timing Card Bill of Materials Description AMP HS3 6x10 Female Right Angle Connector BALUN Transformer Capacitor 0.1uF, 50V, X7R_805 Capacitor 4.7uF, 6.3V, TANT TE, SMD Manufacturer/Part No. AMP 97-8522-24 TOKO 617DB-1024 KEMET C0805C104K5RACTR Panasonic - ECG ECS-T0JY475R Ref Des J5 T1 Qty 1 1 C1-C6, C8- 28 29 C7, C30 U2-U4 F1 J2 J1 J3 D1 2 3 1 1 1 1 1 Low Voltage Programmable Cypress CY7B991VSkew Clock Buffer 5JC Fuse 2A 125V Fast Nano 2 SMF Header-4 Switch 10 pos. DIP Header-3 LED 5mm Green PCB Right Angle Dual Differential PECL to TTL Translator Oscillator 66.6667MHz, HCMOS, 8-PIN, 3.3V Resistor 1.0 Ohm, 1/8W, 5%, 1206, SMD Resistor 1.00k Ohm, 1/10W, 1%, 0805, SMD Littelfuse Inc. R451002 Sullins Electronics Corp. PZC36SAAN Grayhill 78B10S Sullins Electronics Corp. PZC36SAAN Lumex Opto/Components Inc. SSF-LXH100MLGD Motorola Semiconductor MC100ELT23 MMD Components MB3100H66.6667MHz Panasonic - ECG ERJ-8RQJ1R0V Panasonic - ECG ERJ-6ENF1001V 11 U1 1 12 Y1 1 13 14 R8, R9 R12 2 1 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS' INTERNAL USE 18 PRELIMINARY REFERENCE DESIGN PMC-990330 ISSUE 2 ATM SWITCHING ATM SWITCH USING S/UNI-ATLAS, QRT, AND QSE No. 15 16 17 Description Resistor 10.0k Ohm, 1/10W, 1%, 0805, SMD Resistor 100 Ohm, 1/10W, 5%, 0805, SMD Resistor 20 Ohm, 1/10W, 5%, 0805, SMD Resistor 20k Ohm, 1/10W, 5%, 0805, SMD Resistor 25.5 Ohm, 1/10W, 1%, 0805, SMD Resistor 300 Ohm, 1/10W, 5%, 0805, SMD Resistor 49.9 Ohm, 1/10W, 1%, 0805, SMD Resistor Network 10k Ohm, 16pin, 15Res, SMD SMA PCB Right Angle XC95144XL High Performance CPLD, TQFP100 Manufacturer/Part No. Panasonic - ECG ERJ-6ENF1002V Panasonic - ECG ERJ-6GEYJ101V Panasonic - ECG ERJ-6GEYJ200V Panasonic - ECG ERJ-6GEYJ203V Panasonic - ECG ERJ-6ENF25R5V Panasonic - ECG ERJ-6GEYJ301V Panasonic - ECG ERJ-6ENF49R9V CTS Corporation Resistor Products 766161103G Johnson Components, Inc. 142-0701-301 Xilinx XC95144XL5TQ100C Ref Des R4, R6 R7 R2, R13R34, R36R39 R5, R11 R3, R10 R1 R35 RN1 Qty 2 1 27 18 19 20 21 22 2 2 1 1 1 23 24 J4 U5 1 1 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS' INTERNAL USE 19 PRELIMINARY REFERENCE DESIGN PMC-990330 ISSUE 2 ATM SWITCHING ATM SWITCH USING S/UNI-ATLAS, QRT, AND QSE 7 NOTES ON BUILDING LARGE FABRICS This document showed how to use the QSE reference design and the SPort Card reference design to build a single stage switch with 16 OC-3 ports. The design could easily be scaled to 32 OC-3 ports by simply providing more slots in the backplane. The logical interconnection is shown below in Figure 5. For simplicity, the QRT input and output ports are drawn seperately, though they are in fact part of the same physical device. Figure 5 - 5G Single Stage Switch x4 x4 PM73487 QRT PM73488 QSE PM73487 QRT x4 Where larger fabrics are desired, the design practices used to create a 5G switch can be extended to create scalable fabrics up to 40G, 80G, and 160G. Suggested strategies for reaching these rates are detailed in the sections that follow. 7.1 Increase the Number of Cards Per Shelf A larger number of cards per shelf is recommended. A 19 inch rack is wide enough to house 16 cards quite comfortably, with enough room to spare for processor card, timing card, and power supply. 7.2 Raising the bandwidth of the port cards The bandwidth of the port cards could be raised to OC-48 rates. The SPort Card is on a 100mm x 9U card. The design practices used on that card could be extended to build a card using 4 OC-12 PHYs, 4 ATLASs, and 4 QRTs. This would significantly reduce the number of slots dedicated to port cards. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS' INTERNAL USE 20 PRELIMINARY REFERENCE DESIGN PMC-990330 ISSUE 2 ATM SWITCHING ATM SWITCH USING S/UNI-ATLAS, QRT, AND QSE 7.3 Beyond a Single Shelf A good strategy for building multiple shelf designs would be to place all the QSE cards within the same rack. In this way, the most dense interconnection between the QSEs would be contained within the shelf, reducing the interconnect between shelves. The Port cards, having less interconnect to the QSEs, could then be housed in other shelves. The shelves could then be interconnected using a transition card using miniature coax or twinax cables. 7.4 40G Three Stage Switch A 40G three stage switch can be constructed using 24 QSEs and 64 QRTs. The logical interconnection is illustrated in Figure 6 below. Figure 6 QRT In #1 - 40G Three Stage Switch QRT Out #1 QSE #1 x4 QSE #9 QSE #10 x4 QSE #17 QSE #15 QSE #8 QRT In #64 QSE #16 QSE #24 QRT Out #64 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS' INTERNAL USE 21 PRELIMINARY REFERENCE DESIGN PMC-990330 ISSUE 2 ATM SWITCHING ATM SWITCH USING S/UNI-ATLAS, QRT, AND QSE Clearly a design such as the one in Figure 6 would require multiple shelves. The number of shelves required depends on the density of the cards. Using the recommendations of section 7.1, we will assume that each shelf can accommodate 16 cards. Using the recommendation of section 7.2, we will assume that each port card has four PM73487 QRT devices. Thus, 64 QRTs could fit onto 16 cards. The 24 PM73488 QSE devices could fit onto 12 cards, assuming two QSEs per card. Since the most dense interconnect is between QSEs, it is recommended that all the switch cards be placed in one shelf, while all the port cards are placed in the second shelf. Table 8 below describes how each of the switch cards corresponds to QSEs in Figure 6. Table 9 describes how each of the port cards corresponds to QRTs in Figure 6. Table 8 - Switch Cards QSE#s (From Figure 6) #9, #10 #11, #12 #13, #14 #15, #16 #1, #17 #2, #18 #3, #19 #4, #20 #5, #21 #6, #22 #7, #23 #8, #24 Switch Card Number 1 2 3 4 5 6 7 8 9 10 11 12 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS' INTERNAL USE 22 PRELIMINARY REFERENCE DESIGN PMC-990330 ISSUE 2 ATM SWITCHING ATM SWITCH USING S/UNI-ATLAS, QRT, AND QSE Table 9 - Port Cards QRT#s (from Figure 6) #1 - #4 #5 - #8 #9 - #12 #13 - #16 #17 - #20 #21 - #24 #25 - #28 #29 - #32 #33 - #36 #37 - #40 #41 - #44 #45 - #48 #49 - #52 #53 - #56 #57 - #60 #61 - #64 Connects to switch card number #5 #5 #6 #6 #7 #7 #8 #8 #9 #9 #10 #10 #11 #11 #12 #12 Port Card Number 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 The design is scaleable from 2.5G to 40G, in increments of 2.5G. The initial installation of the switch would use switch cards 1 through 5 and port card 1 to create a 2.5G switch. Additional port cards can be added, with the corresponding switch cards to allow cost linearity in expanding the switch up to its maximum capacity of 40G. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS' INTERNAL USE 23 PRELIMINARY REFERENCE DESIGN PMC-990330 ISSUE 2 ATM SWITCHING ATM SWITCH USING S/UNI-ATLAS, QRT, AND QSE 7.5 80G Three Stage Switch An 80G design can be constructed using 48 QSEs and 128 QRTs in the as described in Figure 7 below. Note that in the figure, QRT/QSE ports are grouped in twos, rather than in fours as was done in previous sections. This requires a change in the backplane serialization strategy, but is required to create an 80G fabric. Figure 7 QRT In #1 - 80G Three Stage Switch QRT Out #1 x2 x2 QSE #1 x2 QSE #17 QSE #18 x2 QSE #33 QSE #31 QSE #16 QRT In #128 QSE #32 QSE #48 QRT Out #128 Maintaining the assumptions of section 7.4, the above switch would require 24 switch cards and 32 port cards. Therefore, the entire switch would fit into 4 shelves. The QSEs would be grouped onto cards in the same manner as in section 7.4, as illustrated in below. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS' INTERNAL USE 24 PRELIMINARY REFERENCE DESIGN PMC-990330 ISSUE 2 ATM SWITCHING ATM SWITCH USING S/UNI-ATLAS, QRT, AND QSE Table 10 - Switch Cards QSE#s (from Figure 7) #17, #18 #19, #20 #21, #22 #23, #24 #25, #26 #27, #28 #29, #30 #31, #32 #1, #33 #2, #34 #3, #35 #4, #36 #5, #37 #6, #38 #7, #39 #8, #40 #9, #41 #10, #42 #11, #43 #12, #44 Switch Card Number 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS' INTERNAL USE 25 PRELIMINARY REFERENCE DESIGN PMC-990330 ISSUE 2 ATM SWITCHING ATM SWITCH USING S/UNI-ATLAS, QRT, AND QSE Switch Card Number 21 22 23 24 QSE#s (from Figure 7) #13, #45 #14, #46 #15, #47 #16, #48 Table 11 - Port Cards QRT#s (from Figure 7) #1 - #4 #5 - #8 #9 - #12 #13 - #16 #17 - #20 #21 - #24 #25 - #28 #29 - #32 #33 - #36 #37 - #40 #41 - #44 #45 - #48 #49 - #52 #53 - #56 Connects to switch card number 9 9 10 10 11 11 12 12 13 13 14 14 15 15 Port Card Number 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS' INTERNAL USE 26 PRELIMINARY REFERENCE DESIGN PMC-990330 ISSUE 2 ATM SWITCHING ATM SWITCH USING S/UNI-ATLAS, QRT, AND QSE Port Card Number QRT#s (from Figure 7) Connects to switch card number 16 16 17 17 18 18 19 19 20 20 21 21 22 22 23 23 24 24 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 #57 - #60 #61 - #64 #65 - #68 #69 - #72 #73 - #76 #77 - #80 #81 - #84 #85 - #88 #89 - #92 #93 - #96 #97 - #100 #101 - #104 #105 - #108 #109 - #112 #113 - #116 #117 - #120 #121 - #124 #125 - #128 The design is also scaleable from 2.5G to 80G, in increments of 2.5G. The initial installation of the switch would use switch cards 1 through 9 and port card 1 to create a 2.5G switch. Additional port cards can be added, with the corresponding switch cards to allow cost linearity in expanding the switch up to its maximum capacity of 80G. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS' INTERNAL USE 27 PRELIMINARY REFERENCE DESIGN PMC-990330 ISSUE 2 ATM SWITCHING ATM SWITCH USING S/UNI-ATLAS, QRT, AND QSE 7.6 160G Three Stage Switch A 160G design can be constructed using 96 QSEs and 256 QRTs in the as described in Figure 7 below. Note that in the figure, QRT/QSE ports are not grouped as was done in previous sections. This requires a change in the backplane serialization strategy, but is required to create a 160G fabric. Figure 8 QRT In #1 - 160G Three Stage Switch QRT Out #1 QSE #1 QSE #33 QSE #34 QSE #65 QSE #63 QSE #32 QRT In #256 QSE #64 QSE #96 QRT Out #256 Using the assumptions of the previous section, this switch would require 64 port cards and 48 switch cards, and would occupy 7 shelves. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS' INTERNAL USE 28 PRELIMINARY REFERENCE DESIGN PMC-990330 ISSUE 2 ATM SWITCHING ATM SWITCH USING S/UNI-ATLAS, QRT, AND QSE APPENDIX A: BACKPLANE SCHEMATICS PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS' INTERNAL USE 29 10 9 5 4 3 2 1 8 7 6 REVISIONS SLOT 5 ZONE REV DESCRIPTION DATE APPR SW_CARD1_INTERFACE H PORT_CARD1_INTERFACE TX00+ TX00RX00+ RX00TX01+ TX01RX01+ RX01- TXD0P TXD0N RXD0P RXD0N TXD1P TXD1N RXD1P RXD1N H SLOT 4 3..0 3..0 2 2 BPACKOUT<3..0> BPACKIN<3..0> SE_CLK<2> CELL_START<2> SE_CLK CELL_START PAGE 2 TXD2P TXD2N RXD2P RXD2N TXD3P TXD3N RXD3P RXD3N TX4P TX4N TX5P TX5N TX6P TX6N 7..4 7..4 3 3 TX+ TXRX+ RXBP_ACK_IN<3..0> BP_ACK_OUT<3..0> G TX05+ TX05RX05+ RX05TX06+ TX06RX06+ RX06BPACKOUT<7..4> BPACKIN<7..4> SE_CLK<3> CELL_START<3> SE_CLK CELL_START PAGE 3 TX8P TX8N PORT_CARD3_INTERFACE TX9P TX9N 11..8 TX02+ TX02RX02+ RX02TX03+ TX03RX03+ RX03TX04+ TX04RX04+ RX04PORT_CARD2_INTERFACE TX+ TXRX+ RXBP_ACK_IN<3..0> BP_ACK_OUT<3..0> G SLOT 3 TX07+ TX07RX07+ RX07- TX7P TX7N F TX10+ TX10RX10+ RX10TX11+ TX11RX11+ RX11TX10P TX10N 11..8 4 4 F BPACKOUT<11..8> BPACKIN<11..8> SE_CLK<4> CELL_START<4> TX12+ TX12RX12+ RX12TX13+ TX13RX13+ RX13TX12P TX12N TX11P TX11N TX+ TXRX+ RXBP_ACK_IN<3..0> BP_ACK_OUT<3..0> SE_CLK CELL_START PAGE 4 SLOT 2 PORT_CARD4_INTERFACE E TX13P TX13N 15..12 15..12 5 5 TX14+ TX14RX14+ RX14TX15+ TX15RX15+ RX15TX14P TX14N BPACKOUT<15..12> BPACKIN<15..12> TX+ TXRX+ RXBP_ACK_IN<3..0> BP_ACK_OUT<3..0> SE_CLK<5> CELL_START<5> SE_CLK CELL_START PAGE 5 SLOT 1 E TX16+ TX16RX16+ RX16TX17+ TX17RX17+ RX1731..16 TX15P TX15N PORT_CARD5_INTERFACE SLOT 6 BPPCLOOP<3..0> 6 6 D 31..16 SE_CLK CELL_START CELL_24_START BPACKIN0<31..0> BPACKOUT0<31..0> BPACKIN1<31..0> BPACKOUT1<31..0> PAGE 8,9 BPACKIN<31..0> BPACKOUT<31..0> BPSCLOOP1<31..0> TX+ TXRX+ RXBP_ACK_IN<3..0> BP_ACK_OUT<3..0> SE_CLK<6> CELL_START<6> SE_CLK CELL_START PAGE 6 D CELL_START<1> TIMING_CARD_INTERFACE 1 1 SE_CLK<8..0> 1 SE_CLK<8..0> CELL_START<8..0> CELL_START<8..0> CELL_24_START<5..0> 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 CELL_24_START<5..0> CELL_24_START<1> BPSCLOOP0<31..16> PAGE 10 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 BPSCLOOP0<31..16> C SLOT 0 SE_CLK<1> C B B POWER DRAWING: TITLE=LOOPBACK_ROOT ABBREV=LOOPBACK_ROOT LAST_MODIFIED=Tue May 18 16:19:20 1999 PMC-Sierra, Inc. DOCUMENT NUMBER: PMC-990330 ISSUE: 1 DATE: 99/05/03 ENGINEER: 8 7 6 5 4 3 SA / GW 2 PAGE:1 1 OF 10 TITLE: ATM SWITCH BACKPLANE ROOT DRAWING A PAGE 7 A 10 9 10 9 5 4 3 2 1 8 7 6 REVISIONS SLOT 4 SPORT CARD ZONE REV DESCRIPTION DATE APPR H H J1 J1 J1 G ROW 2 (TOP) J1 G RX+\I RX-\I AB1 AB2 AB3 AB4 AB5 AB6 AB7 AB8 AB9 AB10 CD1 CD2 CD3 CD4 CD5 CD6 CD7 CD8 CD9 CD10 EF1 EF2 EF3 EF4 EF5 EF6 EF7 EF8 EF9 EF10 TX+\I A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A1 B1 A2 B2 A3 B3 A4 B4 A5 B5 A6 B6 A7 B7 A8 B8 A9 B9 A10 B10 AMP_HS3_6X10 MALE_V J1 B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 TX-\I AB1 AB2 AB3 AB4 AB5 AB6 AB7 AB8 AB9 AB10 AMP_HS3_6X10 MALE_V CD1 CD2 CD3 CD4 CD5 CD6 CD7 CD8 CD9 CD10 AMP_HS3_6X10 MALE_V EF1 EF2 EF3 EF4 EF5 EF6 EF7 EF8 EF9 EF10 AMP_HS3_6X10 MALE_V F F C1 C2 C3 C4 C5 C6 C7 C8 C9 C10 C1 D1 C2 D2 C3 D3 C4 D4 C5 D5 C6 D6 C7 D7 C8 D8 C9 D9 C10 D10 AMP_HS3_6X10 MALE_V D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 GND PINS FOR HS3 CONNECTORS VDD_A J1 E1 E2 E3 E4 E5 E6 E7 E8 E9 E10 E E1 F1 E2 F2 E3 F3 E4 F4 E5 F5 E6 F6 E7 F7 E8 F8 E9 F9 E10 F10 AMP_HS3_6X10 MALE_V F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 J2 AB1 AB2 AB3 AB4 AB5 AB6 AB7 AB8 AB9 AB10 J2 AB1 AB2 AB3 AB4 AB5 AB6 AB7 AB8 AB9 AB10 AMP_HS3_6X10 CD1 CD2 CD3 CD4 CD5 CD6 CD7 CD8 CD9 CD10 J2 CD1 CD2 CD3 CD4 CD5 CD6 CD7 CD8 CD9 CD10 AMP_HS3_6X10 EF1 EF2 EF3 EF4 EF5 EF6 EF7 EF8 EF9 EF10 E EF1 EF2 EF3 EF4 EF5 EF6 EF7 EF8 EF9 EF10 AMP_HS3_6X10 ROW 4 (BOTTOM) J2 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 D A1 B1 A2 B2 A3 B3 A4 B4 A5 B5 A6 B6 A7 B7 A8 B8 A9 B9 A10 B10 AMP_HS3_6X10 J2 3 2 1 0 B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 D BP_ACK_IN<3..0>\I C C1 C2 C3 C4 C5 C6 C7 C8 C9 C10 C1 D1 C2 D2 C3 D3 C4 D4 C5 D5 C6 D6 C7 D7 C8 D8 C9 D9 C10 D10 AMP_HS3_6X10 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 C J2 3 2 1 0 10G10< BP_ACK_OUT<3..0>\I B 2E10> CELL_START\I E1 E2 E3 E4 E5 E6 E7 E8 E9 E10 E1 F1 E2 F2 E3 F3 E4 F4 E5 F5 E6 F6 E7 F7 E8 F8 E9 F9 E10 F10 AMP_HS3_6X10 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 SE_CLK\I B DRAWING: TITLE=PORT_CARD1_INTERFACE ABBREV=PORT_CARD1_INTERFACE LAST_MODIFIED=Mon May 10 10:21:34 1999 PMC-Sierra, Inc. DOCUMENT NUMBER: PMC-990330 ISSUE: 1 DATE: 99/05/03 ENGINEER: 8 7 6 5 4 3 SA / GW 2 PAGE:2 1 OF 10 TITLE: ATM SWITCH BACKPLANE 1 SPORT CARD SLOT A A 10 9 10 9 5 4 3 2 1 8 7 6 REVISIONS ZONE REV DESCRIPTION DATE APPR SLOT 3 SPORT CARD H H J3 J3 J3 G ROW 2 (TOP) J3 G RX+\I RX-\I AB1 AB2 AB3 AB4 AB5 AB6 AB7 AB8 AB9 AB10 TX+\I A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A1 B1 A2 B2 A3 B3 A4 B4 A5 B5 A6 B6 A7 B7 A8 B8 A9 B9 A10 B10 AMP_HS3_6X10 B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 TX-\I AB1 AB2 AB3 AB4 AB5 AB6 AB7 AB8 AB9 AB10 AMP_HS3_6X10 CD1 CD2 CD3 CD4 CD5 CD6 CD7 CD8 CD9 CD10 CD1 CD2 CD3 CD4 CD5 CD6 CD7 CD8 CD9 CD10 AMP_HS3_6X10 EF1 EF2 EF3 EF4 EF5 EF6 EF7 EF8 EF9 EF10 EF1 EF2 EF3 EF4 EF5 EF6 EF7 EF8 EF9 EF10 AMP_HS3_6X10 F J3 F C1 C2 C3 C4 C5 C6 C7 C8 C9 C10 C1 D1 C2 D2 C3 D3 C4 D4 C5 D5 C6 D6 C7 D7 C8 D8 C9 D9 C10 D10 AMP_HS3_6X10 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 GND PINS FOR HS3 CONNECTORS VDD_A J3 E1 E2 E3 E4 E5 E6 E7 E8 E9 E10 E E1 F1 E2 F2 E3 F3 E4 F4 E5 F5 E6 F6 E7 F7 E8 F8 E9 F9 E10 F10 AMP_HS3_6X10 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 J4 AB1 AB2 AB3 AB4 AB5 AB6 AB7 AB8 AB9 AB10 J4 AB1 AB2 AB3 AB4 AB5 AB6 AB7 AB8 AB9 AB10 AMP_HS3_6X10 CD1 CD2 CD3 CD4 CD5 CD6 CD7 CD8 CD9 CD10 J4 CD1 CD2 CD3 CD4 CD5 CD6 CD7 CD8 CD9 CD10 AMP_HS3_6X10 EF1 EF2 EF3 EF4 EF5 EF6 EF7 EF8 EF9 EF10 E EF1 EF2 EF3 EF4 EF5 EF6 EF7 EF8 EF9 EF10 AMP_HS3_6X10 ROW 4 (BOTTOM) J4 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 D A1 B1 A2 B2 A3 B3 A4 B4 A5 B5 A6 B6 A7 B7 A8 B8 A9 B9 A10 B10 AMP_HS3_6X10 J4 3 2 1 0 B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 D BP_ACK_IN<3..0>\I C C1 C2 C3 C4 C5 C6 C7 C8 C9 C10 C1 D1 C2 D2 C3 D3 C4 D4 C5 D5 C6 D6 C7 D7 C8 D8 C9 D9 C10 D10 AMP_HS3_6X10 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 C J4 3 2 1 0 10G10< BP_ACK_OUT<3..0>\I B 2E10> CELL_START\I E1 E2 E3 E4 E5 E6 E7 E8 E9 E10 E1 F1 E2 F2 E3 F3 E4 F4 E5 F5 E6 F6 E7 F7 E8 F8 E9 F9 E10 F10 AMP_HS3_6X10 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 SE_CLK\I B DRAWING: TITLE=PORT_CARD2_INTERFACE ABBREV=PORT_CARD2_INTERFACE LAST_MODIFIED=Mon May 10 10:21:51 1999 PMC-Sierra, Inc. DOCUMENT NUMBER: PMC-980330 ISSUE: 1 DATE: 99/05/03 ENGINEER: 8 7 6 5 4 3 SA GW 2 PAGE:3 1 OF 10 TITLE: ATM SWITCH BACKPLANE 1 SPORT CARD SLOT A A 10 9 10 9 5 4 3 2 1 8 7 6 REVISIONS SLOT 2 SPORT CARD ZONE REV DESCRIPTION DATE APPR H H J5 J5 J5 G ROW 2 (TOP) J5 G RX+\I RX-\I AB1 AB2 AB3 AB4 AB5 AB6 AB7 AB8 AB9 AB10 TX+\I A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A1 B1 A2 B2 A3 B3 A4 B4 A5 B5 A6 B6 A7 B7 A8 B8 A9 B9 A10 B10 AMP_HS3_6X10 B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 TX-\I AB1 AB2 AB3 AB4 AB5 AB6 AB7 AB8 AB9 AB10 AMP_HS3_6X10 CD1 CD2 CD3 CD4 CD5 CD6 CD7 CD8 CD9 CD10 CD1 CD2 CD3 CD4 CD5 CD6 CD7 CD8 CD9 CD10 AMP_HS3_6X10 EF1 EF2 EF3 EF4 EF5 EF6 EF7 EF8 EF9 EF10 EF1 EF2 EF3 EF4 EF5 EF6 EF7 EF8 EF9 EF10 AMP_HS3_6X10 F J5 F C1 C2 C3 C4 C5 C6 C7 C8 C9 C10 C1 D1 C2 D2 C3 D3 C4 D4 C5 D5 C6 D6 C7 D7 C8 D8 C9 D9 C10 D10 AMP_HS3_6X10 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 GND PINS FOR HS3 CONNECTORS VDD_A J5 E1 E2 E3 E4 E5 E6 E7 E8 E9 E10 E E1 F1 E2 F2 E3 F3 E4 F4 E5 F5 E6 F6 E7 F7 E8 F8 E9 F9 E10 F10 AMP_HS3_6X10 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 J6 AB1 AB2 AB3 AB4 AB5 AB6 AB7 AB8 AB9 AB10 J6 AB1 AB2 AB3 AB4 AB5 AB6 AB7 AB8 AB9 AB10 AMP_HS3_6X10 CD1 CD2 CD3 CD4 CD5 CD6 CD7 CD8 CD9 CD10 J6 CD1 CD2 CD3 CD4 CD5 CD6 CD7 CD8 CD9 CD10 AMP_HS3_6X10 EF1 EF2 EF3 EF4 EF5 EF6 EF7 EF8 EF9 EF10 E EF1 EF2 EF3 EF4 EF5 EF6 EF7 EF8 EF9 EF10 AMP_HS3_6X10 ROW 4 (BOTTOM) J6 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 D A1 B1 A2 B2 A3 B3 A4 B4 A5 B5 A6 B6 A7 B7 A8 B8 A9 B9 A10 B10 AMP_HS3_6X10 J6 3 2 1 0 B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 D BP_ACK_IN<3..0>\I C C1 C2 C3 C4 C5 C6 C7 C8 C9 C10 C1 D1 C2 D2 C3 D3 C4 D4 C5 D5 C6 D6 C7 D7 C8 D8 C9 D9 C10 D10 AMP_HS3_6X10 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 C J6 3 2 1 0 10G10< BP_ACK_OUT<3..0>\I B 2E10> CELL_START\I E1 E2 E3 E4 E5 E6 E7 E8 E9 E10 E1 F1 E2 F2 E3 F3 E4 F4 E5 F5 E6 F6 E7 F7 E8 F8 E9 F9 E10 F10 AMP_HS3_6X10 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 SE_CLK\I B DRAWING: TITLE=PORT_CARD3_INTERFACE ABBREV=PORT_CARD3_INTERFACE LAST_MODIFIED=Mon May 10 10:22:10 1999 PMC-Sierra, Inc. DOCUMENT NUMBER: 990330 ISSUE: 1 DATE: 99/05/03 ENGINEER: 8 7 6 5 4 3 SA / GW 2 PAGE:4 1 OF 10 TITLE: ATM SWITCH BACKPLANE 1 SPORT CARD SLOT A A 10 9 10 9 5 4 3 2 1 8 7 6 REVISIONS SLOT 1 SPORT CARD ZONE REV DESCRIPTION DATE APPR H H J7 J7 J7 G ROW 2 (TOP) J7 G RX+\I RX-\I AB1 AB2 AB3 AB4 AB5 AB6 AB7 AB8 AB9 AB10 TX+\I A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A1 B1 A2 B2 A3 B3 A4 B4 A5 B5 A6 B6 A7 B7 A8 B8 A9 B9 A10 B10 AMP_HS3_6X10 B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 TX-\I AB1 AB2 AB3 AB4 AB5 AB6 AB7 AB8 AB9 AB10 AMP_HS3_6X10 CD1 CD2 CD3 CD4 CD5 CD6 CD7 CD8 CD9 CD10 CD1 CD2 CD3 CD4 CD5 CD6 CD7 CD8 CD9 CD10 AMP_HS3_6X10 EF1 EF2 EF3 EF4 EF5 EF6 EF7 EF8 EF9 EF10 EF1 EF2 EF3 EF4 EF5 EF6 EF7 EF8 EF9 EF10 AMP_HS3_6X10 F J7 F C1 C2 C3 C4 C5 C6 C7 C8 C9 C10 C1 D1 C2 D2 C3 D3 C4 D4 C5 D5 C6 D6 C7 D7 C8 D8 C9 D9 C10 D10 AMP_HS3_6X10 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 GND PINS FOR HS3 CONNECTORS VDD_A J7 E1 E2 E3 E4 E5 E6 E7 E8 E9 E10 E E1 F1 E2 F2 E3 F3 E4 F4 E5 F5 E6 F6 E7 F7 E8 F8 E9 F9 E10 F10 AMP_HS3_6X10 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 J8 AB1 AB2 AB3 AB4 AB5 AB6 AB7 AB8 AB9 AB10 J8 AB1 AB2 AB3 AB4 AB5 AB6 AB7 AB8 AB9 AB10 AMP_HS3_6X10 CD1 CD2 CD3 CD4 CD5 CD6 CD7 CD8 CD9 CD10 J8 CD1 CD2 CD3 CD4 CD5 CD6 CD7 CD8 CD9 CD10 AMP_HS3_6X10 EF1 EF2 EF3 EF4 EF5 EF6 EF7 EF8 EF9 EF10 E EF1 EF2 EF3 EF4 EF5 EF6 EF7 EF8 EF9 EF10 AMP_HS3_6X10 ROW 4 (BOTTOM) J8 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 D A1 B1 A2 B2 A3 B3 A4 B4 A5 B5 A6 B6 A7 B7 A8 B8 A9 B9 A10 B10 AMP_HS3_6X10 J8 3 2 1 0 B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 D BP_ACK_IN<3..0>\I C C1 C2 C3 C4 C5 C6 C7 C8 C9 C10 C1 D1 C2 D2 C3 D3 C4 D4 C5 D5 C6 D6 C7 D7 C8 D8 C9 D9 C10 D10 AMP_HS3_6X10 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 C J8 3 2 1 0 10G10< BP_ACK_OUT<3..0>\I B 2E10> CELL_START\I E1 E2 E3 E4 E5 E6 E7 E8 E9 E10 E1 F1 E2 F2 E3 F3 E4 F4 E5 F5 E6 F6 E7 F7 E8 F8 E9 F9 E10 F10 AMP_HS3_6X10 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 SE_CLK\I B DRAWING: TITLE=PORT_CARD4_INTERFACE ABBREV=PORT_CARD4_INTERFACE LAST_MODIFIED=Mon May 10 18:16:43 1999 PMC-Sierra, Inc. DOCUMENT NUMBER: PMC-990330 ISSUE: 1 DATE: 99/05/03 ENGINEER: 8 7 6 5 4 3 SA / GW 2 PAGE:5 1 OF 10 TITLE: ATM SWITCH BACKPLANE 1 SPORT CARD SLOT A A 10 9 10 9 5 4 3 2 1 8 7 6 REVISIONS SLOT 6 SPORT CARD ZONE REV DESCRIPTION DATE APPR H H J9 J9 J9 G ROW 2 (TOP) J9 G RX+\I RX-\I AB1 AB2 AB3 AB4 AB5 AB6 AB7 AB8 AB9 AB10 TX+\I A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A1 B1 A2 B2 A3 B3 A4 B4 A5 B5 A6 B6 A7 B7 A8 B8 A9 B9 A10 B10 AMP_HS3_6X10 B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 TX-\I AB1 AB2 AB3 AB4 AB5 AB6 AB7 AB8 AB9 AB10 AMP_HS3_6X10 CD1 CD2 CD3 CD4 CD5 CD6 CD7 CD8 CD9 CD10 CD1 CD2 CD3 CD4 CD5 CD6 CD7 CD8 CD9 CD10 AMP_HS3_6X10 EF1 EF2 EF3 EF4 EF5 EF6 EF7 EF8 EF9 EF10 EF1 EF2 EF3 EF4 EF5 EF6 EF7 EF8 EF9 EF10 AMP_HS3_6X10 F J9 F C1 C2 C3 C4 C5 C6 C7 C8 C9 C10 C1 D1 C2 D2 C3 D3 C4 D4 C5 D5 C6 D6 C7 D7 C8 D8 C9 D9 C10 D10 AMP_HS3_6X10 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 GND PINS FOR HS3 CONNECTORS VDD_A J9 E1 E2 E3 E4 E5 E6 E7 E8 E9 E10 E E1 F1 E2 F2 E3 F3 E4 F4 E5 F5 E6 F6 E7 F7 E8 F8 E9 F9 E10 F10 AMP_HS3_6X10 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 J10 AB1 AB2 AB3 AB4 AB5 AB6 AB7 AB8 AB9 AB10 J10 AB1 AB2 AB3 AB4 AB5 AB6 AB7 AB8 AB9 AB10 AMP_HS3_6X10 CD1 CD2 CD3 CD4 CD5 CD6 CD7 CD8 CD9 CD10 J10 CD1 CD2 CD3 CD4 CD5 CD6 CD7 CD8 CD9 CD10 AMP_HS3_6X10 EF1 EF2 EF3 EF4 EF5 EF6 EF7 EF8 EF9 EF10 E EF1 EF2 EF3 EF4 EF5 EF6 EF7 EF8 EF9 EF10 AMP_HS3_6X10 ROW 4 (BOTTOM) J10 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 D A1 B1 A2 B2 A3 B3 A4 B4 A5 B5 A6 B6 A7 B7 A8 B8 A9 B9 A10 B10 AMP_HS3_6X10 J10 3 2 1 0 B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 D BP_ACK_IN<3..0>\I C C1 C2 C3 C4 C5 C6 C7 C8 C9 C10 C1 D1 C2 D2 C3 D3 C4 D4 C5 D5 C6 D6 C7 D7 C8 D8 C9 D9 C10 D10 AMP_HS3_6X10 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 C J10 3 2 1 0 10G10< BP_ACK_OUT<3..0>\I B 2E10> CELL_START\I E1 E2 E3 E4 E5 E6 E7 E8 E9 E10 E1 F1 E2 F2 E3 F3 E4 F4 E5 F5 E6 F6 E7 F7 E8 F8 E9 F9 E10 F10 AMP_HS3_6X10 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 SE_CLK\I B DRAWING: TITLE=PORT_CARD5_INTERFACE ABBREV=PORT_CARD5_INTERFACE LAST_MODIFIED=Mon May 10 10:22:20 1999 PMC-Sierra, Inc. DOCUMENT NUMBER: PMC-990330 ISSUE: 1 DATE: 99/05/03 ENGINEER: 8 7 6 5 4 3 SA / GW 2 PAGE:6 1 OF 10 TITLE: ATM SWITCH BACKPLANE 1 SPORT CARD SLOT A A 10 9 10 8 7 6 9 5 4 3 2 1 REVISIONS ZONE REV DESCRIPTION DATE APPR H H G G F F VDD_A 1 CAP PER QSE SLOT PLACE NEAR CONNECTOR 2 300 R1 SUPER_GREEN 1 E C1 U1 3.3 V 10UF E J17 F1 5.000A 300 R2 1 2 3 4 10UF PLACE CAP NEAR TIMING CARD CONNECTOR C2 U2 2 1 D SUPER_GREEN D C C B B DRAWING: TITLE=POWER ABBREV=POWER LAST_MODIFIED=Mon May 10 18:17:20 1999 PMC-Sierra, Inc. DOCUMENT NUMBER: PMC-990330 ISSUE: 1 DATE: 99/05/03 ENGINEER: 8 7 6 5 4 3 SA / GW 2 PAGE:7 1 OF 10 TITLE: ATM SWITCH BACKPLANE 1 POWER SUPPLY SECTION A A 10 9 10 9 5 4 3 2 1 8 7 6 SLOT 5 QSE ZONE REV DESCRIPTION DATE APPR MALE_V J11 ROW 1 (TOP) TX00+\I TX01+\I TX02+\I TX03+\I TX04+\I TX05+\I TX06+\I TX07+\I A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 REVISIONS H H TX00-\I TX01-\I TX02-\I TX03-\I TX04-\I TX05-\I TX06-\I TX07-\I G G A1 B1 A2 B2 A3 B3 A4 B4 A5 B5 A6 B6 A7 B7 A8 B8 A9 B9 A10 B10 AMP_HS3_6X10 MALE_V J11 C1 D1 C2 D2 C3 D3 C4 D4 C5 D5 C6 D6 C7 D7 C8 D8 C9 D9 C10 D10 AMP_HS3_6X10 MALE_V J11 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 C1 C2 C3 C4 C5 C6 C7 C8 C9 C10 F RX04+\I RX05+\I RX06+\I RX07+\I RX04-\I RX05-\I RX06-\I RX07-\I RX00+\I RX01+\I RX02+\I RX03+\I E1 E2 E3 E4 E5 E6 E7 E8 E9 E10 E1 F1 E2 F2 E3 F3 E4 F4 E5 F5 E6 F6 E7 F7 E8 F8 E9 F9 E10 F10 AMP_HS3_6X10 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 RX00-\I RX01-\I RX02-\I RX03-\I F E E J12 ROW 2 TX10+\I TX11+\I TX12+\I TX13+\I TX14+\I TX15+\I TX16+\I TX17+\I A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 TX10-\I TX11-\I TX12-\I TX13-\I TX14-\I TX15-\I TX16-\I TX17-\I A1 B1 A2 B2 A3 B3 A4 B4 A5 B5 A6 B6 A7 B7 A8 B8 A9 B9 A10 B10 AMP_HS3_6X10 MALE_V J12 B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 VDD_A D D C1 C2 C3 C4 C5 C6 C7 C8 C9 C10 C1 D1 C2 D2 C3 D3 C4 D4 C5 D5 C6 D6 C7 D7 C8 D8 C9 D9 C10 D10 AMP_HS3_6X10 MALE_V J12 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 RX10+\I RX11+\I RX12+\I RX13+\I RX14+\I RX15+\I RX16+\I RX17+\I RX10-\I RX11-\I RX12-\I RX13-\I RX14-\I RX15-\I RX16-\I RX17-\I C E1 E2 E3 E4 E5 E6 E7 E8 E9 E10 E1 F1 E2 F2 E3 F3 E4 F4 E5 F5 E6 F6 E7 F7 E8 F8 E9 F9 E10 F10 AMP_HS3_6X10 MALE_V F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 C B MALE_V J11 J12 EF1 EF2 EF3 EF4 EF5 EF6 EF7 EF8 EF9 EF10 AB1 AB2 AB3 AB4 AB5 AB6 AB7 AB8 AB9 AB10 GROUND FOR ROW 1 GROUND FOR ROW 2 J12 CD1 CD2 CD3 CD4 CD5 CD6 CD7 CD8 CD9 CD10 AB1 AB2 AB3 AB4 AB5 AB6 AB7 AB8 AB9 AB10 B MALE_V J11 MALE_V J11 J12 DRAWING: TITLE=SW_CARD1_INTERFACE ABBREV=SW_CARD1_INTERFACE LAST_MODIFIED=Mon May 10 10:22:30 1999 EF1 EF2 EF3 EF4 EF5 EF6 EF7 EF8 EF9 EF10 EF1 EF2 EF3 EF4 EF5 EF6 EF7 EF8 EF9 EF10 AMP_HS3_6X10 AB1 AB2 AB3 AB4 AB5 AB6 AB7 AB8 AB9 AB10 AMP_HS3_6X10 CD1 CD2 CD3 CD4 CD5 CD6 CD7 CD8 CD9 CD10 CD1 CD2 CD3 CD4 CD5 CD6 CD7 CD8 CD9 CD10 AMP_HS3_6X10 EF1 EF2 EF3 EF4 EF5 EF6 EF7 EF8 EF9 EF10 AMP_HS3_6X10 MALE_V CD1 CD2 CD3 CD4 CD5 CD6 CD7 CD8 CD9 CD10 AMP_HS3_6X10 MALE_V AB1 AB2 AB3 AB4 AB5 AB6 AB7 AB8 AB9 AB10 AMP_HS3_6X10 MALE_V PMC-Sierra, Inc. DOCUMENT NUMBER: PMC-990330 ISSUE: 1 DATE: 99/05/03 ENGINEER: SA / GW PAGE:8 OF 10 TITLE: ATM SWITCH BACKPLANE 1 SWITCH CARD HIGH SPEED A A 10 9 8 7 6 5 4 3 2 1 10 9 5 4 3 2 1 8 7 6 REVISIONS ZONE REV DESCRIPTION DATE APPR SLOT 5 QSE GROUND FOR ROW 3 J13 J13 ROW 3 BPACKOUT0<31..0>\I 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7 EF1 EF2 EF3 EF4 EF5 EF6 EF7 EF8 EF9 EF10 CD1 CD2 CD3 CD4 CD5 CD6 CD7 CD8 CD9 CD10 AB1 AB2 AB3 AB4 AB5 AB6 AB7 AB8 AB9 AB10 H H J13 J13 BPACKIN0<31..0>\I G A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A1 B1 A2 B2 A3 B3 A4 B4 A5 B5 A6 B6 A7 B7 A8 B8 A9 B9 A10 B10 AMP_HS3_6X10 MALE_V J13 8 9 10 11 12 13 14 15 B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 EF1 EF2 EF3 EF4 EF5 EF6 EF7 EF8 EF9 EF10 AMP_HS3_6X10 MALE_V CD1 CD2 CD3 CD4 CD5 CD6 CD7 CD8 CD9 CD10 AMP_HS3_6X10 MALE_V AB1 AB2 AB3 AB4 AB5 AB6 AB7 AB8 AB9 AB10 AMP_HS3_6X10 MALE_V G 8 9 10 11 12 13 14 15 C1 C2 C3 C4 C5 C6 C7 C8 C9 C10 C1 D1 C2 D2 C3 D3 C4 D4 C5 D5 C6 D6 C7 D7 C8 D8 C9 D9 C10 D10 AMP_HS3_6X10 J13MALE_V 16 17 18 19 20 21 22 23 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 F 16 17 18 19 20 21 22 23 E1 E2 E3 E4 E5 E6 E7 E8 E9 E10 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F E1 F1 E2 F2 E3 F3 E4 F4 E5 F5 F6 E6 E7 F7 E8 F8 E9 F9 E10 F10 AMP_HS3_6X10 MALE_V J14 ROW 4 24 25 26 27 28 29 30 31 GROUND FOR ROW 4 J14 J14 J14 E 28 29 30 31 24 25 26 27 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 EF1 EF2 EF3 EF4 EF5 EF6 EF7 EF8 EF9 EF10 CD1 CD2 CD3 CD4 CD5 CD6 CD7 CD8 CD9 CD10 AB1 AB2 AB3 AB4 AB5 AB6 AB7 AB8 AB9 AB10 E BPACKIN1<31..0>\I 0 1 2 3 0 1 2 3 4 5 6 7 4 5 6 7 C1 C2 C3 C4 C5 C6 C7 C8 C9 C10 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 A1 B1 A2 B2 A3 B3 A4 B4 A5 B5 A6 B6 A7 B7 A8 B8 A9 B9 A10 B10 AMP_HS3_6X10 MALE_V J14 BPACKOUT1<31..0>\I EF1 EF2 EF3 EF4 EF5 EF6 EF7 EF8 EF9 EF10 AMP_HS3_6X10 MALE_V CD1 CD2 CD3 CD4 CD5 CD6 CD7 CD8 CD9 CD10 AMP_HS3_6X10 MALE_V AB1 AB2 AB3 AB4 AB5 AB6 AB7 AB8 AB9 AB10 AMP_HS3_6X10 MALE_V D C1 D1 C2 D2 C3 D3 C4 D4 C5 D5 C6 D6 C7 D7 C8 D8 C9 D9 C10 D10 AMP_HS3_6X10 J14MALE_V 8 9 10 11 12 13 14 15 D 8 9 10 11 12 13 14 15 E1 E2 E3 E4 E5 E6 E7 E8 E9 E10 E1 F1 E2 F2 E3 F3 E4 F4 E5 F5 F6 E6 E7 F7 E8 F8 E9 F9 E10 F10 AMP_HS3_6X10 MALE_V J15 ROW 5 (BOTTOM) F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 GROUND FOR ROW 5 C 16 17 18 19 20 21 22 23 C 16 17 18 19 20 21 22 23 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A1 B1 A2 B2 A3 B3 A4 B4 A5 B5 A6 B6 A7 B7 A8 B8 A9 B9 A10 B10 AMP_HS3_6X10 MALE_V J15 B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 J15 EF1 EF2 EF3 EF4 EF5 EF6 EF7 EF8 EF9 EF10 J15 EF1 EF2 EF3 EF4 EF5 EF6 EF7 EF8 EF9 EF10 AMP_HS3_6X10 MALE_V 24 25 26 27 CD1 CD2 CD3 CD4 CD5 CD6 CD7 CD8 CD9 CD10 J15 CD1 CD2 CD3 CD4 CD5 CD6 CD7 CD8 CD9 CD10 AMP_HS3_6X10 MALE_V AB1 AB2 AB3 AB4 AB5 AB6 AB7 AB8 AB9 AB10 AB1 AB2 AB3 AB4 AB5 AB6 AB7 AB8 AB9 AB10 AMP_HS3_6X10 MALE_V B 24 25 26 27 B CELL_24_START\I CELL_START\I C1 C2 C3 C4 C5 C6 C7 C8 C9 C10 C1 D1 C2 D2 C3 D3 C4 D4 C5 D5 C6 D6 C7 D7 C8 D8 D9 C9 C10 D10 AMP_HS3_6X10 J15MALE_V D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 28 29 30 31 28 29 30 31 PMC-Sierra, Inc. DOCUMENT NUMBER: PMC-990330 ISSUE: 1 DATE: 99/05/03 ENGINEER: SA / GW PAGE:9 OF 10 TITLE: ATM SWITCH BACKPLANE 1 SWITCH CARD BACKPRESSURE SIGNALS A SE_CLK\I A E1 E2 E3 E4 E5 E6 E7 E8 E9 E10 E1 F1 E2 F2 E3 F3 E4 F4 E5 F5 F6 E6 E7 F7 E8 F8 E9 F9 E10 F10 AMP_HS3_6X10 MALE_V F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 10 9 8 7 6 5 4 3 2 1 10 8 7 6 9 5 4 3 2 1 REVISIONS ZONE REV DESCRIPTION DATE APPR SLOT 0 TIMING CARD H H G G SE_CLK<8..0>\I J16 F 0 1 2 3 4 5 6 7 8 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 F A1 B1 A2 B2 A3 B3 A4 B4 B5 A5 A6 B6 A7 B7 A8 B8 A9 B9 A10 B10 AMP_HS3_6X10 MALE_V GROUND FOR HS3 CONNECTOR J16 J16 J16 CELL_START<8..0>\I J16 E 0 1 2 3 4 5 6 7 8 C1 C2 C3 C4 C5 C6 C7 C8 C9 C10 C1 D1 C2 D2 C3 D3 C4 D4 C5 D5 C6 D6 C7 D7 C8 D8 C9 D9 C10 D10 AMP_HS3_6X10 MALE_V D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 AB1 AB2 AB3 AB4 AB5 AB6 AB7 AB8 AB9 AB10 AB1 AB2 AB3 AB4 AB5 AB6 AB7 AB8 AB9 AB10 AMP_HS3_6X10 MALE_V CD1 CD2 CD3 CD4 CD5 CD6 CD7 CD8 CD9 CD10 CD1 CD2 CD3 CD4 CD5 CD6 CD7 CD8 CD9 CD10 AMP_HS3_6X10 MALE_V EF1 EF2 EF3 EF4 EF5 EF6 EF7 EF8 EF9 EF10 EF1 EF2 EF3 EF4 EF5 EF6 EF7 EF8 EF9 EF10 AMP_HS3_6X10 MALE_V E CELL_24_START<5..0>\I J16 E1 E2 E3 E4 E5 E6 E7 E8 E9 E10 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 0 1 2 3 4 5 D D 3.3 V E1 F1 E2 F2 E3 F3 E4 F4 E5 F5 E6 F6 E7 F7 E8 F8 E9 F9 F10 E10 AMP_HS3_6X10 MALE_V C C B DRAWING: TITLE=TIMING_CARD_INTERFACE ABBREV=TIMING_CARD_INTERFACE LAST_MODIFIED=Mon May 10 10:21:23 1999 B PMC-Sierra, Inc. DOCUMENT NUMBER: PMC-980330 ISSUE: 1 DATE: 99/05/03 ENGINEER: 8 7 6 5 4 3 SA / GW 2 PAGE:10 1 OF 10 TITLE: ATM SWITCH BACKPLANE TIMING CARD INTERFACE A A 10 9 PRELIMINARY REFERENCE DESIGN PMC-990330 ISSUE 2 ATM SWITCHING ATM SWITCH USING S/UNI-ATLAS, QRT, AND QSE APPENDIX B: TIMING CARD SCHEMATICS The schematics for the timing card are in two groups; the first is the schematics for the timing card pcb. The second is for the CPLD. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS' INTERNAL USE 30 1 CELL_START1 OPAD OPAD OPAD OPAD OPAD OPAD OPAD OPAD OPAD OPAD OPAD OPAD OPAD OPAD OPAD OPAD OPAD OPAD OPAD OPAD OPAD OPAD CELL_24_START5 CELL_24_START6 CELL_24_START7 CELL_24_START8 OPAD OPAD OPAD OPAD 2 3 4 5 6 7 8 OBUF CELL_START2 CELL_START3 CELL_START4 CELL_START5 CELL_START6 CELL_START7 CELL_START8 CELL_START9 CELL_START10 CELL_START11 CELL_START12 CELL_START13 CELL_START14 CELL_START15 CELL_START16 CELL_START17 CELL_START18 CELL_24_START1 H OBUF OBUF OBUF OBUF OBUF OBUF H H2 OBUF OBUF CELL_START CLK CELL_24_START G OBUF OBUF OBUF OBUF OBUF OBUF OBUF CEE G P22 CLK_COUNT IPAD CLK BUFG F OBUF OBUF OBUF OBUF OBUF CELL_24_START2 CELL_24_START3 CELL_24_START4 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P6 P7 P8 P9 P28 P29 P30 P32 F E INT_C[7:0] INT_C0 OPAD OBUF OBUF OBUF OBUF OBUF OBUF OBUF OBUF OBUF INT_C1 OPAD OPAD OPAD OPAD OPAD OPAD OPAD OPAD OPAD OPAD OPAD OPAD OPAD OPAD OPAD OPAD OPAD OPAD OPAD OPAD OPAD INT_A6 OPAD INT_A7 OPAD INT_C2 INT_C3 INT_C4 INT_C5 INT_C6 E CELL_24_START9 CELL_24_START10 CELL_24_START11 CELL_24_START12 OPAD OPAD OPAD OPAD D CLKAA INT_C7 INT_B[7:0] INT_B0 INT_B1 INT_B2 P72 P71 P70 P68 P67 P66 P65 P64 P33 P34 P87 P89 P90 P91 P92 P93 P94 P95 P96 P97 D U1 INT_B4 CLK INT_B5 INT_B6 INT_B7 SW0 SWITCH_0 SWITCH_1 SWITCH_2 SWITCH_3 SWITCH_4 SWITCH_5 SWITCH_6 SWITCH_7 SET ROBO_A[7:0] ROBO_B[7:0] INT_A4 INT_A5 ROBO_C[7:0] INT_A3 INT_A2 INT_A1 INT_A0 INT_B3 C INV SW1 SW2 C IPAD N0 IPAD N1 IBUF INV INV SW3 SW4 SW5 SW6 SW7 SW_SET IPAD N2 IBUF IPAD N3 IBUF INV INV INV INV INV INV INT_A[7:0] P63 P61 P60 P59 P58 P56 P55 P54 IPAD N4 IBUF IPAD N5 IBUF IPAD N6 IBUF B IPAD N7 IBUF P49 P46 P43 P42 P41 P40 B P39 P37 P36 ROBOCONTROL IPAD N8 IBUF IBUF P53 P52 P50 P86 P85 P82 P81 P80 PMC-Sierra Inc. Document Number: 990330 Issue: 1 Title: Timing Card CPLD Drawing Title: CPLD Root Date: 99/03/10 Page: 1 of 7 4 5 6 7 8 A A 1 2 3 1 2 3 4 5 6 7 8 H H G Q[7:0] VCC CLK R Q0 Q1 Q3 C TC Q2 CE CEO CB8RE G Q[7:0] F AND4B3 FD D Q4 Q5 Q6 Q7 FD Q D Q CELL_START F AND2 C C E Q[7:0] AND4B1 E D D CB4RE Q0 Q1 Q2 Q3 CE C R CEO TC CELL_24_START C C AND4B3 B B PMC-Sierra Inc. A Date: 99/03/10 Page: 2 of 7 2 3 4 5 6 7 Document Number: 990330 A Issue: 1 Title: Timing Card CPLD Drawing Title: CLK_COUNT 8 1 1 A[15:0] U14 SET A1 ROBO_A0 A0 T 2 3 4 5 6 7 8 H OBUFT A2 A3 ROBO_A1 T CLK REG1_Q[15:0] LOAD_0 LOAD_1 CLK ROBO_A[7:0] H SWITCH_0 SWITCH_1 SWITCH_2 SWITCH_3 LOAD_2 A4 T ROBO_A2 A5 LOAD_3 DATA_0 OBUFT G DATA_1 DATA_2 DATA_3 A9 ROBO_A4 A8 T A7 ROBO_A3 A6 T SWITCH_4 OBUFT G SWITCH_5 SWITCH_6 OBUFT SWITCH_7 SET REG_1 A10 A11 A12 T ROBO_A6 T ROBO_A7 T ROBO_B0 T A13 ROBO_A5 T OBUFT F U23 SET A15 A14 OBUFT F OBUFT OBUFT CLK REG2_Q[15:0] LOAD_0 B[15:0] B0 B1 B2 B3 B4 B5 B6 B7 B8 T T T ROBO_B1 LOAD_1 ROBO_B[7:0] E OBUFT LOAD_2 LOAD_3 DATA_0 DATA_1 E OBUFT OBUFT ROBO_B2 DATA_2 DATA_3 ROBO_B3 OBUFT ROBO_B4 REG_2 B9 B10 B11 T D U28 SET CLK REG3_Q[15:0] LOAD_0 LOAD_1 LOAD_2 LOAD_3 DATA_0 DATA_1 DATA_2 DATA_3 B12 B13 T OBUFT ROBO_B5 D OBUFT ROBO_B6 C[15:0] B14 B15 C0 C1 C2 C3 C4 C5 C6 T OBUFT ROBO_B7 T OBUFT ROBO_C0 T C OBUFT ROBO_C1 T ROBO_C[7:0] OBUFT ROBO_C2 T C OBUFT B REG_3 C7 C8 C9 C10 C11 C12 C13 C14 C15 T T T T ROBO_C3 OBUFT ROBO_C4 B OBUFT ROBO_C5 OBUFT ROBO_C6 PMC-Sierra Inc. OBUFT ROBO_C7 A Document Number: PMC-990330 Issue: 1 OBUFT A Date: 99/03/10 Page: 3 of 7 Title: Timing Card CPLD Drawing Title: Robocontrol 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 H U10 CLKQ3 REG1_Q0 REG1_Q1 REG1_Q2 REG1_Q3 CLK REG1_Q[15:0] H LOAD_0 LOAD_1 AND5B2 LOAD Q2 D0 Q1 D1 Q0 D2 D3 LOAD_2 G REG G LOAD_3 DATA_0 DATA_1 F CLKQ3 LOAD Q2 D0 Q1 D1 Q0 D2 D3 AND5B3 U11 REG1_Q4 REG1_Q5 REG1_Q6 REG1_Q7 DATA_2 F DATA_3 SET E REG E U12 CLKQ3 LOAD Q2 D0 Q1 D1 Q0 REG1_Q8 REG1_Q9 REG1_Q10 REG1_Q11 D2 D3 D AND5B3 D REG C U13 CLKQ3 LOAD Q2 D0 Q1 D1 Q0 REG1_Q12 REG1_Q13 REG1_Q14 REG1_Q15 D2 D3 C B AND5B4 B REG PMC-Sierra Inc. Document Number: PMC-990330 Issue: 1 Date: 99/03/10 Page: 4 of 7 Title: Timing Card CPLD Drawing Title: Reg_1 A A 1 2 3 4 5 6 7 8 1 REG2_Q[15:0] 2 3 4 5 6 7 8 H U19 CLKQ3 REG2_Q0 REG2_Q1 REG2_Q2 REG2_Q3 LOAD Q2 D0 Q1 D1 Q0 D2 D3 CLK H LOAD_0 LOAD_1 AND5B1 LOAD_2 G REG G LOAD_3 DATA_0 DATA_1 AND5B2 U20 CLKQ3 LOAD Q2 D0 Q1 D1 Q0 D2 D3 REG2_Q7 REG2_Q6 REG2_Q5 REG2_Q4 F DATA_2 F DATA_3 SET E AND5B2 REG U21 CLKQ3 LOAD Q2 D0 Q1 D1 Q0 D2 REG2_Q8 REG2_Q9 REG2_Q10 REG2_Q11 E D AND5B3 D D3 REG C U22 CLKQ3 LOAD Q2 D0 Q1 D1 Q0 D2 D3 REG2_Q12 REG2_Q13 REG2_Q14 REG2_Q15 C B B REG PMC-Sierra Inc. Document Number: PMC-990330 Issue: 1 Date: 99/03/10 Page: 5 of 7 2 3 4 5 6 7 8 Title: Timing Card CPLD Drawing Title: Reg_2 A A 1 1 U24 CLKQ3 LOAD Q2 D0 Q1 D1 Q0 D2 D3 REG3_Q3 REG3_Q2 REG3_Q1 REG3_Q0 2 REG3_Q[15:0] 3 4 5 6 7 8 H CLK H LOAD_0 LOAD_1 LOAD_2 AND5B1 G U25 CLKQ3 LOAD Q2 D0 Q1 D1 Q0 D2 D3 REG3_Q7 REG3_Q6 REG3_Q5 REG3_Q4 G LOAD_3 DATA_0 DATA_1 F AND5B2 DATA_2 F DATA_3 SET U26 CLKQ3 LOAD Q2 D0 Q1 D1 Q0 REG3_Q8 REG3_Q9 REG3_Q10 REG3_Q11 D2 D3 E AND5B2 E D U27 CLKQ3 LOAD Q2 D0 Q1 D1 Q0 REG3_Q12 REG3_Q13 REG3_Q14 REG3_Q15 D2 D3 D C AND5B3 C B B PMC-Sierra Inc. A Date: 99/03/10 Page: 6 of 7 2 3 4 5 6 7 Document Number: PMC-990330 Issue: 1 Title: Timing Card CPLD Drawing Title: Reg_3 A 1 8 1 2 3 4 5 6 7 8 H H G FDPE CLK CE LOAD C Q1 D Q0 PRE Q G D0 FDPE D Q3 CE PRE Q Q2 F D1 F D2 C D3 FDPE D CE C PRE Q E E FDPE D CE C PRE Q D D C C GND B B PMC-Sierra Inc. A Date: 99/03/10 Page: 7 of 7 2 3 4 5 6 7 Document Number: PMC-990330 Issue: 1 Title: Timing Card CPLD Drawing Title: Reg A 1 8 PRELIMINARY REFERENCE DESIGN PMC-990330 ISSUE 2 ATM SWITCHING ATM SWITCH USING S/UNI-ATLAS, QRT, AND QSE NOTES PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS' INTERNAL USE 31 PRELIMINARY REFERENCE DESIGN PMC-990330 ISSUE 2 ATM SWITCHING ATM SWITCH USING S/UNI-ATLAS, QRT, AND QSE CONTACTING PMC-SIERRA, INC. PMC-Sierra, Inc. 105-8555 Baxter Place Burnaby, BC Canada V5A 4V7 Tel: Fax: (604) 415-6000 (604) 415-6200 document@pmc-sierra.com info@pmc-sierra.com apps@pmc-sierra.com (604) 415-4533 http://www.pmc-sierra.com Document Information: Corporate Information: Application Information: Web Site: None of the information contained in this document constitutes an express or implied warranty by PMC-Sierra, Inc. as to the sufficiency, fitness or suitability for a particular purpose of any such information or the fitness, or suitability for a particular purpose, merchantability, performance, compatibility with other parts or systems, of any of the products of PMC-Sierra, Inc., or any portion thereof, referred to in this document. PMC-Sierra, Inc. expressly disclaims all representations and warranties of any kind regarding the contents or use of the information, including, but not limited to, express and implied warranties of accuracy, completeness, merchantability, fitness for a particular use, or non-infringement. In no event will PMC-Sierra, Inc. be liable for any direct, indirect, special, incidental or consequential damages, including, but not limited to, lost profits, lost business or lost data resulting from any use of or reliance upon the information, whether or not PMC-Sierra, Inc. has been advised of the possibility of such damage. (c) 1999 PMC-Sierra, Inc. PMC-990330 (P2) Issue date: May 1999 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS' INTERNAL USE |
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