PART |
Description |
Maker |
R1QFA7218AB R1QCA7218AB R1QDA7218AB R1QCA7236AB R1 |
72-Mbit DDRII SRAM 2-word Burst
|
Renesas Electronics Corporation
|
R1QLA3636CBG R1QLA3618CBG |
36-Mbit DDRII SRAM 2-word Burst
|
Renesas Electronics Corporation
|
R1Q5A3636BBG-60R R1Q5A3618BBG-60R |
36-Mbit DDRII SRAM 4-word Burst
|
Renesas Electronics Corporation http://
|
UPD44324085F5-E50-EQ2 UPD44324365F5-E50-EQ2 UPD443 |
36M-BIT DDRII SRAM SEPARATE I/O 2-WORD BURST OPERATION
|
NEC[NEC]
|
CY7C1415BV18-250BZI CY7C1415BV18-167BZI |
36-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 1.7 to 1.9 V 1M X 36 QDR SRAM, 0.45 ns, PBGA165 36-Mbit QDR™-II SRAM 4-Word Burst Architecture
|
Cypress Semiconductor, Corp. CYPRESS SEMICONDUCTOR CORP
|
UPD44164365F5-E50-EQ1 |
18M-BIT DDRII SRAM SEPARATE I/O 2-WORD BURST OPERATION 1800万位条DDRII SRAM的分离I / O 2字爆发运
|
NEC, Corp.
|
CY7C1515KV18-250BZXI CY7C1515KV18-300BZC CY7C1515K |
72-Mbit QDR II SRAM 4-Word Burst Architecture 72-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V 4M X 18 QDR SRAM, 0.45 ns, PBGA165
|
http:// Cypress Semiconductor, Corp.
|
R1Q3A3609BBG-60R R1Q3A3636BBG-60R R1Q3A3636BBG-50R |
36-Mbit QDR垄芒II SRAM 4-word Burst 36-Mbit QDR?II SRAM 4-word Burst
|
Renesas Electronics Corporation http://
|
HM66AEB18202 HM66AEB36102BP-40 HM66AEB18202BP-30 H |
Memory>Fast SRAM>QDR SRAM 36-Mbit DDR II SRAM 2-word Burst
|
Renesas Technology / Hitachi Semiconductor
|
CY7C1426BV18 CY7C1413BV18 CY7C1411BV18 |
36-Mbit QDR垄芒-II SRAM 4-Word Burst Architecture 36-Mbit QDR?II SRAM 4-Word Burst Architecture
|
Cypress Semiconductor
|
CY7C1314BV18 CY7C1312BV18 |
18-Mbit QDR庐 II SRAM Two-Word Burst Architecture 18-Mbit QDR? II SRAM Two-Word Burst Architecture
|
Cypress Semiconductor
|
CY7C1250V18-300BZI CY7C1246V18-333BZI CY7C1246V18- |
36-Mbit DDR-II SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency) 36兆位的DDR - II SRAM2字突发架构(2.0周期读写延迟 36-Mbit DDR-II SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency) 1M X 36 DDR SRAM, 0.45 ns, PBGA165
|
Cypress Semiconductor Corp. Cypress Semiconductor, Corp.
|