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sub-micron Datasheet PDF File

For sub-micron Found Datasheets File :: 2118 Search Time::1.344ms
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				STMICROELECTRONICS[STMicroelectronics]
Part No.	74VHC00 74VHC00M 74VHC00T 5737
OCR Text	...INPUT NAND GATE fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. The internal circuit is composed of 3 stages PIN CONNECTION AND IEC LOGIC SYMBOLS June 1999 1/7 74VHC00 INPUT EQUIVALENT CI...
Description	QUAD 2-INPUT NAND GATE From old datasheet system
File Size	52.58K / 7 Page	View it Online	Download Datasheet

				STMicroelectronics
Part No.	74VHC02 74VHC02M 74VHC02T 5738
OCR Text	...-INPUT NOR GATE fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. PIN CONNECTION AND IEC LOGIC SYMBOLS June 1999 1/7 74VHC02 INPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No 2, 5, 8, 11 3, ...
Description	QUAD 2-INPUT NOR GATE From old datasheet system
File Size	52.64K / 7 Page	View it Online	Download Datasheet

				SGS Thomson Microelectronics ST Microelectronics STMICROELECTRONICS[STMicroelectronics]
Part No.	74VHC03 74VHC03M 74VHC03T 6284
OCR Text	...DRAIN NAND GATE fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. The internal circuit is composed of 3 stages including buffer output, which provides high noise immunity and stable output. This device ...
Description	QUAD 2-INPUT OPEN DRAIN NAND GATE From old datasheet system
File Size	53.48K / 7 Page	View it Online	Download Datasheet

				STMICROELECTRONICS[STMicroelectronics]
Part No.	74VHC04 74VHC04M 74VHC04T 5739
OCR Text	...OS HEX INVERTER fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. PIN CONNECTION AND IEC LOGIC SYMBOLS June 1999 1/7 74VHC04 INPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No 1, 3, 5, 9, 11,...
Description	From old datasheet system HEX INVERTER
File Size	52.04K / 7 Page	View it Online	Download Datasheet

				ST Microelectronics STMICROELECTRONICS[STMicroelectronics]
Part No.	74VHC05 74VHC05M 74VHC05T
OCR Text	...IN HEX INVERTER fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. The internal circuit is composed of 3 stages including buffer output, which provides high noise PIN CONNECTION AND IEC LOGIC SYMBOLS ...
Description	HEX INVERTER OPEN DRAIN
File Size	52.74K / 7 Page	View it Online	Download Datasheet

				ST Microelectronics STMICROELECTRONICS[STMicroelectronics]
Part No.	74VHC08MTR 74VHC08TTR 74VHC08 74VHC08M
OCR Text	...-INPUT AND GATE fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. The internal circuit is composed of 2 stages including buffer output, which provides high noise immunity and stable output. Power dow...
Description	QUAD 2-INPUT AND GATE QUAD 2-INPUT AND GATE
File Size	147.67K / 8 Page	View it Online	Download Datasheet

				STMicroelectronics N.V. 意法半导 STMICROELECTRONICS[STMicroelectronics]
Part No.	74VHC08 74VHC08M 74VHC08T 5740
OCR Text	...-INPUT AND GATE fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. PIN CONNECTION AND IEC LOGIC SYMBOLS June 1999 1/7 74VHC08 INPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No 1, 4, 9, 12 2, ...
Description	QUAD 2-INPUT AND GATE 输入与门 From old datasheet system
File Size	52.34K / 7 Page	View it Online	Download Datasheet

				意法半导 STMICROELECTRONICS[STMicroelectronics] ST Microelectronics
Part No.	74VHC125 74VHC125M 74VHC125T HC125 5736
OCR Text	...UAD BUS BUFFERS fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. PIN CONNECTION AND IEC LOGIC SYMBOLS June 1999 1/8 74VHC125 INPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No 1, 4, 10, 13 2...
Description	From old datasheet system QUAD BUS BUFFERS (3-STATE) QUAD BUS BUFFERS 3-STATE
File Size	60.68K / 8 Page	View it Online	Download Datasheet

				ST Microelectronics SGS Thomson Microelectronics STMICROELECTRONICS[STMicroelectronics] 意法半导 STMicroelectronics N.V.
Part No.	74VHC126 74VHC126M 74VHC126T 6180
OCR Text	...UAD BUS BUFFERS fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. PIN CONNECTION AND IEC LOGIC SYMBOLS June 1999 1/8 74VHC126 INPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No 1, 4, 10, 13 2...
Description	From old datasheet system QUAD BUS BUFFERS (3-STATE) Quadruple 2-Input Exclusive-OR Gates 14-SOIC -40 to 85 四总线缓冲器（三态）
File Size	60.46K / 8 Page	View it Online	Download Datasheet

				STMICROELECTRONICS[STMicroelectronics]
Part No.	74VHC132 74VHC132M 74VHC132T 6168
OCR Text	...HMITT NAND GATE fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. Power down protection is provided on all inputs and 0 to 7V can be accepted on inputs with no PIN CONNECTION AND IEC LOGIC SYMBOLS ...
Description	QUAD 2-INPUT SCHMITT NAND GATE From old datasheet system
File Size	52.85K / 7 Page	View it Online	Download Datasheet

For sub-micron Found Datasheets File :: 2118 Search Time::1.344ms
Page :: | 1 | 2 | 3 | 4 | 5 | <6> | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 |