|
|
![](images/bg04.gif) |
CYPRESS SEMICONDUCTOR CORP
|
Part No. |
CY7C1418AV18-267BZC
|
OCR Text |
...c ) to minimize clock skew and flight time mismatches echo clocks (cq and cq ) simplify data capture in high speed systems synchronous internally self timed writes 1.8v core power supply with hstl inputs and outputs variable drive hs... |
Description |
36-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V
|
File Size |
917.70K /
27 Page |
View
it Online |
Download Datasheet
|
|
|
![](images/bg04.gif) |
Sony
|
Part No. |
K810I
|
OCR Text |
...mal mode - full functionality * flight mode - limited functionality with network, FM radio, BluetoothTM transceivers off % 7 flight mode menu. 3 Enter your SIM card PIN, if requested. 4 At first startup, select the language for your phone m... |
Description |
Sony Ericsson
|
File Size |
2,621.28K /
100 Page |
View
it Online |
Download Datasheet
|
|
|
![](images/bg04.gif) |
Cypress
|
Part No. |
CY7C1302V25 7C1302V25
|
OCR Text |
... C) accounts for clock skew and flight time mis-matches * Single multiplexed address input bus latches address inputs for both READ and WRITE ports * Separate Port Selects for depth expansion * Synchronous internally self-timed writes * 2.5... |
Description |
9-Mb Pipelined SRAM with QDR?Architecture From old datasheet system
|
File Size |
249.54K /
23 Page |
View
it Online |
Download Datasheet
|
|
|
![](images/bg04.gif) |
Cypress
|
Part No. |
CY7C1304V25 7C1304V25
|
OCR Text |
... C) accounts for clock skew and flight time mis-matches * Single multiplexed address input bus latches address inputs for both READ and WRITE ports * Separate Port Selects for depth expansion * Synchronous internally self-timed writes * 2.5... |
Description |
9-Mb Pipelined SRAM with QDR?Architecture From old datasheet system
|
File Size |
215.62K /
23 Page |
View
it Online |
Download Datasheet
|
|
![](images/findchips_sm.gif)
Price and Availability
|