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differential-to-lvcmos lvttl Datasheet PDF File

For differential-to-lvcmos lvttl Found Datasheets File :: 1767 Search Time::1.437ms
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				MOTOROLA[Motorola Inc] Motorola, Inc ONSEMI[ON Semiconductor]
Part No.	MC100LVELT22 MC10LVELT22D ON0538
OCR Text	Differential LVPECL Translator MC100LVELT22 The MC100LVELT22 is a dual lvttl/LVCMOS to differential LVPECL translator. Because LVPECL (Low Voltage Positive ECL) levels are used, only +3.3V and ground are required. The small outline 8-lea...
Description	Dual lvttl/LVCMOS to Differential LVPECL Translator From old datasheet system
File Size	55.31K / 3 Page	View it Online	Download Datasheet

				MOTOROLA[Motorola, Inc]
Part No.	MPC948L
OCR Text	...e capability to select either a differential LVPECL or a lvttl compatible input. The 12 outputs are 2.5V LVCMOS or lvttl compatible and feature the drive strength to drive 50 series terminated transmission lines. With output-to-output skews...
Description	LOW VOLTAGE 1:12 CLOCK DISTRIBUTION CHIP
File Size	102.30K / 6 Page	View it Online	Download Datasheet

				Motorola, Inc
Part No.	MPC948
OCR Text	...e capability to select either a differential LVPECL or a lvttl compatible input. The 12 outputs are LVCMOS or lvttl compatible and feature the drive strength to drive 50 series terminated transmission lines. With output-to-output skews of 3...
Description	LOW VOLTAGE 1:12 CLOCK DISTRIBUTION CHIP
File Size	98.12K / 6 Page	View it Online	Download Datasheet

				ON Semiconductor
Part No.	NBSG16M
OCR Text	...er description the nbsg16m is a differential current mode logic (cml) receiver/driver/translator buffer . the device is functionally equivalent to the ep16, lvep16, or sg16 devices with cml output structure and lower emi capabilities. input...
Description	2.5V/3.3VMultilevel Input to CML Clock/Data Receiver/Driver/Translator Buffer(2.5V/3.3V多级输入到CML时钟/数据接收驱动转换缓冲 2.5V/3.3V的多级白血病的输入时钟/数据接收驱动翻译缓冲区（2.5V/3.3V的多级输入到白血病时数据接收驱动转换缓冲器）
File Size	152.26K / 11 Page	View it Online	Download Datasheet

				ON Semiconductor
Part No.	NB3L853141DTG NB3L853141DTR2G
OCR Text	...which can be driven by either a differential or single ? ended input to allow for the distribution of a lower speed clock along with the high speed system clock. the sel pin will select the differential clock inputs, clk0 & clk0 , when low ...
Description	Fanout Buffer Fanout Buffer
File Size	151.26K / 10 Page	View it Online	Download Datasheet

				Asahi Kasei Microsystems
Part No.	AK8181G
OCR Text	... - 1 - features four differential 3.3v lvds outputs selectable two lvcmos/lvttl clock in puts clock output frequency up to 650 mhz translates lvcmos/lvttl input signals to lvds levels o utput skew...
Description	3.3V LVDS 1:4 Clock Fanout Buffer
File Size	535.31K / 10 Page	View it Online	Download Datasheet

				Integrated Circuit Systems
Part No.	ICS5314I-01
OCR Text	...skew, high perfor- mance 1-to-5 differential-to-2.5v/3.3v lvpecl fanout buffer and a member of the hiperclocks? family of high performance clock solutions from ics. the ics85314i-01 has two selectable clock inputs. the clk0, nclk0 pair can ...
Description	DIFFERENTIAL-TO-2.5V/3.3V LVPECL FANOUT BUFFER
File Size	289.00K / 19 Page	View it Online	Download Datasheet

For differential-to-lvcmos lvttl Found Datasheets File :: 1767 Search Time::1.437ms
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