| |
|
 |
http://
Linear Technology Corporation
|
| Part No. |
LT1931A LT1931 LT1931ES5
|
| OCR Text |
...a given application, but with a slight decrease in efficiency and maximum output current when compared to the LT1931. Generally, if efficiency and maximum output current are critical, the LT1931 should be used. If application size and cost ... |
| Description |
1.2MHz/2.2MHz Inverting DC/DC Converters in ThinSOT
1A, 2.2MHz, Inverting DC/DC Converter in SOT-23
|
| File Size |
208.47K /
12 Page |
 View
it Online |
Download Datasheet
|
| |
|
|
RF Micro Devices, Inc.
RFMD[RF Micro Devices]
|
| Part No. |
RF2196 RF2196PCBA
|
| OCR Text |
...ground plane, or not connected. slight tuning of the output match may be required due to stray capacitance of the pin. RF output and power supply for final stage. This is the unmatched colRF OUT lector output of the second stage. A DC block... |
| Description |
3V PCS LINEAR POWER AMPLIFIER 3V的个人通讯线性功率放大器
|
| File Size |
178.93K /
8 Page |
View
it Online |
Download Datasheet |
| |
|
|
IDT
|
| Part No. |
79RC32355
|
| OCR Text |
...t pin left floating can cause a slight increase in power consumption.
Name System CLKP COLDRSTN RSTN I I I/O Input STI1 System Clock input. This is the system master clock input. The RISCore 32300 pipeline frequency is a multiple (x2, x3, ... |
| Description |
Integrated Communications Processor
|
| File Size |
576.00K /
47 Page |
View
it Online |
Download Datasheet |
| |
|
|
Xilinx Inc
|
| Part No. |
XCS30XL-4VQ100C XCS30XL-4CS280C
|
| OCR Text |
... flip-flop via the H-LUT with a slight additional delay. The two flip-flops have common clock (CK), clock enable (EC) and set/reset (SR) inputs. Internally both flip-flops are also controlled by a global initialization signal (GSR) which is... |
| Description |
FPGA,576-CELL,CMOS,TQFP,100PIN,PLASTIC
FPGA - Datasheet Reference
From old datasheet system
|
| File Size |
781.87K /
66 Page |
View
it Online |
Download Datasheet |
|
Price and Availability
|
