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Analog Devices, Inc.
ANALOG DEVICES INC
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| Part No. |
AD6620S/PCB AD6620PCB AD6620AS
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| OCR Text |
...ther DSPs 16-Bit Parallel Port, interleaved I and Q Outputs Two Separate Control and Configuration Ports Generic P Port, Serial Port 3.3 V Optimized CMOS Process JTAG Boundary Scan GENERAL DESCRIPTION
REAL, DUAL REAL, OR COMPLEX INPUTS
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| Description |
65 MSPS Digital Receive Signal Processor 65 MSPS的数字接收信号处理器
16 Characters x 1 Lines, 5x7 Dot Matrix Character and Cursor 65 MSPS的数字接收信号处理器
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| File Size |
363.84K /
43 Page |
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Keysight Technologies
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| Part No. |
DSOX4CXPI DSOXT3CXPI
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| OCR Text |
...copes - data sheet figure 4. an interleaved lister makes it easier to time-correlate activity between two decoded serial buses. figure 5. segmented memory acquisition selectively captures more packets/bytes of serial bus activity. multi-b... |
| Description |
Serial Bus Options for InfiniiVision
X-Series Oscilloscopes
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| File Size |
2,671.25K /
26 Page |
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Cypress Semiconductor Corp.
Cypress Semiconductor, Corp.
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| Part No. |
CY7C1223H-166AXC CY7C1223H-166AXI CY7C1223H-133AXI CY7C1223H-133AXC
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| OCR Text |
...supporting intel ? pentium ? interleaved or linear burst sequences ? separate processor and controller address strobes ? synchronous self-timed write ? asynchronous output enable ? offered in jedec-standard lead-free 100-pin tqfp packag... |
| Description |
2-Mbit (128K x 18) Pipelined DCD Sync SRAM 128K X 18 CACHE SRAM, 4 ns, PQFP100
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| File Size |
680.26K /
16 Page |
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Cypress Semiconductor Corp.
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| Part No. |
CY7C1330 7C1330
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| OCR Text |
...ctable burst counter supporting interleaved or linear burst sequences * Separate processor and controller address strobes * Synchronous self-timed writes * Asynchronous output enable * JEDEC-standard 100 TQFP pinout * "ZZ" Sleep Mode option... |
| Description |
64K x 32 Synchronous-Pipelined Cache RAM(64K x 32 同步流水线式高速缓冲存储器 RAM)
From old datasheet system
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| File Size |
316.54K /
16 Page |
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it Online |
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Price and Availability
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