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Zarlink Semiconductor Inc.
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Part No. |
MVTX1100
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OCR Text |
...[6] vss l_a[5] l_a[4] l_a[18] l_d[31] l_d[30] l_d[29] vss (core) l_d[28] l_d[27] l_d[26] vdd l_d[25] l_d[24] l_d[23] l_d[22] vss l_d[21] l_d...phy 10 mb serial interface switch chip 1-port mii 10/100 8-port 10 mb serial 10/100 mii line card 1... |
Description |
9-Port Home PNA Packet Concentrator
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File Size |
437.56K /
40 Page |
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it Online |
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NEC Corp.
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Part No. |
UPD720114GA-YEU-A
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OCR Text |
...ardware reset dp(4:1) i/o usb d + signal i/o usb?s downstream facing port d + signal dm(4:1) i/o usb d ? signal i/o usb?s downstream facing port d ? signal dpu i/o usb d + signal i/o usb?s upstream facing port d + signa... |
Description |
MOS INTEGRATED CIRCUIT
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File Size |
261.85K /
32 Page |
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it Online |
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INTEGRATED DEVICE TECHNOLOGY INC
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Part No. |
IDT77V1254L25PG8
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OCR Text |
...e last escape (x) nibble is xor'd with 1111b (prng = 3ffx). because a timing marker command (x_8) may occur at any time, the possibility of...phy/atm interface. 00 = utopia level 2. 01 = uto- pia level 1. 10 = dpi. 11 is reserved. osc 126 in ... |
Description |
ATM NETWORK INTERFACE, PQFP144
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File Size |
365.82K /
47 Page |
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it Online |
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Myson
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Part No. |
MTD502E
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OCR Text |
...c n c n c n c l n k r x 0 _ l e d l n k r x 1 _ l e d l n k a c t 0 _ l e d l n k a c t 1 _ l e d f d c o l 0 _ l e d f d c o l 1 _ l e d g ...phy_mii mode rmii mode phy_rm ii mode descriptions 1 i link0 (nc) link0 (nc) pin 1~32 for port0, s... |
Description |
2 Port 10M/100M Switch
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File Size |
216.62K /
20 Page |
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it Online |
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Cypress Semiconductor Corp.
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Part No. |
CY7C65640A
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OCR Text |
...gine hub repeater routing logic d+ d? usb downstream port 1 usb 2.0 phy port power control port status d+ d? ovr#[1] led pwr#[1] transaction translator (x4) tt ram spi_sd spi_sck spi_cs usb downstream port 2 usb 2.0 phy port power cont... |
Description |
TetraHub High-Speed USB Hub Controller(TetraHub高速USB Hub控制
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File Size |
302.43K /
21 Page |
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it Online |
Download Datasheet |
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Myson Century Inc
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Part No. |
CS6208
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OCR Text |
...ound-robbin fashion using the A/D input multiplexor. All functional blocks of the CS6208 can be individually powered up/down to provide opti...PHY
CPU * 4 cycle 80C51 instruction set compatible core. * Programmable clock rate: DC/20MHz/40/60M... |
Description |
Microcontroller
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File Size |
977.54K /
115 Page |
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it Online |
Download Datasheet |
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Price and Availability
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