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ICS
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Part No. |
ICS8422004I
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OCR Text |
...Y SYNTHESIZER
Type Description Differential output pair. LVHSTL interface levels. Output supply pins. Differential output pair. LVHSTL inte...to go low and the inver ted outputs nQx Pulldown to go high. When logic LOW, the internal dividers a... |
Description |
FemtoClocks? LVHSTL Frequency Synthesizer
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File Size |
181.46K /
13 Page |
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MAXIM[Maxim Integrated Products]
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Part No. |
MAX9129 MAX9129EUE MAX9129EGE
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OCR Text |
...X9129 is a quad bus low-voltage differential signaling (BLVDS) driver with flow-through pinout. This device is designed to drive a heavily loaded multipoint bus with controlled transition times (1ns 0% to 100% minimum) for reduced reflectio... |
Description |
Quad Bus LVDS Driver with Flow-Through Pinout
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File Size |
366.70K /
13 Page |
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MAXIM - Dallas Semiconductor
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Part No. |
MAX9171 MAX9172
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OCR Text |
...MAX9172 single/dual low-voltage differential signaling (LVDS) receivers are designed for high-speed applications requiring minimum power con...to the ANSI TIA/EIA-644 LVDS standard and convert LVDS to lvttl/LVCMOS-compatible outputs. A fail-sa... |
Description |
Single/Dual LVDS Line Receivers with "In-Path" Fail-Safe Single/Dual LVDS Line Receivers with “In-Path?Fail-Safe
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File Size |
221.63K /
11 Page |
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Maxim Integrated Products, Inc. MAXIM[Maxim Integrated Products] MAXIM - Dallas Semiconductor
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Part No. |
MAX9176 MAX9177 MAX9176EUB MAX9177EUB MAX9176ETB MAX9177ETB
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OCR Text |
...put. The MAX9177 has "anything" differential inputs (CML/LVDS/LVPECL) and an LVDS output. The output can be put into high impedance using th...to +85C temperature range. o 1.0ps(RMS) Jitter (max) at 670MHz o 68ps(P-P) Jitter at 800Mbps Data Ra... |
Description |
670MHz LVDS-to-LVDS and Anything-to-LVDS 2:1 Multiplexers "670MHz, LVDS-to-LVDS and Anything-to-LVDS, 2:1 Multiplexers"
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File Size |
241.46K /
14 Page |
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MAXIM[Maxim Integrated Products]
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Part No. |
MAX9178 MAX9178ETE MAX9178EUE
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OCR Text |
...n
The MAX9178 quad low-voltage differential signaling (LVDS) line driver with high-ESD tolerance is ideal for applications requiring high d...to transmit data at speeds up to 400Mbps (200MHz) over controlled impedance of media of approximatel... |
Description |
Quad LVDS Line Driver with High-ESD Tolerance and Flow-Through Pinout
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File Size |
306.92K /
14 Page |
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Cypress Semiconductor Corp
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Part No. |
Z9953AA
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OCR Text |
...m the most positive side of the differential input signal. Normal operation is obtained when the "High" input is within the VCMR range and t...to VDD/2) transmission lines. Output buffers are dual staged to control drive strength in order to r... |
Description |
EIGHT DISTRIBUTED-OUTPUT CLOCK DRIVER,TQFP,32PIN,PLASTIC From old datasheet system
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File Size |
40.81K /
6 Page |
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it Online |
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ICS
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Part No. |
ICS813001I
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OCR Text |
...or interfaces for the VCXO, one differential clock or one LVCMOS/lvttl clock inputs * CLK1 and nCLK1 supports the following input types: LVP...to 85C ambient operating temperature
GENERAL DESCRIPTION
The ICS813001I is a dual VCXO + FemtoCl... |
Description |
Dual VCXO FemtoClock? PLL
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File Size |
214.58K /
16 Page |
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it Online |
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Price and Availability
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