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ICS
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| Part No. |
ICS843404
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| OCR Text |
...ut supply pin for LVDS outputs. Differential output pair. LVDS interface levels. Differential output pair. LVDS interface levels. No connect...to internal input resistors. See Table 2, Pin Characteristics, for typical values.
TABLE 2. PIN C... |
| Description |
Low phase noise, Fibre Channel LVPECL/LVDS Clock Generator
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| File Size |
235.12K /
16 Page |
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ICS
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| Part No. |
ICS9DB206
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| OCR Text |
differential HCSL output pairs * 1 differential clock input * CLK and nCLK supports the following input types: LVPECL, LVDS, LVHSTL, SSTL, H...to-Cycle jitter: 110ps (maximum) * RMS phase jitter @ 100MHz, (1.5MHz - 22MHz): 2.42ps (typical) * 3... |
| Description |
High Performance 1-to-6 HCSL Jitter Attenuator for PCI Express?
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| File Size |
237.04K /
13 Page |
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it Online |
Download Datasheet |
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MAXIM - Dallas Semiconductor
MAXIM[Maxim Integrated Products]
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| Part No. |
MAX9122 MAX9121 MAX9122EUE MAX9121ESE MAX9121EUE MAX9122ESE
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| OCR Text |
...AX9121/MAX9122 quad low-voltage differential signaling (LVDS) differential line receivers are ideal for applications requiring high data rat...to receive data at speeds up to 500Mbps (250MHz) over controlledimpedance media of approximately 100... |
| Description |
Quad LVDS Line Receivers with Integrated Termination and Flow-Through Pinout
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| File Size |
228.78K /
12 Page |
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it Online |
Download Datasheet |
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INTEGRATED DEVICE TECHNOLOGY INC
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| Part No. |
ICS87158AF ICS87158AFT
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| OCR Text |
... from ics. the ics87158 has one differential input (which can accept lvds, lvpecl, lvhstl, sstl, hcsl), six differential hcsl output pairs a...to 600mhz and can be used in any situation where differential-to-hcsl translation is required. f eat... |
| Description |
87158 SERIES, LOW SKEW CLOCK DRIVER, 6 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO48
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| File Size |
235.41K /
16 Page |
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it Online |
Download Datasheet |
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Price and Availability
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