... x 8) * 2-wire serial interface bus, I2CTM compatible * Schmitt trigger inputs for noise suppression * Output slope control to eliminate gro...256 x 8 bit memory with a 2-wire serial interface. Low voltage design permits operation down to 2.5 ...
Description
8K/16K2.5VSPIObusSerialEEPROM 16K2.5VI2COSerialEEPROM 16K 2.5V I 2 C O Serial EEPROM 8K/16KI2CSerialEEPROMsinISOMicromodules
bus Compatible* s 1.8 to 6 Volt Operation s Low Power CMOS Technology s 64-Byte Page Write Buffer s Self-Timed Write Cycle with Auto-Clear s...256
E2PROM 256X512
24WC128 F01
PIN FUNCTIONS
Pin Name SDA SCL WP VCC VSS Function Serial D...
Description
128K-Bit I2C Serial CMOS E2PROM 128K-BitI2CSerialCMOSE2PROM 1.8V-6.0V 128K-bit IIC serial CMOS EEPROM 2.5V-6.0V 128K-bit IIC serial CMOS EEPROM
bus Compatible* s 1.8 to 6 Volt Read and Write Operation s Cascadable for up to Eight Devices s 32-Byte Page Write Buffer s Self-Timed Write...256 SENSE AMPS SHIFT REGISTERS
SOIC Package (J,K)
A0 A1 A2 VSS 1 2 3 4 8 7 6 5 VCC WP SCL SDA
...
Description
32K/64K-Bit I2C Serial CMOS E2PROM 32K/64K-BitI2CSerialCMOSE2PROM
...The device operates via the SPI bus serial interface and is enabled though a Chip Select (CS). In addition to the Chip Select, the clock inp...256 is designed with software and hardware write protection features including Block Lock protection...
Description
256K SPI serial CMOS EEPROM 1.8-6.0V 128K SPI serial CMOS EEPROM 2.5-6.0V SPI Serial EEPROM SPI串行EEPROM 128K/256K-BitSPISerialCMOSE2PROM 64K 8K x 8 Battery-Voltage CMOS E2PROM 64KK的8电池电压的CMOS E2PROM 128K SPI serial CMOS EEPROM 1.8-6.0V 256K SPI serial CMOS EEPROM 2.5-6.0V 128K/256K-Bit SPI Serial CMOS E2PROM
...to 64k
bytes
* * * *
I2C-bus serial I/O port with byte oriented master and slave functions Full-duplex UART compatible with the stand...256 x 8 RAM, expandable externally to 64k bytes Capable of producing eight synchronized, timed outpu...
...gh level, it is possible for a "bus conflict" to occur during the "dummy zero" that precedes the READ operation. Under such a condition, the voltage level seen at DO is undefined and will depend upon the relative impedances of DO and the si...
...gh level, it is possible for a "bus conflict" to occur during the "dummy zero" that precedes the READ operation. Under such a condition the voltage level seen at Data Out is undefined and will depend upon the relative impedances of Data Out...
Description
Quadruple 2-Line To 1-Line Data Selectors / Multiplexers 16-TVSOP -40 to 85 Quadruple 2-Line To 1-Line Data Selectors / Multiplexers 16-SOIC -40 to 85 16-Bit D-Type Edge-Triggered Flip-Flops With 3-State Outputs 48-SSOP -40 to 85 16-Bit D-Type Transparent Latches With 3-State Outputs 48-SSOP -40 to 85 Quadruple 2-Line To 1-Line Data Selectors / Multiplexers 16-SSOP -40 to 85 16-Bit bus Transceivers With 3-State Outputs 48-SSOP -40 to 85 4K 2.5V Microwire Serial EEPROM
...gh level, it is possible for a "bus conflict" to occur during the "dummy zero" that precedes the READ operation. Under such a condition the voltage level seen at Data Out is undefined and will depend upon the relative impedances of Data Out...
...iguration it is possible for a "bus conflict" to occur during the "dummy zero" that precedes the READ operation, if A0 is a logic HIGH level. Under such a condition the voltage level seen at Data Out is undefined and will depend upon the re...
Description
2K/4K 2.5V Microwire Serial EEPROM with Software Write Protect 2K/4K 2.5V Microwire Serial EEPROM with Software Write Protect 2K/4K 2.5V的Microwire串行EEPROM,带有软件写保护 Connectors XC95144 In-System Programmable CPLD SERIAL ACCESS SPI bus 4K 512 x 8 EEPROM
...exed low-order address and data bus during accesses to external program and data memory. Port 1: Port 1 is an 8-bit bidirectional I/O port w...256 bytes of on-chip RAM, plus numbers of special function registers. The lower 128 bytes can be acc...