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Maxim
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Part No. |
DS1858
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OCR Text |
...provide a hold time of at least 300ns for the SDA signal (see the VIH MIN of the SCL signal) in order to bridge the undefined region of the falling edge of SCL. Note 13: CB--total capacitance of one bus line, timing referenced to 0.9 x VCC ... |
Description |
Dual Temperature-Controlled Resistors with Three Monitors
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File Size |
748.92K /
22 Page |
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Maxim
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Part No. |
MAX7311
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OCR Text |
...provide a hold time of at least 300ns for the SDA signal (referred to the VIL of the SCL signal) in order to bridge the undefined region SCL's falling edge. Note 4: CB = total capacitance of one bus line in pF. Note 5: The maximum tF for th... |
Description |
2-Wire-Interfaced 16-Bit I/O Port Expander with Interrupt and Hot-Insertion Protection
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File Size |
375.63K /
17 Page |
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MITSUBISHI[Mitsubishi Electric Semiconductor]
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Part No. |
RM25HG-24S
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OCR Text |
...ated Package Planar Chips trr = 300ns Max. Applications: Snubber Circuits Ordering Information: Example: Select the complete part number from the table below -i.e. RM25HG-24S is a 1200V, 25 Ampere Super Fast Recovery Single Diode Module.
C... |
Description |
HIGH SPEED SWITCHING USE NON-INSULATED TYPE
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File Size |
24.47K /
2 Page |
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it Online |
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ST Microelectronics STMICROELECTRONICS[STMicroelectronics] http://
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Part No. |
M5482B7 M5482
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OCR Text |
... temperature Figure 3
CLOCK
300ns (min.)
TYPICAL APPLICATION BASIC electronically tuned TV system.
LED DISPLAY
15 SEGMENTS
M5482
DISPLAY DRIVER
KEYBOARD
PROCESSOR
PLL SYNTHESIZER
4/6
5482-04.EPS
DATA
M548... |
Description |
LED DISPLAY DRIVER
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File Size |
95.92K /
6 Page |
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Zarlink
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Part No. |
MT9044
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OCR Text |
...ld be held low for a minimum of 300ns. This pin is internally pulled down to VSS. Test Reset (TTL Input): Asynchronously initializes the JTAG TAP controller by putting it in the Test-Logic-Reset state. This pin is internally pulled down to ... |
Description |
T1/E1/OC3 System Synchronizer
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File Size |
620.54K /
32 Page |
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it Online |
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